CN114138091B - Method and device for controlling output voltage according to memory quantity - Google Patents
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Abstract
The invention provides a method, a system, equipment and a storage medium for controlling output voltage according to the quantity of memories, wherein the method comprises the following steps: acquiring a memory presence signal, and determining the current memory quantity in place according to the memory presence signal; determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and the reference resistance; determining output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage or not; and responsive to the current output voltage not being equal to the output voltage, adjusting the current output voltage to the output voltage. The invention adjusts the corresponding output voltage according to the current in-place memory quantity, and improves the power supply safety on the basis of protecting the memory components.
Description
Technical Field
The present invention relates to the field of servers, and more particularly, to a method, system, device, and storage medium for controlling output voltage according to the number of memories.
Background
Generally, servers mainly use Intel platform (Intel platform), so that a load (Loadline) of Intel standard is generally adopted to control a power architecture for a power supply design of a memory. Loadline is a method of controlling a large current to reduce the output voltage and avoid Voltage overshoot (overvoltage). When the current is larger, the output voltage is lower, and the aim of reducing Voltage overshoot is fulfilled.
However, in general, the Loadline control architecture needs to adjust the output voltage to a higher level, so as to avoid the lower output voltage caused by the existence of the Loadline, but if a few memories are supported, the output voltage is too high, and the situation that the output voltage is too high is easy to occur during light load with small current.
For example, when 8 DDR (Double Data Rate) exist: 15 Wx 8 pcs/1.2V=120W/1.2=100A, and Intel specifies Loadline as 0.25m ohm, 100A is calculated by the equation to obtain a voltage drop of 0.25m ohm=25 mV, and the standard 1.2V output voltage is reduced to 1.175V. The industry typically adjusts the output voltage to 1.2v+25mv=1.225V to avoid the output voltage being too low. However, when the output voltage is adjusted to 1.225V, another problem arises when 1 DDR is supported: 15 wx 1 pcs/1.2v=12.5a, obtained by the formula: a voltage drop of 12.5A 0.25m ohm=3.125 mV, because the initial set output voltage is 1.225V to support 8 memories, which results in a 1.221875V output voltage even after 3.125mV is snapped off, which is higher than the originally required 1.2V, and is very close to the highest voltage 1.26V of the memory specification, which is easy to generate overvoltage, thereby causing system power failure and even causing memory failure to burn out.
Disclosure of Invention
In view of the above, an object of the embodiments of the present invention is to provide a method, a system, a computer device and a computer readable storage medium for controlling an output voltage according to the number of memories, which can effectively determine the number of DDRs and enable VR controllers to update the level of the output voltage through resistors during S3 (sleep state), so as to achieve the purpose of completing the update of a set value before entering S0 (working state), effectively reduce the condition of overvoltage, and improve the power safety on the basis of protecting memory components.
Based on the above object, an aspect of the embodiments of the present invention provides a method for controlling an output voltage according to the number of memories, including the following steps: acquiring a memory presence signal, and determining the current memory quantity in place according to the memory presence signal; determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and the reference resistance; determining output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage or not; and responsive to the current output voltage not being equal to the output voltage, adjusting the current output voltage to the output voltage.
In some embodiments, the determining the current amount of memory in the bit based on the memory bit signal includes: determining the memory bit in response to the memory bit signal being high; and responding to the memory bit signal to be low level, and carrying out asynchronous reset on the memory.
In some embodiments, the determining the corresponding reference current according to the currently in-place memory amount includes: and taking the ratio of the product of the current in-place memory quantity and the reference load to the reference voltage as a reference current.
In some embodiments, the determining the voltage drop from the reference current and reference resistance comprises: the reference current and the reference resistance are multiplied to determine a voltage drop.
In some embodiments, the determining the output voltage from the voltage drop and the reference voltage comprises: the voltage drops are summed with the reference voltages to determine the output voltage.
In some embodiments, the method further comprises: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
In some embodiments, the method further comprises: and adjusting the size of the threshold according to the size of the reference load.
In another aspect of the embodiments of the present invention, there is provided a system for controlling an output voltage according to a number of memories, including: the acquisition module is configured to acquire the internal memory presence signal and determine the current internal memory quantity according to the internal memory presence signal; the voltage drop module is configured to determine corresponding reference current according to the current in-place memory quantity, and determine voltage drop according to the reference current and the reference resistance; the judging module is configured to determine an output voltage according to the voltage drop and the reference voltage and judge whether the current output voltage is equal to the output voltage or not; and an adjustment module configured to adjust a current output voltage to the output voltage in response to the current output voltage not being equal to the output voltage.
In yet another aspect of the embodiment of the present invention, there is also provided a computer apparatus, including: at least one processor; and a memory storing computer instructions executable on the processor, which when executed by the processor, perform the steps of the method as above.
In yet another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium storing a computer program which, when executed by a processor, implements the method steps as described above.
The invention has the following beneficial technical effects: the DDR quantity can be effectively determined through the detection circuit framework in a sleep state, the VR controller can update the output voltage level through the resistor, the purpose of updating the set value before entering the working state is achieved, the overvoltage condition is effectively reduced, and the power supply safety is improved on the basis of protecting the memory component.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are necessary for the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention and that other embodiments may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an embodiment of a method for controlling output voltage according to the number of memories according to the present invention;
FIG. 2 is a schematic diagram of a system for controlling output voltage according to the number of memories according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of hardware configuration of a computer device for controlling output voltage according to the number of memories according to an embodiment of the present invention;
fig. 4 is a schematic diagram of an embodiment of a computer storage medium for controlling output voltage according to the number of memories according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
It should be noted that, in the embodiments of the present invention, all the expressions "first" and "second" are used to distinguish two entities with the same name but different entities or different parameters, and it is noted that the "first" and "second" are only used for convenience of expression, and should not be construed as limiting the embodiments of the present invention, and the following embodiments are not described one by one.
In a first aspect of the embodiments of the present invention, an embodiment of a method for controlling an output voltage according to a memory amount is provided. Fig. 1 is a schematic diagram of an embodiment of a method for controlling an output voltage according to the number of memories according to the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, acquiring an internal memory presence signal, and determining the current internal memory quantity according to the internal memory presence signal;
s2, determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and the reference resistance;
s3, determining output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage or not; and
and S4, responding to the fact that the current output voltage is not equal to the output voltage, and adjusting the current output voltage to the output voltage.
And acquiring the memory location signal, and determining the current memory quantity in place according to the memory location signal. The conventional output voltage cannot be changed after being fixed, and cannot be adjusted according to the DDR number. The number of currently in-place memories is determined by the signal reset_n of the memories themselves, and the active asynchronous RESET of the low level: when this signal is low, the reset of the device is on and vice versa. In normal operation, this signal must be high. When the memory is loaded, the reset_n signal will rise to a high level, so as the client has many different memory allocation requirements, the number can be freely allocated, and the maximum of 8 memories can be fully allocated in the embodiment of the invention. In other embodiments, the maximum configurable memory amount may be set according to architecture.
In some embodiments, the determining the current amount of memory in the bit based on the memory bit signal includes: determining the memory bit in response to the memory bit signal being high; and responding to the memory bit signal to be low level, and carrying out asynchronous reset on the memory.
And determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and the reference resistance.
In some embodiments, the determining the corresponding reference current according to the currently in-place memory amount includes: and taking the ratio of the product of the current in-place memory quantity and the reference load to the reference voltage as a reference current. For example, when the number of DDR is 8, the reference current is 15 Wx 8 pcs/1.2V=120W/1.2V=100A, and when the number of DDR is 1, the reference current is 15 Wx 1 pcs/1.2V=15W/1.2V=12.5A.
In some embodiments, the determining the voltage drop from the reference current and reference resistance comprises: the reference current and the reference resistance are multiplied to determine a voltage drop. The baseline resistance was 0.25m ohm, and the voltage drop was 100A x 0.25m ohm = 25mV when at 8 DDRs; when at 1 DDR bit, the voltage drop was 12.5A 0.25m ohm=3.125 mV.
And determining output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage or not. When 8 DDR bits are currently in place, the standard 1.2V output voltage is reduced to 1.175V. The industry typically adjusts the output voltage to 1.225V to avoid over-voltages. When 1 DDR is in place, the output voltage is changed from 1.225V to 1.2V+3.125mV= 1.203125V, so that the condition of generating overvoltage is reduced, and the power supply system has more enough safety space.
In some embodiments, the determining the output voltage from the voltage drop and the reference voltage comprises: the voltage drops are summed with the reference voltages to determine the output voltage.
And in response to the current output voltage not being equal to the output voltage, adjusting the current output voltage to the output voltage.
In some embodiments, the method further comprises: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value. The threshold value is 1.26V, and when the output voltage reaches 1.26V, overvoltage protection is started and alarming is carried out.
In some embodiments, the method further comprises: and adjusting the size of the threshold according to the size of the reference load.
In the embodiment of the invention, 8 memories are maximally configured, and 1 memory is minimally configured, but the configuration is only exemplary, and in other embodiments, the corresponding maximum configuration and minimum configuration quantity can be set according to specific situations, so that the purposes of protecting current and saving power for different configuration quantities are achieved, and the security optimization of a server power supply system can be achieved for different memory quantities.
It should be noted that, in the above embodiments of the method for controlling output voltage according to the number of memories, the steps may be intersected, replaced, added and subtracted, so that the method for controlling output voltage according to the number of memories by these reasonable permutation and combination changes should also belong to the protection scope of the present invention, and should not limit the protection scope of the present invention to the embodiments.
Based on the above object, a second aspect of the embodiments of the present invention provides a system for controlling an output voltage according to the number of memories. As shown in fig. 2, the system 200 includes the following modules: the acquisition module is configured to acquire the internal memory presence signal and determine the current internal memory quantity according to the internal memory presence signal; the voltage drop module is configured to determine corresponding reference current according to the current in-place memory quantity, and determine voltage drop according to the reference current and the reference resistance; the judging module is configured to determine an output voltage according to the voltage drop and the reference voltage and judge whether the current output voltage is equal to the output voltage or not; and an adjustment module configured to adjust a current output voltage to the output voltage in response to the current output voltage not being equal to the output voltage.
In some embodiments, the acquisition module is configured to: determining the memory bit in response to the memory bit signal being high; and responding to the memory bit signal to be low level, and carrying out asynchronous reset on the memory.
In some embodiments, the pressure drop module is configured to: and taking the ratio of the product of the current in-place memory quantity and the reference load to the reference voltage as a reference current.
In some embodiments, the pressure drop module is further configured to: the reference current and the reference resistance are multiplied to determine a voltage drop.
In some embodiments, the determination module is configured to: the voltage drops are summed with the reference voltages to determine the output voltage.
In some embodiments, the system further comprises an alert module configured to: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
In some embodiments, the system further comprises an adjustment module configured to: and adjusting the size of the threshold according to the size of the reference load.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: s1, acquiring an internal memory presence signal, and determining the current internal memory quantity according to the internal memory presence signal; s2, determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and the reference resistance; s3, determining output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage or not; and S4, responding to the fact that the current output voltage is not equal to the output voltage, and adjusting the current output voltage to the output voltage.
In some embodiments, the determining the current amount of memory in the bit based on the memory bit signal includes: determining the memory bit in response to the memory bit signal being high; and responding to the memory bit signal to be low level, and carrying out asynchronous reset on the memory.
In some embodiments, the determining the corresponding reference current according to the currently in-place memory amount includes: and taking the ratio of the product of the current in-place memory quantity and the reference load to the reference voltage as a reference current.
In some embodiments, the determining the voltage drop from the reference current and reference resistance comprises: the reference current and the reference resistance are multiplied to determine a voltage drop.
In some embodiments, the determining the output voltage from the voltage drop and the reference voltage comprises: the voltage drops are summed with the reference voltages to determine the output voltage.
In some embodiments, the steps further comprise: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
In some embodiments, the steps further comprise: and adjusting the size of the threshold according to the size of the reference load.
Fig. 3 is a schematic hardware structure of an embodiment of the computer device for controlling output voltage according to the number of memories according to the present invention.
Taking the example of the device shown in fig. 3, a processor 301 and a memory 302 are included in the device.
The processor 301 and the memory 302 may be connected by a bus or otherwise, for example in fig. 3.
The memory 302 is used as a non-volatile computer readable storage medium, and may be used to store a non-volatile software program, a non-volatile computer executable program, and a module, such as program instructions/modules corresponding to a method for controlling an output voltage according to the number of memories in the embodiment of the present application. The processor 301 executes various functional applications of the server and data processing, i.e., implements a method of controlling an output voltage according to the amount of memory, by running nonvolatile software programs, instructions, and modules stored in the memory 302.
One or more computer instructions 303 corresponding to a method of controlling output voltages according to the number of memories are stored in the memory 302, which when executed by the processor 301, perform the method of controlling output voltages according to the number of memories in any of the method embodiments described above.
Any one embodiment of the computer device that performs the above method for controlling output voltage according to the number of memories may achieve the same or similar effects as any one of the foregoing method embodiments corresponding thereto.
The present invention also provides a computer readable storage medium storing a computer program which when executed by a processor performs a method of controlling an output voltage according to a memory amount.
Fig. 4 is a schematic diagram of an embodiment of the computer storage medium for controlling output voltage according to the amount of memory according to the present invention. Taking a computer storage medium as shown in fig. 4 as an example, the computer readable storage medium 401 stores a computer program 402 that when executed by a processor performs the above method.
Finally, it should be noted that, as will be understood by those skilled in the art, implementing all or part of the above-described methods in the embodiments may be implemented by a computer program to instruct related hardware, and the program of the method for controlling output voltage according to the amount of memory may be stored in a computer readable storage medium, where the program may include the flow of the embodiments of the above-described methods when executed. The storage medium of the program may be a magnetic disk, an optical disk, a read-only memory (ROM), a random-access memory (RAM), or the like. The computer program embodiments described above may achieve the same or similar effects as any of the method embodiments described above.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The foregoing embodiment of the present invention has been disclosed with reference to the number of embodiments for the purpose of description only, and does not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, and the program may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will appreciate that: the above discussion of any embodiment is merely exemplary and is not intended to imply that the scope of the disclosure of embodiments of the invention, including the claims, is limited to such examples; combinations of features of the above embodiments or in different embodiments are also possible within the idea of an embodiment of the invention, and many other variations of the different aspects of the embodiments of the invention as described above exist, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the embodiments should be included in the protection scope of the embodiments of the present invention.
Claims (10)
1. A method for controlling an output voltage according to a number of memories, comprising the steps of:
acquiring a memory presence signal, and determining the current memory quantity in place according to the memory presence signal;
determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and the reference resistance;
determining output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage or not; and
and in response to the current output voltage not being equal to the output voltage, adjusting the current output voltage to the output voltage.
2. The method of claim 1, wherein determining the current amount of memory in place from the memory in place signal comprises:
determining the memory bit in response to the memory bit signal being high; and
and responding to the memory bit signal to be low level, and carrying out asynchronous reset on the memory.
3. The method of claim 1, wherein determining the corresponding reference current based on the current in-place memory amount comprises:
and taking the ratio of the product of the current in-place memory quantity and the reference load to the reference voltage as a reference current.
4. The method of claim 1, wherein said determining a voltage drop from said reference current and reference resistance comprises:
the reference current and the reference resistance are multiplied to determine a voltage drop.
5. The method of claim 1, wherein said determining an output voltage from said voltage drop and a reference voltage comprises:
the voltage drops are summed with the reference voltages to determine the output voltage.
6. The method according to claim 1, wherein the method further comprises:
and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
7. The method of claim 6, wherein the method further comprises:
and adjusting the size of the threshold according to the size of the reference load.
8. A system for controlling an output voltage based on a number of memories, comprising:
the acquisition module is configured to acquire the internal memory presence signal and determine the current internal memory quantity according to the internal memory presence signal;
the voltage drop module is configured to determine corresponding reference current according to the current in-place memory quantity, and determine voltage drop according to the reference current and the reference resistance;
the judging module is configured to determine an output voltage according to the voltage drop and the reference voltage and judge whether the current output voltage is equal to the output voltage or not; and
and the adjusting module is configured to adjust the current output voltage to the output voltage in response to the current output voltage not being equal to the output voltage.
9. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, which when executed by the processor, perform the steps of the method of any one of claims 1-7.
10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the method of any one of claims 1-7.
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| WO2018192435A1 (en) * | 2017-04-18 | 2018-10-25 | 中兴通讯股份有限公司 | Alarm method and device for electric equipment |
| CN112953250A (en) * | 2019-11-26 | 2021-06-11 | 比亚迪股份有限公司 | Power supply control method, power supply module and storage medium |
| CN111309534A (en) * | 2020-02-13 | 2020-06-19 | 苏州浪潮智能科技有限公司 | Method, system and related assembly for testing BPS memory adaptive capacity |
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