CN112462913B - Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller - Google Patents

Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller Download PDF

Info

Publication number
CN112462913B
CN112462913B CN202011315626.3A CN202011315626A CN112462913B CN 112462913 B CN112462913 B CN 112462913B CN 202011315626 A CN202011315626 A CN 202011315626A CN 112462913 B CN112462913 B CN 112462913B
Authority
CN
China
Prior art keywords
pin
voltage
avs
supply voltage
hard disk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202011315626.3A
Other languages
Chinese (zh)
Other versions
CN112462913A (en
Inventor
刘福东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Inspur Intelligent Technology Co Ltd
Original Assignee
Suzhou Inspur Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Inspur Intelligent Technology Co Ltd filed Critical Suzhou Inspur Intelligent Technology Co Ltd
Priority to CN202011315626.3A priority Critical patent/CN112462913B/en
Publication of CN112462913A publication Critical patent/CN112462913A/en
Application granted granted Critical
Publication of CN112462913B publication Critical patent/CN112462913B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Dc-Dc Converters (AREA)
  • Power Sources (AREA)

Abstract

The invention discloses a power supply voltage adjusting device, a method, equipment and a medium of a solid state hard disk controller. The device comprises: the solid state hard disk controller comprises an AVS state pin and a power supply voltage pin; a DC converter including a feedback pin, an output pin connected to the power supply voltage pin, and a feedback circuit connected in parallel between the feedback pin and the output pin; the microcontroller comprises a first pin and a second pin, the first pin is connected with the AVS state pin to acquire the state of the AVS state pin, and the second pin is connected with the feedback circuit; the microcontroller is configured to adjust the feedback circuit through the second pin when the AVS status pin is invalid to cause the dc converter to supply power to the supply voltage pin according to a first preset voltage, and to adjust the feedback circuit through the second pin when the AVS status pin is valid to cause the dc converter to supply power to the supply voltage pin according to a second preset voltage, the first preset voltage being greater than the second preset voltage. The scheme of the invention reduces the power consumption of the solid state disk.

Description

Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller
Technical Field
The present application relates to the field of storage, and in particular, to a power supply voltage adjustment apparatus, method, device, and medium for a solid state hard disk controller.
Background
In the present phase, although the Solid State Disk (SSD) has great advantages in performance such as speed, power consumption, capacity, noise, reliability, etc., the price of the SSD is lower and lower with the occurrence of large-capacity FLASH memory particles, so that the SSD is more widely applied to servers and storage devices.
From the perspective of hardware composition units, the SSD generally comprises a controller, a NAND flash Memory chip, a DRAM (Dynamic Random Access Memory) cache chip, and other core devices. Through the front-end interface, the controller interacts with equipment such as server storage at the host end, and data of the DRAM chip is cached and read-write operation is carried out with the back-end NAND. The SSD controller is used as a core unit of the SSD, and the internal working and running states of the SSD controller directly relate to the performance of the SSD. For the power consumption of the whole SSD, the power consumption of the controller, the DRAM, the NAND, and other devices occupies more than 90% of the power consumption of the whole SSD motherboard, wherein the proportion occupied by the power consumption of the controller is large, but some SSD controllers partially support an AVS (Adaptive Voltage Scaling) function (that is, some chips support a function of reducing a core Voltage, and some chips do not support a function of reducing a core Voltage), how to select a chip supporting the AVS power consumption in the hardware development and product application processes, adjust the core Voltage of the SSD controller through a hardware peripheral circuit, and reduce the system power consumption of part of the SSD is a problem in front of hardware developers.
Disclosure of Invention
In view of the above, it is desirable to provide a power supply voltage adjusting apparatus, method, device and medium for a solid state hard disk controller.
According to a first aspect of the present invention, there is provided a power supply voltage adjustment apparatus of a solid state hard disk controller, the apparatus comprising:
a solid state hard disk controller comprising an AVS status pin and a supply voltage pin;
the direct current converter comprises a feedback pin, an output pin and a feedback circuit connected between the feedback pin and the output pin in parallel, wherein the output pin and a power supply voltage pin;
the microcontroller comprises a first pin and a second pin, the first pin is connected with the AVS state pin to acquire the state of the AVS state pin, and the second pin is connected with the feedback circuit;
the microcontroller is configured to adjust the feedback circuit through the second pin when the AVS status pin is invalid to enable the dc converter to supply power to the supply voltage pin according to a first preset voltage, and to adjust the feedback circuit through the second pin when the AVS status pin is valid to enable the dc converter to supply power to the supply voltage pin according to a second preset voltage, wherein the first preset voltage is greater than the second preset voltage.
In one embodiment, the feedback circuit comprises: the NMOS transistor comprises an NMOS transistor, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor;
the first resistor and the second resistor are connected in series and then connected in parallel between an output pin and a feedback pin of the direct current converter;
one end of the third resistor is connected with an output pin of the direct current converter, and the other end of the third resistor is connected to a drain electrode of the NMOS tube through the fourth resistor;
the grid electrode of the NMOS tube is connected with the second pin, the source electrode of the NMOS tube is connected with the feedback pin of the direct current converter, and the feedback pin is connected with the fifth resistor in series and then grounded.
In one embodiment, the microcontroller is configured to:
if the AVS state pin is invalid, controlling the second pin to output a low level to close the NMOS tube; and
and if the AVS state pin is effective, controlling the second pin to output a high level to enable the NMOS tube to be conducted.
In one embodiment, the microcontroller further comprises a third pin and an analog-to-digital conversion pin;
the analog-to-digital conversion pin is connected with the power supply voltage pin, and the third pin is connected with the solid state hard disk controller; and
the microcontroller is further configured to configure a low-power voltage mode debug complete state of the solid state hard disk controller according to the voltage value of the power supply voltage pin.
In one embodiment, the microcontroller is further configured to:
setting the low-power-consumption voltage mode debugging completion state as incomplete in response to the fact that the voltage value detected by the analog-to-digital conversion pin is a first preset voltage;
and setting the low-power-consumption voltage mode debugging completion state to be completed in response to the voltage value detected by the analog-to-digital conversion pin being a second preset voltage.
In one embodiment, the apparatus further comprises a first capacitor and a second capacitor;
one end of the first capacitor is grounded, and the other end of the first capacitor is connected with a power supply voltage pin of the solid state hard disk controller;
one end of the second capacitor is grounded, and the other end of the second capacitor is connected with an output pin of the direct current converter.
In one embodiment, the first preset voltage is 0.92V, and the second preset voltage is 0.88V.
According to a second aspect of the present invention, there is provided a power supply voltage adjustment method of a solid state hard disk controller employing the apparatus described above, the method comprising:
monitoring an AVS state pin of the solid state hard disk controller by using a first pin of the microcontroller;
responding to the invalid AVS state pin, the microcontroller adjusts the feedback circuit through the second pin so that the direct current converter supplies power to the power supply voltage pin of the solid state hard disk controller according to a first preset voltage;
and responding to the fact that the AVS state pin is effective, the microcontroller adjusts the feedback circuit through the second pin so that the direct current converter supplies power to a power supply voltage pin of the solid state hard disk controller according to a second preset voltage lower than the first preset voltage.
According to a third aspect of the present invention, there is also provided a computer apparatus comprising:
at least one processor; and
and the memory is used for storing a computer program capable of running on the processor, and the processor executes the power supply voltage adjusting method of the solid state hard disk controller when executing the program.
According to the fourth aspect of the present invention, there is also provided a computer-readable storage medium storing a computer program which, when executed by a processor, executes the aforementioned power supply voltage adjustment method of the solid state hard disk controller.
The method for adjusting the power supply voltage of the solid state hard disk controller monitors the AVS state pin of the solid state hard disk controller by using the microcontroller, and adjusts the feedback circuit according to the AVS state pin, so that the direct current converter provides a first preset voltage or a second preset voltage for the solid state hard disk controller according to the state of the AVS state pin; therefore, the working core voltage of the solid state disk controller supporting AVS is reduced, the power consumption of the solid state disk is reduced, the power consumption of the whole equipment of equipment such as server storage and the like is optimized, and the purpose of energy conservation is achieved.
In addition, the present invention also provides a power supply voltage adjustment method for a solid state hard disk controller, a computer device and a computer readable storage medium, which can also achieve the above technical effects and are not described herein again.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a power supply voltage adjustment apparatus of a solid state hard disk controller according to an embodiment of the present invention;
fig. 2 is a schematic flow chart illustrating a power supply voltage adjustment method for a solid state hard disk controller according to another embodiment of the present invention;
fig. 3 is an internal structural view of a computer apparatus according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In one embodiment, please refer to fig. 1, which provides a power supply voltage adjusting apparatus for a solid state hard disk controller, specifically the apparatus includes:
the solid state hard disk controller comprises an AVS state pin AVS _ EN _ p and a power supply voltage pin VDD _ CORE;
the direct current converter comprises a feedback pin FB, an output pin Vout and a feedback circuit connected between the feedback pin and the output pin in parallel, wherein the output pin is connected with a power supply voltage pin;
a Microcontroller (MCU for short) including a first pin GPIO1 and a second pin GPIO2, where the first pin GPIO1 is connected to an AVS state pin to obtain a state of the AVS state pin, and the second pin GPIO2 is connected to the feedback circuit;
the microcontroller is configured to adjust the feedback circuit through the second pin GPIO2 when the AVS status pin is invalid, so that the dc converter supplies power to the supply voltage pin according to a first preset voltage, and to adjust the feedback circuit through the second pin GPIO2 when the AVS status pin is valid, so that the dc converter supplies power to the supply voltage pin according to a second preset voltage, wherein the first preset voltage is greater than the second preset voltage.
The method for adjusting the power supply voltage of the solid state hard disk controller monitors the AVS state pin of the solid state hard disk controller by using the microcontroller, and adjusts the feedback circuit according to the AVS state pin, so that the direct current converter provides a first preset voltage or a second preset voltage for the solid state hard disk controller according to the state of the AVS state pin; therefore, the working core voltage of the solid state disk controller supporting AVS is reduced, the power consumption of the solid state disk is reduced, the power consumption of the whole equipment of equipment such as server storage and the like is optimized, and the purpose of energy conservation is achieved.
In another embodiment, please continue to refer to fig. 1, the feedback circuit includes an NMOS transistor, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5;
the first resistor R1 and the second resistor R2 are connected in series and then connected in parallel between an output pin and a feedback pin of the direct current converter;
one end of the third resistor is connected with an output pin of the direct current converter, and the other end of the third resistor is connected to a drain electrode of the NMOS tube through the fourth resistor;
the grid electrode of the NMOS tube is connected with a second pin GPIO2, the source electrode of the NMOS tube is connected with a feedback pin of the direct current converter, and the feedback pin is connected with the fifth resistor in series and then grounded.
In yet another embodiment, the microcontroller is configured to:
if the AVS status pin is invalid, controlling the second pin GPIO2 to output a low level to close the NMOS transistor; and
if the AVS status pin is valid, the second pin GPIO2 is controlled to output a high level to turn on the NMOS transistor.
For example, when the GPIO2 interface outputs a low level by default, the NMOS is off, and the output voltage of DC/DC is determined by (R1+ R2) and R5. For example: the voltage of the FB end of the TPS53319 of TI manufacturer is 0.60V when the voltage of R1 is 5.1K-0402-1%, the voltage of R1 is 220R-0402-1% and the voltage of R5 is 10K-0402-1%, and the power voltage pin VDD _ CORE is about 0.92V at the moment. When the GPIO3 interface outputs high level, the NMOS is turned on, and the output voltage of DC/DC is determined by (R1+ R2)/(R3 + R4) and R5. For example: when R3 is selected to be 38K-0402-1%, R4 is selected to be 0.22K-0402-1%, and the power voltage pin VDD _ CORE is about 0.88V at this time. Preferably, the first preset voltage is 0.92V, and the second preset voltage is 0.88V.
In yet another embodiment, the microcontroller further comprises a third pin GPIO3 and an analog-to-digital conversion pin;
the analog-to-digital conversion pin is connected with the power supply voltage pin, and the third pin GPIO3 is connected with a solid state hard disk controller; and
the microcontroller is further configured to configure a low-power voltage mode debug complete state of the solid state hard disk controller according to the voltage value of the power supply voltage pin.
In yet another embodiment, the microcontroller is further configured to:
setting the low-power-consumption voltage mode debugging completion state as incomplete in response to the voltage value detected by the analog-to-digital conversion pin being a first preset voltage;
and setting the low-power-consumption voltage mode debugging completion state to be completed in response to the voltage value detected by the analog-to-digital conversion pin being a second preset voltage.
Preferably, the apparatus further comprises a first capacitance C1 and a second capacitance C2;
one end of the first capacitor C1 is grounded, and the other end of the first capacitor C1 is connected with a power supply voltage pin of the solid state hard disk controller;
one end of the second capacitor C2 is grounded, and the other end is connected to an output pin of the dc converter.
In another embodiment, the present invention further provides a power supply voltage adjustment method for a solid state hard disk controller using the apparatus described above, the method including:
monitoring an AVS state pin of the solid state hard disk controller by using a first pin of the microcontroller;
responding to the invalid AVS state pin, the microcontroller adjusts the feedback circuit through the second pin so that the direct current converter supplies power to the power supply voltage pin of the solid state hard disk controller according to a first preset voltage;
and responding to the fact that the AVS state pin is effective, the microcontroller adjusts the feedback circuit through the second pin so that the direct current converter supplies power to a power supply voltage pin of the solid state hard disk controller according to a second preset voltage lower than the first preset voltage.
In another embodiment, referring to fig. 2, to facilitate understanding of the technical solution of the present invention, a NAND controller PM8632 of a Microsemi manufacturer is taken as an example for description, and an implementation principle and a design of monitoring and adjusting a core voltage of the PM8632 are described in detail:
in the power-on process of the SSD controller, after a system reset signal is valid, if the SSD controller does not support a core voltage AVS low power consumption mode, the AVS _ EN _ p outputs a low level (an AVS state pin is invalid); the first pin GPIO1 interface of the MCU monitors the state of the AVS state pin AVS _ EN _ p pin as low level in real time, then the second pin GPIO2 interface is controlled to output low level, the NMOS is in off state at the moment, the voltage dividing resistance of the DC/DC feedback branch is unchanged, the voltage of the power supply voltage pin VDD _ CORE is normal mode voltage (such as 0.92V), the analog-to-digital conversion pin ADC1 interface of the MCU unit polls and detects that the power supply voltage pin VDD _ CORE is normal mode voltage, the third pin GPIO3 interface outputs high level to inform the SSD controller AVS _ DONE _ p pin, the SSD controller supports normal mode voltage, and CORE voltage adjustment is not required to be reduced.
On the contrary, if the SSD controller supports the CORE voltage AVS low power consumption mode, the AVS _ EN _ p outputs a high level (the AVS status pin is valid), the first pin GPIO1 interface of the MCU monitors the status of the AVS _ EN _ p pin as a high level in real time, and then controls the second pin GPIO2 interface to output a high level, at this time, the NMOS is in a conducting state, adjusts the voltage dividing resistance of the DC/DC feedback branch, and reduces the power supply voltage pin VDD _ CORE voltage to a low power consumption voltage (e.g., 0.88V), after the analog-to-digital conversion pin ADC1 interface of the MCU unit detects that the power supply voltage pin VDD _ CORE voltage adjusts and outputs a low power consumption voltage, the SSD controller is notified through the third pin GPIO3 interface to the AVS _ DONE _ p pin, the low power consumption voltage mode adjustment is completed, at this time, the SSD controller can operate in the low power consumption mode after being powered on. The MCU device type selection generally has GPIO output control, IO input interrupt detection, and ADC sampling functions, for example, PCI32MX5XX series MCU of microchip manufacturers.
After the adjustment of the DC/DC circuit is completed, the ADC1 of the MCU regularly polls the voltage condition of the power supply voltage pin VDD _ CORE end, and the voltage condition is 0.92V in a normal mode or 0.88V in a low power consumption mode; and feeding back to the SSD controller through an AVS _ DONE _ p pin according to the adjustment result, and judging whether the adjustment is completed or not, so as to identify the SSD controller supporting the low power consumption mode, and achieve the purpose of reducing the SSD power consumption.
According to the method for adjusting the power supply voltage of the solid state hard disk controller, the solid state hard disk controller supporting the AVS function can be screened out, the working core voltage of the solid state hard disk controller is reduced, the purpose of reducing the power consumption of the controller is achieved, the power consumption of the solid state hard disk can be reduced to a certain extent, the power consumption of equipment such as a server storage device and the like is further optimized, and the purpose of saving energy is achieved.
According to another aspect of the present invention, a computer device is provided, and the computer device may be a server, and its internal structure is shown in fig. 3. The computer device includes a processor, a memory, a network interface, and a database connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The database of the computer device is used for storing data. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements the method of adjusting a power supply voltage of a solid state hard disk controller described above.
According to yet another aspect of the present invention, there is provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the power supply voltage adjustment method of the solid state hard disk controller described above.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, and these are all within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (9)

1. An apparatus for adjusting a power supply voltage of a solid state hard disk controller, the apparatus comprising:
a solid state hard disk controller comprising an AVS status pin and a supply voltage pin;
the direct current converter comprises a feedback pin, an output pin and a feedback circuit connected between the feedback pin and the output pin in parallel, wherein the output pin is connected with the power supply voltage pin;
the microcontroller comprises a first pin and a second pin, the first pin is connected with the AVS state pin to acquire the state of the AVS state pin, and the second pin is connected with the feedback circuit;
the microcontroller is configured to adjust the feedback circuit through the second pin when the AVS status pin is invalid to enable the dc converter to supply power to the supply voltage pin according to a first preset voltage, and to adjust the feedback circuit through the second pin when the AVS status pin is valid to enable the dc converter to supply power to the supply voltage pin according to a second preset voltage, wherein the first preset voltage is greater than the second preset voltage;
the feedback circuit includes: the NMOS transistor comprises an NMOS transistor, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor;
the first resistor and the second resistor are connected in series and then connected in parallel between an output pin and a feedback pin of the direct current converter;
one end of the third resistor is connected with an output pin of the direct current converter, and the other end of the third resistor is connected to a drain electrode of the NMOS tube through the fourth resistor;
the grid electrode of the NMOS tube is connected with the second pin, the source electrode of the NMOS tube is connected with the feedback pin of the direct current converter, and the feedback pin is connected with the fifth resistor in series and then grounded.
2. The apparatus of claim 1, wherein the microcontroller is configured to:
if the AVS state pin is invalid, controlling the second pin to output a low level to close the NMOS tube; and
and if the AVS state pin is effective, controlling the second pin to output a high level to enable the NMOS tube to be conducted.
3. The apparatus of claim 1, wherein the microcontroller further comprises a third pin and an analog-to-digital conversion pin;
the analog-to-digital conversion pin is connected with the power supply voltage pin, and the third pin is connected with the solid state hard disk controller; and
the microcontroller is further configured to configure a low-power voltage mode debug complete state of the solid state hard disk controller according to the voltage value of the power supply voltage pin.
4. The apparatus of claim 3, wherein the microcontroller is further configured to:
setting the low-power-consumption voltage mode debugging completion state as incomplete in response to the voltage value detected by the analog-to-digital conversion pin being a first preset voltage;
and setting the low-power-consumption voltage mode debugging completion state to be completed in response to the voltage value detected by the analog-to-digital conversion pin being a second preset voltage.
5. The apparatus of claim 1, further comprising a first capacitance and a second capacitance;
one end of the first capacitor is grounded, and the other end of the first capacitor is connected with a power supply voltage pin of the solid state hard disk controller;
one end of the second capacitor is grounded, and the other end of the second capacitor is connected with an output pin of the direct current converter.
6. The apparatus of claim 1, wherein the first predetermined voltage is 0.92V and the second predetermined voltage is 0.88V.
7. A method for adjusting a power supply voltage of a solid state hard disk controller, the method using the apparatus of any one of claims 1-6 to perform the steps of:
monitoring an AVS state pin of a solid state hard disk controller by using a first pin of a microcontroller;
responding to the invalid AVS state pin, the microcontroller adjusts the feedback circuit through the second pin so that the direct current converter supplies power to the power supply voltage pin of the solid state hard disk controller according to a first preset voltage;
and responding to the fact that the AVS state pin is effective, the microcontroller adjusts the feedback circuit through the second pin so that the direct current converter supplies power to a power supply voltage pin of the solid state hard disk controller according to a second preset voltage lower than the first preset voltage.
8. A computer device, comprising:
at least one processor; and
a memory storing a computer program operable in the processor, the processor when executing the program performing the method of claim 7.
9. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, is adapted to carry out the method of claim 7.
CN202011315626.3A 2020-11-21 2020-11-21 Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller Active CN112462913B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011315626.3A CN112462913B (en) 2020-11-21 2020-11-21 Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011315626.3A CN112462913B (en) 2020-11-21 2020-11-21 Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller

Publications (2)

Publication Number Publication Date
CN112462913A CN112462913A (en) 2021-03-09
CN112462913B true CN112462913B (en) 2022-07-12

Family

ID=74799210

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011315626.3A Active CN112462913B (en) 2020-11-21 2020-11-21 Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller

Country Status (1)

Country Link
CN (1) CN112462913B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115562470B (en) * 2022-12-01 2023-03-10 苏州浪潮智能科技有限公司 Power supply control system, method, equipment and medium for heterogeneous computing
CN117423366B (en) * 2023-12-14 2024-03-15 武汉麓谷科技有限公司 Power-on circuit for SSD solid state disk

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103473186A (en) * 2012-06-07 2013-12-25 鸿富锦精密工业（深圳）有限公司 SSD (solid state disc) data protection circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103473186A (en) * 2012-06-07 2013-12-25 鸿富锦精密工业（深圳）有限公司 SSD (solid state disc) data protection circuit

Also Published As

Publication number Publication date
CN112462913A (en) 2021-03-09

Similar Documents

Publication Publication Date Title
US11237578B2 (en) Intelligent voltage regulator
CN112462913B (en) Power supply voltage adjusting device, method, equipment and medium of solid state hard disk controller
DE112015006117B4 (en) SEMICONDUCTOR DRIVE WITH SELF-UPGRADE POWER SAVING MODE
DE202009011250U1 (en) Electronic Power Saving Device for Motherboards in Suspend Memory Status
US20140082385A1 (en) On demand power management for solid-state memory
WO2016003559A1 (en) Techniques to communicate with a controller for a non-volatile dual in-line memory module
US20180181182A1 (en) Electronic devices, electronic systems, and control methods therefor
CN109375543B (en) DVS voltage management device, DVS voltage management system, DVS voltage management method, storage medium, and computer device
US11404906B1 (en) Power failure protection system for solid state drives
CN113791738A (en) Normalized low-power-consumption processing method and device based on solid state disk and computer equipment
US20230376381A1 (en) Checkpoint-progress status
WO2015069667A1 (en) System and method for adjusting power failure check trip point within a storage device
CN111966199B (en) CPLD online upgrade slow start method, device, equipment and storage medium
EP3841449A1 (en) Power management component for memory sub-system power cycling
CN103092300A (en) Internal storage power supply control circuit
WO2022016858A1 (en) Voltage pumping circuit and method that support power loss data protection
CN112579005A (en) Method and device for reducing average power consumption of SSD, computer equipment and storage medium
CN108966044B (en) Power failure protection circuit and method of wireless router and wireless router
CN114121138B (en) Memory voltage testing method, device, computing equipment and system
CN112906076B (en) Control method and system of over-current protection chip and related components
CN213338644U (en) Power-down protection circuit and electric energy meter
CN111585555B (en) Anti-vibration circuit, method and intelligent terminal
CN110632999A (en) Power management device of storage equipment
CN211479102U (en) Automatic reset circuit of microprocessor
CN114496003A (en) Standby power switching circuit and solid state disk power protection circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant