CN109375543B

CN109375543B - DVS voltage management device, DVS voltage management system, DVS voltage management method, storage medium, and computer device

Info

Publication number: CN109375543B
Application number: CN201811286766.5A
Authority: CN
Inventors: 余志军; 匡双鸽; 陈亮
Original assignee: Allwinner Technology Co Ltd
Current assignee: Allwinner Technology Co Ltd
Priority date: 2018-10-31
Filing date: 2018-10-31
Publication date: 2020-08-11
Anticipated expiration: 2038-10-31
Also published as: CN109375543A

Abstract

The invention provides a DVS voltage management device, a DVS voltage management system, a DVS voltage management method, a storage medium and computer equipment, wherein the device comprises: the system comprises a state monitoring unit, a hardware active trigger control unit, a register, a software trigger control unit, an arbiter, a state machine and an I2C controller. The state monitoring unit is used for converting the voltage domain state signal into an LPI standard signal; the hardware active trigger control unit is used for generating a first voltage domain control instruction according to the LPI standard signal; the register is used for storing an operation instruction; the software trigger control unit is used for executing the operation instruction to generate a second voltage domain control instruction; the arbiter is used for selecting the first or the second voltage domain control command; the state machine is used for controlling the I2C controller according to the first or second voltage domain control instruction; the I2C controller is used to operate the power management integrated circuit under the control of a state machine. The chip voltage management can be carried out in a mode of combining software and hardware, the power consumption is low, and the compatibility is good.

Description

DVS voltage management device, DVS voltage management system, DVS voltage management method, storage medium, and computer device

Technical Field

The invention relates to the technical field of voltage management, in particular to a software and hardware adjusting method of voltage, and specifically relates to a dynamic voltage adjustment (DVS) voltage management device, system and method, storage medium and computer equipment.

Background

Currently, in order to extend the battery life and endurance of portable electronic devices (such as mobile phones, MP3, multimedia players, notebook computers, etc.), chip developers are striving to develop new power saving techniques. These power saving techniques can be broadly classified into two categories, one being dynamic power saving techniques and the other being static power saving techniques. The static electricity-saving technology comprises different low-power consumption modes, clocks of different components in the chip or on-demand switching of a power supply, and the like. The dynamic power saving technology dynamically adjusts the operating frequency and voltage of the chip (for the same chip, the higher the frequency is, the higher the required voltage is) according to different requirements of the application program operated by the chip on the computing capacity, thereby achieving the purpose of saving energy.

In the prior art, the dynamic power saving technology is realized in a pure software mode or a pure hardware mode, the pure software mode is realized by performing software control on power domain state monitoring or interruption (power management integrated circuit) through a coprocessor, and the defect of long response time exists; the pure hardware implementation mode is to monitor the state in the voltage domain in real time, the PMIC is controlled by the internal state machine, the response time is short, although the pure hardware implementation mode overcomes the defect of long response time of a pure software mode, the compatibility is poor, and the pure hardware implementation mode is basically only used for monitoring signals in a specific voltage domain, such as an ARMA (architecture array architecture) series processor.

Those skilled in the art are eagerly required to develop a chip power consumption management method to overcome the above-mentioned defects in the prior art.

Disclosure of Invention

In view of this, the technical problem to be solved by the present invention is to provide a DVS voltage management apparatus, a DVS voltage management system, a DVS voltage management method, a storage medium, and a computer device, which solve the problems of the prior art that the pure software mode is slow in voltage regulation response speed and the pure hardware mode is low in voltage regulation universality.

In order to solve the above-mentioned technical problem, an embodiment of the present invention provides a DVS voltage management apparatus including: the system comprises one or more state monitoring units, a hardware active triggering control unit connected with the state monitoring units, a register, a software triggering control unit connected with the register, an arbiter connected with the hardware active triggering control unit and the software triggering control unit, a state machine connected with the arbiter and an I2C controller connected with the state machine. The state monitoring unit is used for converting the voltage domain state signal into an LPI standard signal; the hardware active trigger control unit is used for generating a first voltage domain control instruction according to the LPI standard signal; the register is used for storing an operation instruction; the software trigger control unit is used for executing the operation instruction to generate a second voltage domain control instruction; the arbiter is used for selecting the first voltage domain control command or the second voltage domain control command in a time division multiplexing mode; the state machine is used for controlling the I2C controller according to the first voltage domain control instruction or the second voltage domain control instruction; the I2C controller is used to operate the power management integrated circuit under state machine control.

Further, the register specifically includes: the software and hardware control configuration register is connected with the software trigger control unit and used for storing an operation instruction of the software trigger control unit; the PMIC is connected with the state machine and used for storing ON, OFF and DVS commands; and the BYPASS register is connected with the I2C controller and is used for storing the preset data of the power management integrated circuit.

Further, the slave address of the BYPASS register and the address of the PMIC operation preset data register are preset in advance.

The present invention also provides a DVS voltage management system, including: the device comprises a power management integrated circuit, a voltage domain connected with the power management integrated circuit, a power domain controller connected with the voltage domain, a DVS voltage control device connected with the power domain controller and a coprocessor connected with the DVS voltage control device. The power management integrated circuit is connected with the DVS voltage control device; the power management integrated circuit is used for managing the power consumption of the voltage domain; the power domain controller is used for controlling the DVS voltage control device according to the power consumption of the voltage domain; the coprocessor is used for controlling the DVS voltage control device through software.

Further, the voltage domain has a plurality of power modules.

Further, when hardware is triggered and enabled, the power consumption of a voltage domain is monitored through the DVS voltage control device, and when voltage switching is needed, the DVS voltage control device triggers an internal state machine to execute operation; when software triggers to enable, register configuration is carried out through the coprocessor, voltage switching and voltage regulation are achieved, and the state machine executes operation according to software configuration commands.

The specific implementation of the present invention further provides a DVS voltage control method, including: monitoring power consumption states of different modules in a voltage domain; configuring an operation instruction in a register by using a coprocessor; the voltage domain controller operates the power management integrated circuit according to a power consumption state or an operation instruction.

Further, the DVS voltage control method further includes: the state of the voltage domain is indicated by a power domain state or interrupt.

Embodiments of the present invention also provide a storage medium having a computer program stored thereon, where the computer program, when executed by a processor, implements the steps of the DVS voltage management method.

Embodiments of the present invention also provide a computer device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of the DVS voltage management method when executing the computer program.

According to the above embodiments of the present invention, the DVS voltage management apparatus, system and method, storage medium and computer device have at least the following advantages: the method comprises the steps that LPI interface conversion is carried out through state monitoring of a power domain (POWERDOMAIN), and voltage ON (ON) and voltage OFF (OFF) actions of a voltage domain (VOLTAGEDOMAIN) are automatically controlled to be triggered; the mutual compatibility among various PMICs is realized by configuring ON (ON) and OFF (OFF) PMIC (power management integrated circuit) operation commands in a register voltage domain; the mutual compatibility among various PMICs is realized by the address, the register address and the operation data of the register configuration I2C interface operation; the operation of the PMIC can be directly realized through the operation of the BYPASS register, such as PMIC initialization and voltage value software regulation, besides the means that a hardware state machine controls the PMIC to regulate voltage, the voltage of the PMIC can be regulated through software, and the regulation flexibility is improved. The invention realizes the combination of software mode and hardware mode automatic response, and triggers voltage ON (ON) and OFF (OFF) through voltage domain (VOLTAGEDOMAIN) state hardware, or executes ON (ON), OFF (OFF) and DVS (dynamic voltage regulation) through software configuration hardware; the state monitoring under each voltage domain is processed uniformly and converted into an industry general Low Power Interface (LPI), so that standardization and universality are improved; the multi-voltage domain control expansion is realized, the operation requests under each voltage domain are executed in an internal arbitration time division multiplexing mode, the response speed is high, the standardization and universality are good, the voltage regulation is flexible, and the user experience degree is high.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a schematic structural diagram of a DVS voltage control apparatus according to a first embodiment of the present invention.

Fig. 2 is a schematic structural diagram of a DVS voltage control system according to a second embodiment of the present invention.

Fig. 3 is a first schematic flowchart of a DVS voltage control method according to a third embodiment of the present invention.

Fig. 4 is a second schematic flowchart of a DVS voltage control method according to a fourth embodiment of the present invention.

Description of reference numerals:

11 state monitoring unit 12 hardware active trigger control unit

13 register 14 software trigger control unit

15 arbiter 16 state machine

17I 2C controller 1 DVS Voltage control device

2 power management integrated circuit 3 voltage domain

4 power domain controller 5 coprocessor

Detailed Description

For the purpose of promoting a clear understanding of the objects, aspects and advantages of the embodiments of the invention, reference will now be made to the drawings and detailed description, wherein there are shown in the drawings and described in detail, various modifications of the embodiments described herein, and other embodiments of the invention will be apparent to those skilled in the art.

The exemplary embodiments of the present invention and the description thereof are provided to explain the present invention and not to limit the present invention. Additionally, the same or similar numbered elements/components used in the drawings and the embodiments are used to represent the same or similar parts.

As used herein, the terms "first," "second," …, etc., do not denote any order or sequence, nor are they used to limit the present invention, but rather are used to distinguish one element from another or from another element or operation described in the same technical language.

With respect to directional terminology used herein, for example: up, down, left, right, front or rear, etc., are simply directions with reference to the drawings. Accordingly, the directional terminology used is intended to be illustrative and is not intended to be limiting of the present teachings.

As used herein, the terms "comprising," "including," "having," "containing," and the like are open-ended terms that mean including, but not limited to.

As used herein, "and/or" includes any and all combinations of the described items.

References to "plurality" herein include "two" and "more than two"; reference to "multiple sets" herein includes "two sets" and "more than two sets".

As used herein, the terms "substantially", "about" and the like are used to modify any slight variation in quantity or error that does not alter the nature of the variation. Generally, the range of slight variations or errors modified by such terms may be 20% in some embodiments, 10% in some embodiments, 5% in some embodiments, or other values. It should be understood by those skilled in the art that the aforementioned values can be adjusted according to actual needs, and are not limited thereto.

Dynamic voltage regulation (DVS) is a common dynamic power saving technology, and has been widely applied to the design of general processing chips such as CPUs or GPUs, and the power consumption of the processing chips is reduced through the control of a voltage domain, so that the DVS technology has a wide application prospect.

Fig. 1 is a schematic structural diagram of a DVS voltage control apparatus according to a first embodiment of the present invention, as shown in fig. 1, an arbiter is connected to a hardware active triggering control unit and a software triggering control unit, a state machine is connected to the arbiter, the arbiter selects a control command of the hardware active triggering control unit or the software triggering control unit to the state machine in a time division multiplexing manner, and the state machine controls an I2C controller to operate a power management integrated circuit according to the control command selected by the arbiter.

In the embodiment shown in the drawing, the DVS voltage control apparatus includes: one or more status monitoring units 11, a hardware active triggering control unit 12 connected with the status monitoring units 11, a register 13, a software triggering control unit 14 connected with the register 13, an arbiter 15 connected with the hardware active triggering control unit 12 and the software triggering control unit 14, a state machine 16 connected with the arbiter 15, and an I2C controller 17 connected with the state machine 16. The state monitoring unit 11 is configured to convert the voltage domain state signal into an LPI standard signal; the hardware active trigger control unit 12 is configured to generate a first voltage domain control instruction according to the LPI standard signal; the register 13 is used for storing an operation instruction; the software trigger control unit 14 is configured to execute the operation instruction to generate a second voltage domain control instruction; the arbiter 15 is configured to select the first voltage domain control command or the second voltage domain control command in a time division multiplexing manner; the state machine 16 is used for controlling the I2C controller 17 according to the first voltage domain control instruction or the second voltage domain control instruction; the I2C controller 17 is used to operate the power management integrated circuit under the control of the state machine 16. In the embodiment of the present invention, the register 13 specifically includes a software/hardware control configuration register 131, a PMIC (power management integrated circuit) operation preset data register 132, and a BYPASS register 133. The software and hardware control configuration register 131 is connected with the software trigger control unit 14, and the software and hardware control configuration register 131 is used for storing an operation instruction of the software trigger control unit 14; a PMIC operation preset data register 132 is connected to the state machine 16, the PMIC operation preset data register 132 being used to store ON (voltage ON), OFF (voltage OFF) and DVS (dynamic voltage regulation) commands; the BYPASS register 133 is connected to the I2C controller 17, and the BYPASS register 133 is used to store power management integrated circuit preset data. The slave address of the BYPASS register 133 and the address of the PMIC operation preset data register 132 are preset in advance.

Referring to fig. 1, the address, register address and operation data of the I2C interface operation are configured by a register to realize mutual compatibility among various PMICs; the operation of the PMIC can be directly realized through the operation of the BYPASS register, such as PMIC initialization and voltage value software regulation, besides the means that a hardware state machine controls the PMIC to regulate voltage, the voltage of the PMIC can be regulated through software, and the regulation flexibility is improved; the state monitoring under each voltage domain is processed uniformly and converted into an industrial general LPI interface (parallel port, printing port, PP and the like), so that the standardization and the universality are improved; the multi-voltage domain control expansion is realized, the operation requests under each voltage domain are executed in an internal arbitration time division multiplexing mode, the response speed is high, the standardization and universality are good, the voltage regulation is flexible, and the user experience degree is high.

In an embodiment of the present invention, the BYPASS register 133 is used to initialize the power management integrated circuit or operate a specific register of the power management integrated circuit, where the BYPASS register 133 is defined as the following table 1, where "field" is each bit position of the 32-bit register, "type" is to identify whether the bit is readable and writable, r is Read (Read), and w is Write (Write); "Default" refers to a register default value, "name" is the identifier of the bit segment, and "function" is a functional description of the bit segment.

TABLE 1

Fig. 2 is a schematic structural diagram of a DVS voltage control system according to a second embodiment of the present invention, and as shown in fig. 2, a DVS voltage control apparatus is shown in fig. 1. The power domain controller controls the DVS voltage control device according to the power consumption of the voltage domain, the coprocessor controls the DVS voltage control device through software, and an I2C controller in the DVS voltage control device manages the power consumption of a power module in the voltage domain through a power management integrated circuit under the control of the power domain controller or the coprocessor.

In the embodiment shown in the figure, the DVS voltage control system comprises: a power management integrated circuit 2, a voltage domain 3 connected to the power management integrated circuit 2, a power domain controller 4 connected to the voltage domain 3, a DVS voltage control apparatus 1 connected to the power domain controller 4, and a coprocessor 5 connected to the DVS voltage control apparatus 1. Wherein, the power management integrated circuit 2 is connected with the DVS voltage control device 1; the power management integrated circuit 2 is used for managing the power consumption of the voltage domain 3; the power domain controller 4 is used for controlling the DVS voltage control device 1 according to the power consumption of the voltage domain 3; the coprocessor 5 is used to control the DVS voltage control device 1 by software. In an embodiment of the invention, the voltage domain 3 has a plurality of power modules 31. When hardware is triggered and enabled, the DVS voltage control device 1 monitors the power consumption of the voltage domain 3, and when voltage switching is needed, the DVS voltage control device 1 triggers an internal state machine to execute operation; when software triggers to enable, register configuration is carried out through the coprocessor 5, voltage switching and voltage regulation are achieved, and the state machine executes operation according to software configuration commands.

Referring to fig. 2, the combination of software and hardware automatic response is realized, the state monitoring under each voltage domain is uniformly processed and converted into an industry-wide LPI signal, the standardization and the universality are improved, and the user experience is high; and the operation requests under each voltage domain are executed in an internal arbitration time division multiplexing mode, so that the control expansion of multiple voltage domains is realized.

Fig. 3 is a first schematic flowchart of a DVS voltage control method according to a third embodiment of the present invention, and as shown in fig. 3, a voltage domain controller operates a power management integrated circuit according to a power consumption state or an operation instruction.

In the embodiment shown in the drawing, the DVS voltage control method includes:

s101: the power consumption states of the different modules in the voltage domain are monitored. In the embodiment of the present invention, there are a plurality of power modules in the voltage domain, and the power consumption states of each of the power modules may be different from each other. The power consumption states of the different modules in the voltage domain may be monitored by a power domain controller.

S102: the operating instructions in the registers are configured using the coprocessor. In an embodiment of the present invention, the registers may include a hardware and software control configuration register, a PMIC operation preset data register, and a BYPASS register.

S103: the voltage domain controller operates the power management integrated circuit according to a power consumption state or an operation instruction. In an embodiment of the present invention, the voltage domain controller may be the DVS voltage control apparatus in fig. 2.

Referring to fig. 3, the combination of software and hardware automatic response can be realized, the state monitoring under each voltage domain is uniformly processed, the standardization and the universality are improved, and the user experience is high; and the operation requests under each voltage domain are executed in an internal arbitration time division multiplexing mode, so that the control expansion of multiple voltage domains is realized.

Fig. 4 is a second schematic flowchart of a DVS voltage control method according to a fourth embodiment of the present invention, as shown in fig. 4, step S201 in fig. 4 is the same as step S101 in fig. 3, step S202 in fig. 4 is the same as step S102 in fig. 3, and step S203 in fig. 4 is the same as step S103 in fig. 3, and after the power management integrated circuit finishes operating, the state of the voltage domain may be indicated by a power domain state or an interrupt.

s201: the power consumption states of the different modules in the voltage domain are monitored.

S202: the operating instructions in the registers are configured using the coprocessor.

S203: the voltage domain controller operates the power management integrated circuit according to a power consumption state or an operation instruction.

S204: the state of the voltage domain is indicated by a power domain state or interrupt. In embodiments of the invention, the power domain states may be power consumption states of different modules in the voltage domain.

Referring to fig. 4, the state monitoring under each voltage domain can be processed uniformly and converted into an industry-wide general LPI interface (parallel port, print port, PP, etc.), so that standardization and universality are improved; the multi-voltage domain control expansion is realized, the operation requests under each voltage domain are executed in an internal arbitration time division multiplexing mode, the response speed is high, the standardization and universality are good, the voltage regulation is flexible, and the user experience degree is high.

Embodiments of the present invention also provide a storage medium having a computer program stored thereon, the computer program, when executed by a processor, implementing the steps of the DVS voltage control method. The method comprises the following steps:

s101: the power consumption states of the different modules in the voltage domain are monitored.

S102: the operating instructions in the registers are configured using the coprocessor.

S103: the voltage domain controller operates the power management integrated circuit according to a power consumption state or an operation instruction.

S204: the state of the voltage domain is indicated by a power domain state or interrupt.

Embodiments of the present invention also provide a computer device, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor, and the processor implements the steps of the DVS voltage control method when executing the computer program. The method comprises the following steps:

The embodiments of the invention described above may be implemented in various hardware, software code, or combinations of both. For example, an embodiment of the present invention may also be program code for executing the above method in a Digital Signal Processor (DSP). The invention may also relate to a variety of functions performed by a computer processor, digital signal processor, microprocessor, or Field Programmable Gate Array (FPGA). The processor described above may be configured according to the present invention to perform certain tasks by executing machine-readable software code or firmware code that defines certain methods disclosed herein. Software code or firmware code may be developed in different programming languages and in different formats or forms. Software code may also be compiled for different target platforms. However, the different code styles, types, and languages of software code and other types of configuration code that perform tasks in accordance with the present invention do not depart from the spirit and scope of the present invention.

The foregoing is merely an illustrative embodiment of the present invention, and any equivalent changes and modifications made by those skilled in the art without departing from the spirit and principle of the present invention should fall within the protection scope of the present invention.

Claims

1. A DVS voltage control apparatus, comprising: one or more status monitoring units (11), a hardware active triggering control unit (12) connected to the status monitoring units (11), a register (13), a software triggering control unit (14) connected to the register (13), an arbiter (15) connected to the hardware active triggering control unit (12) and the software triggering control unit (14), a state machine (16) connected to the arbiter (15), and an I2C controller (17) connected to the state machine (16),

the state monitoring unit (11) is used for converting the voltage domain state signal into an LPI standard signal;

the hardware active trigger control unit (12) is used for generating a first voltage domain control instruction according to the LPI standard signal;

the register (13) is used for storing an operation instruction;

the software trigger control unit (14) is used for executing the operation instruction to generate a second voltage domain control instruction;

the arbiter (15) is configured to select the first voltage domain control command or the second voltage domain control command in a time division multiplexing manner;

the state machine (16) is configured to control the I2C controller (17) according to the first voltage domain control instruction or the second voltage domain control instruction;

the I2C controller (17) is used to operate a power management integrated circuit under control of the state machine (16).

2. The DVS voltage control apparatus according to claim 1, wherein the register (13) specifically comprises:

a software and hardware control configuration register (131) connected to the software trigger control unit (14) and used for storing the operation instruction of the software trigger control unit (14);

a PMIC operation preset data register (132) coupled to the state machine (16) for storing ON, OFF and DVS commands; and

a BYPASS register (133) coupled to the I2C controller (17) for storing power management integrated circuit preset data.

3. The DVS voltage control apparatus of claim 2 wherein a slave address of the BYPASS register (133) and an address of the PMIC operation preset data register (132) are preset in advance.

4. A DVS voltage control system, comprising: a power management integrated circuit (2), a voltage domain (3) connected to the power management integrated circuit (2), a power domain controller (4) connected to the voltage domain (3), a DVS voltage control apparatus (1) according to any one of claims 1 to 3 connected to the power domain controller (4), and a co-processor (5) connected to the DVS voltage control apparatus (1),

the power management integrated circuit (2) is connected with the DVS voltage control device (1);

the power management integrated circuit (2) is used for managing the power consumption of the voltage domain (3);

the power domain controller (4) is used for controlling the DVS voltage control device (1) according to the power consumption of the voltage domain (3);

the coprocessor (5) is used for controlling the DVS voltage control device (1) through software.

5. A DVS voltage control system according to claim 4 characterised in that the voltage domain (3) has a plurality of power modules (31).

6. The DVS voltage control system according to claim 4, wherein when hardware triggering is enabled, the DVS voltage control apparatus (1) monitors the power consumption of the voltage domain (3), and when voltage switching is required, the DVS voltage control apparatus (1) triggers an internal state machine to perform an operation; when software triggers to enable, the coprocessor (5) is used for carrying out register configuration to realize voltage switching and voltage regulation, and the state machine executes operation according to a software configuration command.

7. A DVS voltage control method, comprising:

monitoring power consumption states of different modules in a voltage domain;

configuring an operation instruction in a register by using a coprocessor;

the voltage domain controller operates the power management integrated circuit according to the power consumption state or the operation instruction;

the voltage domain controller is a DVS voltage control apparatus according to any one of claims 1 to 3.

8. The DVS voltage control method of claim 7, further comprising:

the state of the voltage domain is indicated by a power domain state or interrupt.

9. A storage medium, characterized in that the storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps of the method of claim 7 or 8.

10. A computer arrangement comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the method as claimed in claim 7 or 8 when executing the computer program.