CN114095669A - Multi-input multi-output video bridging chip - Google Patents
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Abstract
The invention relates to the technical field of video bridging chips, in particular to a multi-input multi-output video bridging chip. The multiple-input multiple-output video bridging chip comprises: a Bridge module, the Bridge module comprising: the device comprises an RX module, a first MUX module, a second MUX module, a VIDEO ROCESS module and a TX module; the RX module includes: a plurality of input controllers, each input controller for decoding a different signal; the first MUX module is to: the selection of the input route is switched, and the second MUX module is used for: selecting and switching an output route; the VIDEO ROCESS module is used for: processing the data decoded by the RX module; the TX module is used for: and coding the signals processed by the VIDEO ROCESS module into corresponding protocol signals according to the route selected by the second MUX module and outputting the corresponding protocol signals. The chip meets the input and output combination of multiple scenes, supports multiple video signal inputs and multiple video signal outputs, supports multi-screen output cooperation, effectively improves the stock rate, and optimizes the cost.
Description
Technical Field
The invention relates to the technical field of video bridging chips, in particular to a multi-input multi-output video bridging chip.
Background
The video bridging chip is widely applied to peripheral products such as multi-screen commercial displays, large-screen switching, intelligent projection instruments, wireless screen projection, intelligent display screens and video acquisition and conversion, and has wide market demand and huge potential commercial value. However, the bridge chip in the market has a single function, only supports single-input single-output signal conversion, and if multiple bridge conversion schemes are required in product development, stock preparation needs to be performed on each bridge scheme, and the stock preparation is extremely difficult to guarantee under the large background environment with a tight supply chain.
Disclosure of Invention
Therefore, it is desirable to provide a multi-input multi-output video bridge chip to solve the technical problem that the existing video bridge chip has only a single function and only supports single-input single-output signal conversion. The specific technical scheme is as follows:
in order to achieve the above object, the inventor provides a multiple-input multiple-output video bridging chip, which has the following specific technical scheme:
a multiple-input multiple-output video bridge chip, comprising: a Bridge module, the Bridge module comprising: the device comprises an RX module, a first MUX module, a second MUX module, a VIDEO PROCESS module and a TX module;
the first MUX module is respectively connected with the RX module and the VIDEO PROCESS module, and the second MUX module is respectively connected with the TX module and the VIDEO PROCESS module;
the RX module includes: a plurality of input controllers, each input controller for decoding a different signal;
the first MUX module is to: the second MUX module is used for selecting and switching input routes: selecting and switching an output route;
the VIDEO processing module is used for: processing the data decoded by the RX module;
the TX module is used for: and encoding the signals processed by the VIDEO processing module into corresponding protocol signals according to the route selected by the second MUX module and outputting the corresponding protocol signals.
Further, the input controller includes but is not limited to: HDMI RX Controller, DP/eDP RX Controller, RGB/BT.1120 Controller;
the TX modules include, but are not limited to: HDMI TX, GVI TX, MIPI CSI, single/dual MIPI DSI, single/dual LVDS, RGB/BT.1120.
Further, the HDMI RX Controller is configured to: the original data of the HDMI signal is decoded, and the original data of the HDMI signal comprises one or more of the following data: rgb, yuv, audio signals;
the DP/eDP RX Controller is configured to: the DP/eDP signal is realized to decode original data, and the original data of the DP/eDP signal comprises one or more of the following: rgb, yuv, audio signals;
the RGB/BT.1120Controller comprises: an RGB Controller, the RGB Controller comprising signal lines: D0-D23, hsync, vsync, den, and dclk, where D0-D15 and dclk are multiplexed into the signal lines of BT.1120 Controller.
Further, the videorocess module is further configured to: processing the rgb or yuv signals decoded by the RX module, including but not limited to: color space conversion, scaler.
Further, the method also comprises the following steps: a PLL module, an I2C module, and an I2S module;
the PLL module is configured to: generate and provide the clocks required by all modules of Bridge;
the I2C module is to: a bus interface for configuring a Bridge register field;
the I2S module is to: and transmitting the audio signal decoded by the RX module.
Further, the method also comprises the following steps: a Soc module and a Panel/Monitor module;
the Bridge module is respectively connected with the Soc module and the Panel/Monitor module;
the Soc module is used for: configuring input and output combination of a Bridge module through I2C, controlling a display system to output a corresponding video signal and an audio system to output a corresponding audio signal to the Bridge module, and controlling power-on timing sequence of the Panel/Monitor module to receive a display video signal and output an audio signal;
the Panel/Monitor module is used for: and displaying and outputting the signal data transmitted by the Bridge module, wherein the signal data comprises but is not limited to: video signals, audio signals.
Further, the HDMI signal or DP/eDP signal is 4K video signal at maximum, and the GVITX output is 4K video signal at maximum.
The invention has the beneficial effects that: a multiple-input multiple-output video bridge chip, comprising: a Bridge module, the Bridge module comprising: the device comprises an RX module, a first MUX module, a second MUX module, a VIDEO PROCESS module and a TX module; the first MUX module is respectively connected with the RX module and the VIDEO PROCESS module, and the second MUX module is respectively connected with the TX module and the VIDEO PROCESS module; the RX module includes: a plurality of input controllers, each input controller for decoding a different signal; the first MUX module is to: the second MUX module is used for selecting and switching input routes: selecting and switching an output route; the VIDEO processing module is used for: processing the data decoded by the RX module; the TX module is used for: and encoding the signals processed by the VIDEO processing module into corresponding protocol signals according to the route selected by the second MUX module and outputting the corresponding protocol signals. The chip meets the input and output combination of multiple scenes, supports multiple video signal inputs and multiple video signal outputs, supports multi-screen output cooperation, can replace a video switching chip with single function on the market, and can meet the requirements of multiple video signal switching scenes in products without preparing multiple different switching chips by manufacturers, thereby greatly reducing the risk on a supply chain, effectively improving the stock ratio and optimizing the cost.
Drawings
FIG. 1 is a first block diagram of a multiple-input multiple-output video bridge chip according to an embodiment;
FIG. 2 is a schematic diagram of an RX module in accordance with an embodiment;
FIG. 3 is a schematic diagram of a TX module in accordance with an embodiment;
FIG. 4 is a second block diagram of a multiple-input multiple-output video bridge chip according to an embodiment of the present invention;
FIG. 5 is a block diagram illustrating a third exemplary embodiment of a multiple-input multiple-output video bridge chip;
FIG. 6 is a schematic diagram illustrating an input and an output of a multi-input multi-output video bridge chip according to an embodiment;
FIG. 7 is a diagram illustrating input and output parameters according to an embodiment;
FIG. 8 is a block diagram of a fourth exemplary embodiment of a multiple-input multiple-output video bridge chip;
fig. 9 is a schematic diagram of a software operation flow of a mimo video bridging chip according to an embodiment of the present invention.
Description of reference numerals:
10. a multi-input multi-output video bridge chip,
100. the Bridge module is used for carrying out the Bridge module,
1011. an RX-module for receiving and transmitting the data,
1012. a first MUX module for the first MUX module,
1013. a VIDEO processing module for performing a VIDEO processing operation,
1014. a second MUX block which is connected to the first MUX block,
1015. the TX module is used to transmit the data to the receiver,
10111、HDMI RX Controller，
10112、DP/eDP RX Controller，
10113、RGB/BT.1120 Controller，
10151、HDMI TX，
10152、GVI TX，
10153、MIPI CSI,
10154. single/double MIPI DSI (single/double MIPI),
10155. the single/dual LVDS is to be used,
10156、RGB/BT.1120,
101. the Soc module is used for carrying out the operation,
102. Panel/Monitor module.
103. A PLL module for controlling the operation of the PLL,
104. the I2C module is used to control the operation of the mobile phone,
105. I2S module.
Detailed Description
To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.
Referring to fig. 1 to fig. 9, in the present embodiment, an embodiment of a multiple-input multiple-output video bridge chip 10 is as follows:
as shown in fig. 1, a mimo video bridge chip 10 includes: bridge module 100, Bridge module 100 includes: an RX module 1011, a first MUX module 1012, a second MUX module 1014, a VIDEO PROCESS module 1013, and a TX module 1015; the first MUX module 1012 is connected to the RX module 1011 and the VIDEO processing module 1013, and the second MUX module 1014 is connected to the TX module 1015 and the VIDEO processing module 1013, respectively; the RX module 1011 includes: a plurality of input controllers, each input controller for decoding a different signal; the first MUX module 1012 is to: the selection of the input route is switched, and the second MUX module 1014 is configured to: selection switching of output routes (as shown in fig. 6, there may be various display combinations of input and output transitions for input and output); VIDEO processing module 1013 is configured to: processing the data decoded by the RX module 1011; TX module 1015 is used to: and the signals processed by the VIDEO processing module 1013 are encoded into corresponding protocol signals according to the route selected by the second MUX module 1014 and then output.
As shown in fig. 2, the input controllers in the RX module 1011 include, but are not limited to: HDMI RX Controller10111, DP/eDP RX Controller10112, RGB/BT.1120Controller10113, as shown in FIG. 6, i.e. it supports multiple input video signals of different formats: HDMI, DP/eDP, RGB, BT.1120.
As shown in fig. 3, TX module 1015 includes, but is not limited to: HDMI TX10151, GVI TX10152, MIPI CSI10153, single/dual MIPI DSI10154, single/dual LVDS10155, RGB/bt.112010156, as shown in fig. 6, i.e. it supports multiple output video signals of different formats: HDMI, GVI, MIPI-CSI, MIPI-DSI, LVDS, RGB, BT.1120.
As shown in fig. 7, it can support HDMI or DP/eDP video signal input of 4K, while supporting video signal GVI output of 4K to achieve the signal requirement of large video large resolution of 4K resolution.
Further, HDMI RX Controller10111 is configured to: the original data of the HDMI signal is decoded, and the original data of the HDMI signal comprises one or more of the following data: rgb, yuv, audio signals;
DP/eDP RX Controller10112 for: the DP/eDP signal is realized to decode original data, and the original data of the DP/eDP signal comprises one or more of the following: rgb, yuv, audio signals;
RGB/BT.1120Controller10113 comprises: an RGB Controller, the RGB Controller comprising signal lines: D0-D23, hsync, vsync, den and dclk have 24 signal lines, wherein D0-D15 and dclk can also be multiplexed into the signal line of BT.1120Controller, and the signal received by the Controller is directly the signal of rgb or yuv.
Further, before filling the rgb or yuv signal decoded by the RX module 1011 to the TX module 1015, the VIDEO processing module 1013 is further configured to: processing the rgb or yuv signals decoded by the RX module 1011, including but not limited to: the color space conversion can realize the data format conversion of the display data rgb2yuv or yuv2rgb, and the scaler can realize the resolution amplification or reduction of the source input signal to meet the resolution requirement of the screen end.
Further, as shown in fig. 5, the method further includes: a PLL module 103, an I2C module 104, and an I2S module 105;
the PLL module 103 is configured to: generate and provide the clocks required by all modules of Bridge;
the I2C module 104 is to: a bus interface for configuring a Bridge register field;
the I2S module 105 is to: and transmitting the audio signal decoded by the RX module 1011.
As shown in fig. 4, the method further includes: soc module 101 and Panel/Monitor module 102; the Bridge module 100 connects the Soc module 101 and the Panel/Monitor module 102, respectively. The integral connection is shown in fig. 8. The following describes a practical application of the multiple-input multiple-output video bridge chip 10:
the Panel/Monitor module 102 is configured to: and displaying and outputting the signal data transmitted by the Bridge module 100, wherein the signal data includes but is not limited to: video signals, audio signals.
Bridge module 100: and receiving the audio and video signals transmitted by the Soc module 101, converting the video signals into other video signals and outputting the video signals and the audio I2S signals to a rear-end Panle/Monitor.
The flow of software controlling the Soc module 101, the Bridge module 100 and the Panel/Monitor module 102 is shown in fig. 9:
the Soc module 101 starts and initializes the Bridge module 100 through the I2C module 104, the Soc module 101 selects to configure an output interface and an I2S module 105 channel, the Soc module 101 configures a corresponding input interface of the Bridge module 100 and an I2S module 105 channel through the I2C module 104, the Soc module 101 configures an output interface of the Bridge module 100 through the I2C module 104, and the Soc module 101 operates the power-on timing sequence of the Panel/Monitor module 102 to realize video display and audio playing.
The chip meets the input and output combination of multiple scenes, supports multiple video signal inputs and multiple video signal outputs, supports multi-screen output cooperation, can replace a video switching chip with single function on the market, and can meet the requirements of multiple video signal switching scenes in products without preparing multiple different switching chips by manufacturers, thereby greatly reducing the risk on a supply chain, effectively improving the stock ratio and optimizing the cost.
It should be noted that, although the above embodiments have been described herein, the invention is not limited thereto. Therefore, based on the innovative concepts of the present invention, the technical solutions of the present invention can be directly or indirectly applied to other related technical fields by making changes and modifications to the embodiments described herein, or by using equivalent structures or equivalent processes performed in the content of the present specification and the attached drawings, which are included in the scope of the present invention.
Claims (7)
1. A multiple-input multiple-output video bridge chip, comprising: a Bridge module, the Bridge module comprising: the device comprises an RX module, a first MUX module, a second MUX module, a VIDEO PROCESS module and a TX module;
the first MUX module is respectively connected with the RX module and the VIDEO PROCESS module, and the second MUX module is respectively connected with the TX module and the VIDEO PROCESS module;
the RX module includes: a plurality of input controllers, each input controller for decoding a different signal;
the first MUX module is to: the second MUX module is used for selecting and switching input routes: selecting and switching an output route;
the VIDEO processing module is used for: processing the data decoded by the RX module;
the TX module is used for: and encoding the signals processed by the VIDEO processing module into corresponding protocol signals according to the route selected by the second MUX module and outputting the corresponding protocol signals.
2. The multiple-input multiple-output video bridge chip of claim 1, wherein the input controller includes but is not limited to: HDMI RX Controller, DP/eDP RX Controller, RGB/BT.1120Controller;
the TX modules include, but are not limited to: HDMI TX, GVI TX, MIPI CSI, single/dual MIPIDSI, single/dual LVDS, RGB/BT.1120.
3. The MIMO video bridge chip of claim 2,
the HDMI RX Controller is configured to: the original data of the HDMI signal is decoded, and the original data of the HDMI signal comprises one or more of the following data: rgb, yuv, audio signals;
the DP/eDP RX Controller is configured to: the DP/eDP signal is realized to decode original data, and the original data of the DP/eDP signal comprises one or more of the following: rgb, yuv, audio signals;
the RGB/BT.1120controller comprises: an RGB Controller, the RGB Controller comprising signal lines: D0-D23, hsync, vsync, den, and dclk, where D0-D15, and dclk are multiplexed into the signal lines of BT.1120Controller.
4. The multiple-input multiple-output VIDEO bridge chip of claim 3, wherein the VIDEO processing module is further configured to: processing the rgb or yuv signals decoded by the RX module, including but not limited to: color space conversion, scaler.
5. The multiple-input multiple-output video bridge chip according to any one of claims 1 to 4, further comprising: a PLL module, an I2C module, and an I2S module;
the PLL module is configured to: generate and provide the clocks required by all modules of Bridge;
the I2C module is to: a bus interface for configuring a Bridge register field;
the I2S module is to: and transmitting the audio signal decoded by the RX module.
6. The multiple-input multiple-output video bridge chip according to any one of claims 1 to 5, further comprising: a Soc module and a Panel/Monitor module;
the Bridge module is respectively connected with the Soc module and the Panel/Monitor module;
the Soc module is used for: configuring input and output combination of a Bridge module through I2C, controlling a display system to output a corresponding video signal and an audio system to output a corresponding audio signal to the Bridge module, and controlling power-on timing sequence of the Panel/Monitor module to receive a display video signal and output an audio signal;
the Panel/Monitor module is used for: and displaying and outputting the signal data transmitted by the Bridge module, wherein the signal data comprises but is not limited to: video signals, audio signals.
7. The MIMO video bridge chip of claim 3,
the HDMI signal or DP/eDP signal is a maximum of 4K video signal, and the GVI TX output is a maximum of 4K video signal.
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