CN107205176B - Signal conversion device and method - Google Patents
Signal conversion device and method Download PDFInfo
- Publication number
- CN107205176B CN107205176B CN201710579602.0A CN201710579602A CN107205176B CN 107205176 B CN107205176 B CN 107205176B CN 201710579602 A CN201710579602 A CN 201710579602A CN 107205176 B CN107205176 B CN 107205176B
- Authority
- CN
- China
- Prior art keywords
- signal
- hdmi
- cpu
- rgb pixel
- conversion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 130
- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000004891 communication Methods 0.000 claims abstract description 9
- 238000012937 correction Methods 0.000 claims description 17
- 238000005457 optimization Methods 0.000 claims description 14
- 238000012827 research and development Methods 0.000 abstract description 10
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 230000001737 promoting effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012545 processing Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 210000001525 retina Anatomy 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
- H04N21/4363—Adapting the video stream to a specific local network, e.g. a Bluetooth® network
- H04N21/43632—Adapting the video stream to a specific local network, e.g. a Bluetooth® network involving a wired protocol, e.g. IEEE 1394
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
- H04N21/4363—Adapting the video stream to a specific local network, e.g. a Bluetooth® network
- H04N21/43632—Adapting the video stream to a specific local network, e.g. a Bluetooth® network involving a wired protocol, e.g. IEEE 1394
- H04N21/43635—HDMI
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Controls And Circuits For Display Device (AREA)
- Processing Of Color Television Signals (AREA)
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
Abstract
The embodiment of the invention discloses a signal conversion device and a signal conversion method, wherein the signal conversion device is used for connecting a core board of an ultra-high definition television and a display supporting HDMI signals, and comprises the following steps: the signal receiving module is connected with the core board and is used for receiving an initial signal output BY the core board, wherein the initial signal is an LVDS signal or a first V-BY-ONE signal; the signal conversion module is respectively connected with the signal receiving module and the display and is used for converting the initial signal into an HDMI signal according to the instruction and outputting the HDMI signal to the display; and the CPU is in communication connection with the signal conversion module and is used for sending instructions to the signal conversion module. Through this signal conversion equipment, the display of difference super high definition TV's core board can match different displays, and the display still can normally show output, makes things convenient for the research and development personnel can be based on the display that supports standard HDMI signal, debugs the core board of various super high definition TV, has also reduced manufacturing cost when promoting research and development efficiency.
Description
Technical Field
The embodiment of the invention relates to the technical field of televisions, in particular to a signal conversion device and a signal conversion method.
Background
In recent years, the visual effect of ultra-high definition televisions such as 4K televisions breaks through the limit of human retinas, and compared with the traditional high-definition televisions, the ultra-high definition televisions are greatly improved and promoted in the aspects of image definition, color, fluency and the like, and are favored by consumers in the market.
The thin company provides a new data transmission mode, that is, V-BY-ONE, and compared with a conventional Low-Voltage Differential Signaling (LVDS), the V-BY-ONE interface is adopted, so that a higher bandwidth can be transmitted, and the number of used transmission lines is less, so that many television manufacturers actively adopt the V-BY-ONE interface.
Due to different data interface modes, different screen parameter configurations of displays, different signal output and Timing Controller (TCON) end communication modes and the like, the communication mode between the core board and the display is complex, and the compatibility of the data interface is poor, so that research and development personnel often encounter the technical problem that different core boards are matched with different displays and the display cannot be normally output and displayed when debugging the core board of the ultra-high definition television. In order to correctly display the output, a corresponding display needs to be found, the consumed time and cost are high, the display is difficult to transport, the body of the display is easy to scratch in the transporting process, the research and development efficiency is reduced, and meanwhile, the production cost is improved.
Disclosure of Invention
In order to solve the related technical problems, the invention provides a signal conversion device and a signal conversion method, which are used for solving the problem that the output cannot be correctly displayed when different core boards of an ultra-high definition television are matched with different displays.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in a first aspect, an embodiment of the present invention provides a signal conversion apparatus, configured to connect a core board of an ultra high definition television and a display supporting an HDMI signal, where the apparatus includes:
the signal receiving module is connected with the core board and used for receiving an initial signal output BY the core board, wherein the initial signal is an LVDS signal or a first V-BY-ONE signal;
the signal conversion module is respectively connected with the signal receiving module and the display and is used for converting the initial signal into an HDMI signal according to an instruction and outputting the HDMI signal to the display;
and the CPU is in communication connection with the signal conversion module and is used for sending the instruction to the signal conversion module.
Wherein the signal receiving module comprises:
the LVDS receiver is connected with the core board and used for receiving the LVDS signals when the initial signals are LVDS signals;
and the V-BY-ONE receiver is connected with the core board and used for receiving the first V-BY-ONE signal when the initial signal is the first V-BY-ONE signal.
Wherein the signal conversion module comprises:
the RGB conversion unit is respectively connected with the signal receiving module and the CPU and is used for converting the initial signal into a first RGB pixel signal in a serial-parallel mode according to a first RGB conversion instruction sent by the CPU;
the signal correction unit is respectively connected with the RGB conversion unit and the CPU and used for correcting the first RGB pixel signal into a second RGB pixel signal according to a correction instruction sent by the CPU;
and the HDMI conversion unit is respectively connected with the signal correction unit, the CPU and the display and is used for converting the second RGB pixel signal into the HDMI signal according to an HDMI conversion instruction sent by the CPU and outputting the HDMI signal to the display.
Wherein the RGB conversion unit includes:
the LVDS decoder is connected with the signal receiving module and the CPU and used for converting the LVDS signals into the first RGB pixel signals in a serial-parallel mode according to a first RGB conversion instruction sent by the CPU when the initial signals are LVDS signals;
and the V-BY-ONE decoder is connected with the signal receiving module and the CPU and is used for converting the first V-B-ONE signal into the first RGB pixel signal in a serial-parallel mode according to the first RGB conversion instruction sent BY the CPU when the initial signal is the first V-BY-ONE signal.
Wherein the signal correction unit includes:
the color manager is respectively connected with the RGB conversion unit and the CPU, a video processor is arranged in the color manager, and the video processor is used for responding to a color optimization instruction sent by the CPU and performing color optimization on the first RGB pixel signal to obtain a third RGB pixel signal;
and the frame frequency converter is respectively connected with the color manager, the RGB conversion unit and the CPU and used for detecting the frame frequency information of the initial signal from the RGB conversion unit and carrying out frame frequency conversion on the third RGB pixel signal according to the frame frequency information and a frame frequency conversion instruction sent by the CPU to obtain the second RGB pixel signal.
Wherein the HDMI conversion unit includes:
the V-BY-ONE coding sending subunit is respectively connected with the signal correction unit and the CPU and is used for converting the second RGB pixel signal into a second V-BY-ONE signal in parallel and in series according to a V-BY-ONE coding instruction sent BY the CPU and sending the second V-BY-ONE signal out;
a V-BY-ONE receiving and decoding subunit which is respectively connected with the V-BY-ONE encoding and sending subunit and the CPU and is used for receiving the second V-BY-ONE signal and converting the second V-BY-ONE signal into a fourth RGB pixel signal in serial-parallel mode according to a second RGB conversion instruction sent BY the CPU;
and the TDMS coding and transmitting subunit is respectively connected with the V-BY-ONE receiving and decoding subunit, the CPU and the display and is used for converting the fourth RGB pixel signal into the HDMI signal in parallel and in series according to the HDMI conversion instruction sent BY the CPU and outputting the HDMI signal to the display.
In a second aspect, an embodiment of the present invention provides a signal conversion method applied to the signal conversion apparatus in the first aspect, including:
receiving an initial signal output BY a core board of the receiver through a signal receiving module, and transmitting the initial signal to a signal conversion module, wherein the initial signal is an LVDS signal or a first V-BY-ONE signal;
and sending an instruction to the signal conversion module, controlling the signal conversion module, and converting the initial signal into an HDMI signal for outputting.
Before the initial signal output by the receiver core board is received by the signal receiving module, the method further comprises the following steps:
and detecting that the initial signal output BY the core board is an LVDS signal or a first V-BY-ONE signal.
Wherein the step of converting the initial signal into an HDMI signal comprises:
converting the initial signal into a first RGB pixel signal in a serial-parallel mode;
correcting the first RGB pixel signal to obtain a second RGB pixel signal;
and converting the second RGB pixel signals into the HDMI signals in parallel and in series.
Wherein the correcting the first RGB pixel signal to obtain a second RGB pixel signal includes:
carrying out color optimization on the first RGB pixel signal to obtain a third RGB pixel signal;
and performing frame frequency conversion on the third RGB pixel signal to obtain the second RGB pixel signal.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
in the signal conversion device and the signal conversion method provided by the embodiment of the invention, the signal conversion device is respectively connected with a core board and a display of an ultra-high definition television and comprises a signal receiving module and a signal conversion module. The signal receiving module receives the initial signal output by the core board, the signal conversion module converts the initial signal into a standard HDMI signal, and the HDMI signal is output to the display. When the initial signal is an LVDS signal or a first V-BY-ONE signal, the signal receiving module is compatible with the LVDS signal or the first V-BY-ONE signal output BY different core boards, the LVDS signal or the first V-BY-ONE signal is converted into a standard HDMI signal through the signal conversion module, and then the HDMI signal is output to the display. Compared with the prior art, the technical scheme provided by the embodiment of the invention simplifies the communication mode between the core board and the display, so that the compatibility of the data interface between the core board and the display is better. The core board of the ultra-high definition television can be matched with different displays through the signal conversion device, the displays can still normally display and output, research and development personnel can debug the core board of various ultra-high definition televisions based on the displays supporting standard HDMI signals, and the production cost is reduced while the research and development efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the contents of the embodiments of the present invention and the drawings without creative efforts.
Fig. 1 is a schematic diagram of an application example of a signal conversion apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of another embodiment of a signal conversion apparatus according to the present invention;
fig. 3 is a schematic flow chart of a signal conversion method according to an embodiment of the present invention;
FIG. 4 is a flow chart of another signal conversion method according to an embodiment of the present invention;
fig. 5 is a schematic flow chart of an alternative embodiment of S430 in fig. 4.
Detailed Description
In order to make the technical problems solved, technical solutions adopted and technical effects achieved by the present invention clearer, the technical solutions of the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
To achieve correct display output when different core boards of an ultra-high definition television are matched with different displays, an embodiment of the present invention provides a signal conversion apparatus, please refer to fig. 1, which is a schematic diagram of an application embodiment of a signal conversion apparatus provided in an embodiment of the present invention.
As shown in fig. 1, the present embodiment provides a signal conversion apparatus for connecting a core board 40 of an ultra high definition television and a display 50 supporting an HDMI signal, including:
the signal receiving module 10 is connected to the core board 40, and is configured to receive an initial signal output BY the core board 40, where the initial signal is an LVDS signal or a first V-BY-ONE signal;
the signal conversion module 20 is respectively connected to the signal receiving module 10 and the display 50, and is configured to convert the initial signal into an HDMI signal according to an instruction, and output the HDMI signal to the display 50;
a Central Processing Unit (CPU) 30, communicatively connected to the signal conversion module 20, for sending an instruction to the signal conversion module 20.
In summary, in the solution of the present embodiment, the signal receiving module 10 receives the initial signal output by the core board 40, the signal converting module 20 converts the initial signal into a standard HDMI signal, and outputs the HDMI signal to the display 50. When the initial signal is an LVDS signal or a first V-BY-ONE signal, the signal receiving module 10 is compatible with receiving the LVDS signal or the first V-BY-ONE signal output BY different core boards 40, converts the LVDS signal or the first V-BY-ONE signal into a standard HDMI signal through the signal converting module 20, and outputs the HDMI signal to the display 50. Compared with the prior art, the technical scheme provided by the embodiment simplifies the communication mode between the core board 40 and the display 50, so that the compatibility of the data interface between the core board 40 and the display 50 is better, the core boards 40 of different ultra-high definition televisions can be matched with different displays 50 through the signal conversion device, the displays 50 can still normally display and output, research and development personnel can conveniently debug the core boards 40 of various ultra-high definition televisions based on the displays 50 supporting standard HDMI signals, and the production cost is reduced while the research and development efficiency is improved.
Referring to fig. 2, which is a schematic diagram of another embodiment of a signal conversion apparatus according to the present invention, based on the above embodiments, the signal conversion apparatus according to the present invention can be optimized as follows:
preferably, the signal receiving module 10 may include:
the LVDS receiver 11 is connected to the core board 40, and is configured to receive an LVDS signal when the initial signal is the LVDS signal;
and the V-BY-ONE receiver 12 is connected with the board of the movement 40 and is used for receiving the first V-BY-ONE signal when the initial signal is the first V-BY-ONE signal.
In this embodiment, the CPU30 is communicatively connected to the core board 40 (connection relation is not shown in fig. 2), the initial signals output BY the core boards 40 of different ultra high definition televisions mainly include an LVDS signal and a first V-BY-ONE signal, and when the core board 40 is powered on to output the initial signals, the CPU30 can detect the format of the initial signals, that is, detect whether the initial signals are the LVDS signals or the first V-BY-ONE signals. When the initial signal is detected to be the LVDS signal, the LVDS signal is received BY the LVDS receiver 11, and when the initial signal is detected to be the first V-BY-ONE signal, the first V-BY-ONE signal is received BY the V-BY-ONE receiver 12. The signal receiving module 10 may be compatible with the LVDS signal or the first V-BY-ONE signal output BY the board of the receiver core 40.
Preferably, the signal conversion module 20 includes:
the RGB conversion unit 21 is connected to the signal receiving module 10 and the CPU30, respectively, and configured to convert the initial signal into a first RGB pixel signal in serial-parallel according to a first RGB conversion instruction sent by the CPU 30;
the signal correction unit 22 is respectively connected with the RGB conversion unit 21 and the CPU30, and is configured to correct the first RGB pixel signals into second RGB pixel signals according to a correction instruction sent by the CPU;
an HDMI (High Definition Multimedia Interface) conversion unit, which is respectively connected to the signal correction unit 22, the CPU30 and the display 50, and is configured to convert the second RGB pixel signals into HDMI signals according to an HDMI conversion instruction sent by the CPU30 and output the HDMI signals to the display 50.
In this embodiment, the RGB converting unit 21 can convert the LVDS signal or the first V-BY-ONE signal into the 10-bit first RGB pixel signal in serial-parallel, the signal modifying unit 22 modifies the first RGB pixel signal into the 10-bit second RGB pixel signal, and the HDMI converting unit 23 converts the second RGB pixel signal into the HDMI signal and outputs the HDMI signal. The signal conversion module 20 is compatible to convert the LVDS signal or the first V-BY-ONE signal into a standard HDMI signal.
Further, the RGB converting unit 21 includes:
the LVDS decoder 211 is connected to the signal receiving module 10 and the CPU30, and configured to convert the LVDS signal into a first RGB pixel signal in a serial-parallel manner according to a first RGB conversion instruction sent by the CPU30 when the initial signal is the LVDS signal;
and the V-BY-ONE decoder 212 is connected to the signal receiving module 10 and the CPU30, and configured to convert the first V-B-ONE signal into a first RGB pixel signal in serial-parallel manner according to a first RGB conversion instruction sent BY the CPU30 when the initial signal is the first V-BY-ONE signal.
In the present embodiment, the LVDS signal is serial-to-parallel converted into a 10-bit first RGB pixel signal BY the LVDS decoder 211, and the first V-BY-ONE signal is serial-to-parallel converted into a 10-bit first RGB pixel signal BY the V-BY-ONE decoder 212. The RGB converting unit 21 is compatible with converting the LVDS signal or the first V-BY-ONE signal into the first RGB pixel signal.
It should be noted that, while the LVDS decoder 211 converts the LVDS signal into the first RGB pixel signal in a serial-parallel manner, the LVDS decoder also separates out the control signal in the LVDS signal and flows to a subsequent processing component; similarly, the V-BY-ONE decoder 212 also separates the control signal from the first V-BY-ONE signal and flows to the subsequent processing component.
Further, the signal modification unit 22 includes:
a color manager 221, connected to the RGB conversion unit 21 and the CPU30, respectively, where a video processor (not shown in fig. 2) is configured inside the color manager 221, and the video processor is configured to perform color optimization on the first RGB pixel signal in response to a color optimization instruction sent by the CPU30, so as to obtain a third RGB pixel signal;
the frame rate converter 222 is connected to the color manager 221, the RGB converting unit 21, and the CPU30, respectively, and is configured to detect frame rate information of the initial signal from the RGB converting unit 21, and perform frame rate conversion on the third RGB pixel signal according to the frame rate information and a frame rate conversion instruction sent by the CPU30 to obtain a second RGB pixel signal.
In this embodiment, a video processor configured inside the color manager 221 performs a series of color optimization operations such as color temperature adjustment, brightness adjustment, color adjustment, and sharpness adjustment on the first RGB pixel signal to obtain a third RGB pixel signal with 10 bits, and a frame frequency converter 222 performs frame frequency conversion operations such as frame interpolation and frame interpolation on the third RGB pixel signal to obtain a second RGB pixel signal, and the correction operation makes a dynamic picture clearer and smoother.
Further, the HDMI converting unit 23 includes:
the V-BY-ONE encoding sending subunit 231 is connected to the signal modifying unit 22 and the CPU30, respectively, and configured to convert the second RGB pixel signals into second V-BY-ONE signals in parallel and in series according to the V-BY-ONE encoding instruction sent BY the CPU30, and send the second V-BY-ONE signals;
a V-BY-ONE receiving and decoding subunit 232, which is respectively connected to the V-BY-ONE encoding and sending subunit 233 and the CPU30, and configured to receive a second V-BY-ONE signal, and convert the second V-BY-ONE signal into a fourth RGB pixel signal in serial-to-parallel manner according to a second RGB conversion instruction sent BY the CPU 30;
the TDMS encoding and transmitting subunit 233 is connected to the V-BY-ONE receiving and decoding subunit 232, the CPU30, and the display 50, respectively, and configured to convert the fourth RGB pixel signals into HDMI signals in parallel and in series according to the HDMI conversion instruction sent BY the CPU30, and output the HDMI signals to the display 50.
In the present embodiment, the V-BY-ONE encoding transmitting subunit 231 includes a V-BY-ONE encoder and a V-BY-ONE transmitter, the V-BY-ONE receiving and decoding subunit 232 includes a V-BY-ONE receiver and a V-BY-ONE decoder, and the TDMS encoding transmitting subunit 233 includes a TDMS encoder and an HDMI transmitter;
the second RGB pixel signal output BY the signal correction unit 22 is converted into a second V-BY-ONE signal in parallel-serial BY the V-BY-ONE encoder, and the second V-BY-ONE signal is transmitted to the V-BY-ONE receiver BY the V-BY-ONE transmitter, the second V-BY-ONE signal is converted into a fourth RGB pixel signal in serial-parallel BY the V-BY-ONE decoder, the fourth RGB pixel signal is converted into an HDMI signal in TDMS format in parallel-serial BY the TDMS encoder, and the HDMI signal is transmitted to the display 50 BY the HDMI transmitter.
It should be noted that, in the process of serial-to-parallel converting the signals, the RGB pixel signals and the control signals are separated, and in the process of parallel-to-serial converting the signals, the RGB pixel signals and the control signals are combined, where the control signals are the control signals separated from the initial signals (LVDS signals or the first V-BY-ONE signals).
Please refer to fig. 3, which is a flowchart illustrating a signal conversion method according to an embodiment of the present invention, where the method of the present embodiment is suitable for a scenario where an LVDS signal or a first V-BY-ONE signal output BY a core board of a high definition television is converted into a standard HDMI signal, and the method can be executed BY the signal conversion apparatus according to any of the embodiments described above.
As shown in fig. 3, a signal conversion method provided in this embodiment is applied to the signal conversion apparatus described in any of the above embodiments, and may include the following steps:
s310, an initial signal output BY the core board of the receiver is received through the signal receiving module and transmitted to the signal conversion module, wherein the initial signal is an LVDS signal or a first V-BY-ONE signal.
In ONE embodiment, the signal receiving module includes an LVDS receiver through which the LVDS signal is received when the core board outputs the LVDS signal, and a V-BY-ONE receiver through which the first V-BY-ONE signal is received when the core board outputs the first V-BY-ONE signal. The LVDS signal or the first V-BY-ONE signal output BY the receiver core board can be compatible through the signal receiving module.
And S320, sending an instruction to the signal conversion module, controlling the signal conversion module, and converting the initial signal into an HDMI signal to be output.
In one embodiment, the CPU sends an instruction to the signal conversion module to control the signal conversion module to perform operations such as serial-to-parallel conversion, parallel-to-serial conversion, and signal correction on the initial signal, so as to convert the initial signal into an HDMI signal in the TDMS format standard and output the HDMI signal.
In summary, in the technical solution of this embodiment, the initial signal output by the core board is received by the signal receiving module, the initial signal is converted into a standard HDMI signal by the signal converting module, and the HDMI signal is output to the display. When the initial signal is an LVDS signal or a first V-BY-ONE signal, the signal receiving module is compatible with the LVDS signal or the first V-BY-ONE signal output BY different core boards, the LVDS signal or the first V-BY-ONE signal is converted into a standard HDMI signal through the signal conversion module, and then the HDMI signal is output to the display. Compared with the prior art, the technical scheme provided by the embodiment of the invention simplifies the communication mode between the core board and the display, so that the compatibility of the data interface between the core board and the display is better. The core board of the ultra-high definition television can be matched with different displays, the displays can still normally display and output, research and development personnel can debug the core board of various ultra-high definition televisions based on the displays supporting standard HDMI signals, and the production cost is reduced while the research and development efficiency is improved.
Referring to fig. 4, which is a schematic flow chart of another signal conversion method according to an embodiment of the present invention, on the basis of the foregoing embodiment, before the initial signal output by the receiver core board of the signal receiving module, optionally, the method further includes:
and detecting that the initial signal output BY the core board is an LVDS signal or a first V-BY-ONE signal.
Optionally, as shown in fig. 5, the step of converting the initial signal into an HDMI signal includes:
converting the initial signal into a first RGB pixel signal in serial-parallel mode;
correcting the first RGB pixel signal to obtain a second RGB pixel signal;
and converting the second RGB pixel signals into HDMI signals in parallel and serial mode.
Further, the correcting the first RGB pixel signal to obtain a second RGB pixel signal includes:
carrying out color optimization on the first RGB pixel signal to obtain a third RGB pixel signal;
and performing frame frequency conversion on the third RGB pixel signal to obtain a second RGB pixel signal.
Based on the above optimization, as shown in fig. 4, another signal conversion method provided by this embodiment may specifically include the following steps:
s410, detecting that the initial signal output BY the core board is an LVDS signal or a first V-BY-ONE signal.
In ONE embodiment, the CPU is in communication connection with the core board, and after the core board is powered on, the CPU determines the format of the initial signal output BY the core board BY detecting the level, wherein the LVDS signal or the first V-BY-ONE signal may be customized to correspond to the high level or the low level.
And S420, receiving the initial signal output BY the core board of the receiver through the signal receiving module, and transmitting the initial signal to the signal conversion module, wherein the initial signal is an LVDS signal or a first V-BY-ONE signal.
In one embodiment, the receiving, by the signal receiving module, the initial signal output by the core board includes: and receiving the LVDS signals output by the core board of the receiver through the signal receiving module. Accordingly, the LVDS signal is received by the LVDS receiver in the signal receiving module.
Or in an embodiment, the receiving, by the signal receiving module, the initial signal output by the core board includes: and receiving the first V-BY-ONE signal output BY the core board of the receiver through the signal receiving module. Correspondingly, the first V-BY-ONE signal is received through a V-BY-ONE receiver in the signal receiving module.
And S430, sending an instruction to the signal conversion module, controlling the signal conversion module, and converting the initial signal into an HDMI signal for output.
In one embodiment, the signal conversion module includes an RGB conversion unit, a signal modification unit, and an HDMI conversion unit, as shown in fig. 5, the initial signal is converted into an HDMI signal and output, and the method includes the following steps:
and S531, converting the initial signal into a first RGB pixel signal in a serial-parallel mode.
S532, the first RGB pixel signal is corrected to obtain a second RGB pixel signal.
And S533, converting the second RGB pixel signals into HDMI signals in parallel and in series and outputting the HDMI signals.
Specifically, the initial signal is converted into a first RGB pixel signal in a serial-parallel manner by an RGB conversion unit; correcting the first RGB pixel signal through a signal correction unit to obtain a second RGB pixel signal; and converting the second RGB pixel signals into HDMI signals in parallel and serial mode through the HDMI conversion unit and outputting the HDMI signals.
Further, in an embodiment, the signal modification unit includes a color manager and a frame rate converter, wherein the color manager is configured with a video manager therein, and the modifying the first RGB pixel signal to obtain the second RGB pixel signal may include the following steps:
s5321, color optimization is carried out on the first RGB pixel signal to obtain a third RGB pixel signal.
S5322, performing frame rate conversion on the third RGB pixel signal to obtain a second RGB pixel signal.
Specifically, a video manager configured in the color manager performs a series of color optimization operations such as color temperature adjustment, brightness adjustment, color adjustment, definition adjustment and the like on the first RGB pixel signal to obtain a third RGB pixel signal, so that the dynamic picture is played more clearly; and performing frame frequency conversion operations such as frame interpolation and frame interpolation on the third RGB pixel signals through a frame frequency converter to obtain second RGB pixel signals, so that the dynamic picture can be played more smoothly.
In summary, the technical solution provided by the embodiment of the present invention performs signal modification operations such as color optimization and frame rate conversion on RGB pixel signals, so that the dynamic picture has clearer picture quality and smoother playing picture when playing.
It should be noted that the signal conversion method and the signal conversion apparatus belong to the same inventive concept, and details that are not described in detail in the embodiments of the signal conversion method may refer to the embodiments of the signal apparatus described above.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (4)
1. A signal conversion apparatus for connecting a core board of an ultra high definition television and a display supporting an HDMI signal, comprising:
a signal receiving module, connected to the core board, configured to receive an initial signal output BY the core board, where the initial signal is an LVDS signal or a first V-BY-ONE signal, and the signal receiving module includes: the LVDS receiver is connected with the core board and used for receiving the LVDS signals when the initial signals are LVDS signals;
the V-BY-ONE receiver is connected with the core board and used for receiving a first V-BY-ONE signal when the initial signal is the first V-BY-ONE signal;
the signal conversion module is respectively connected with the signal receiving module and the display and used for converting the initial signal into an HDMI signal according to an instruction and outputting the HDMI signal to the display, and the signal conversion module comprises:
the RGB conversion unit is respectively connected with the signal receiving module and the CPU and is used for converting the initial signal into a first RGB pixel signal in a serial-parallel mode according to a first RGB conversion instruction sent by the CPU;
the signal correction unit is respectively connected with the RGB conversion unit and the CPU and used for correcting the first RGB pixel signal into a second RGB pixel signal according to a correction instruction sent by the CPU, and the signal correction unit comprises:
the color manager is respectively connected with the RGB conversion unit and the CPU, a video processor is arranged in the color manager, and the video processor is used for responding to a color optimization instruction sent by the CPU and performing color optimization on the first RGB pixel signal to obtain a third RGB pixel signal;
the frame frequency converter is respectively connected with the color manager, the RGB conversion unit and the CPU and is used for detecting the frame frequency information of the initial signal from the RGB conversion unit and carrying out frame frequency conversion on the third RGB pixel signal according to the frame frequency information and a frame frequency conversion instruction sent by the CPU to obtain a second RGB pixel signal;
the HDMI conversion unit is respectively connected with the signal correction unit, the CPU and the display and is used for converting the second RGB pixel signal into the HDMI signal according to an HDMI conversion instruction sent by the CPU and outputting the HDMI signal to the display;
and the CPU is in communication connection with the signal conversion module and is used for sending the instruction to the signal conversion module.
2. The apparatus of claim 1, wherein the RGB conversion unit comprises:
the LVDS decoder is connected with the signal receiving module and the CPU and used for converting the LVDS signals into the first RGB pixel signals in a serial-parallel mode according to a first RGB conversion instruction sent by the CPU when the initial signals are LVDS signals;
and the V-BY-ONE decoder is connected with the signal receiving module and the CPU and is used for converting the first V-B-ONE signal into the first RGB pixel signal in a serial-parallel mode according to the first RGB conversion instruction sent BY the CPU when the initial signal is the first V-BY-ONE signal.
3. The apparatus of claim 1, wherein the HDMI converting unit comprises:
the V-BY-ONE coding sending subunit is respectively connected with the signal correction unit and the CPU and is used for converting the second RGB pixel signal into a second V-BY-ONE signal in parallel and in series according to a V-BY-ONE coding instruction sent BY the CPU and sending the second V-BY-ONE signal out;
a V-BY-ONE receiving and decoding subunit which is respectively connected with the V-BY-ONE encoding and sending subunit and the CPU and is used for receiving the second V-BY-ONE signal and converting the second V-BY-ONE signal into a fourth RGB pixel signal in serial-parallel mode according to a second RGB conversion instruction sent BY the CPU;
and the TDMS coding and transmitting subunit is respectively connected with the V-BY-ONE receiving and decoding subunit, the CPU and the display and is used for converting the fourth RGB pixel signal into the HDMI signal in parallel and in series according to the HDMI conversion instruction sent BY the CPU and outputting the HDMI signal to the display.
4. A signal conversion method applied to the signal conversion apparatus according to claim 1, comprising:
detecting that an initial signal output BY the core board is an LVDS signal or a first V-BY-ONE signal;
receiving an initial signal output BY a core board of the receiver through a signal receiving module, and transmitting the initial signal to a signal conversion module, wherein the initial signal is an LVDS signal or a first V-BY-ONE signal;
sending an instruction to the signal conversion module, controlling the signal conversion module to convert the initial signal into an HDMI signal and output the HDMI signal, wherein the step of converting the initial signal into an HDMI signal and outputting the HDMI signal comprises:
converting the initial signal into a first RGB pixel signal in a serial-parallel mode;
correcting the first RGB pixel signal to obtain a second RGB pixel signal, comprising:
carrying out color optimization on the first RGB pixel signal to obtain a third RGB pixel signal;
performing frame frequency conversion on the third RGB pixel signal to obtain a second RGB pixel signal;
and converting the second RGB pixel signals into the HDMI signals in parallel and in series and outputting the HDMI signals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710579602.0A CN107205176B (en) | 2017-07-17 | 2017-07-17 | Signal conversion device and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710579602.0A CN107205176B (en) | 2017-07-17 | 2017-07-17 | Signal conversion device and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107205176A CN107205176A (en) | 2017-09-26 |
| CN107205176B true CN107205176B (en) | 2020-12-29 |
Family
ID=59910914
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710579602.0A Active CN107205176B (en) | 2017-07-17 | 2017-07-17 | Signal conversion device and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107205176B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108012102A (en) * | 2017-12-15 | 2018-05-08 | 四川长虹电器股份有限公司 | A kind of LCD TV V-by-One turns the universal adapter plate and system of HDMI output displays |
| CN109410816A (en) * | 2018-11-23 | 2019-03-01 | 惠科股份有限公司 | Display device and driving method thereof |
| CN109618112B (en) * | 2019-02-25 | 2024-03-19 | 北京茵沃汽车科技有限公司 | Signal adapter plate for 360-degree panoramic camera |
| CN110379395A (en) * | 2019-08-14 | 2019-10-25 | 湖北亿咖通科技有限公司 | Vehicle device shows apparatus for demonstrating and method |
| CN110581963B (en) * | 2019-11-11 | 2020-04-10 | 武汉精立电子技术有限公司 | V-BY-ONE signal conversion method and device and electronic equipment |
| CN113270058B (en) * | 2021-07-21 | 2021-12-03 | 广州朗国电子科技股份有限公司 | Fault detection method, medium, product and system for spliced screen |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103152540A (en) * | 2013-03-11 | 2013-06-12 | 深圳创维－Rgb电子有限公司 | Resolution conversion method and device and ultra-high-definition television |
| CN104363405A (en) * | 2014-10-31 | 2015-02-18 | 深圳创维－Rgb电子有限公司 | Ultrahigh-definition signal conversion device and conversion method thereof |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103376401B (en) * | 2013-07-03 | 2016-08-17 | 佛山市进步科技有限公司 | A kind of method and device of automatic detection 4K2K product master control borad |
| CN103702164B (en) * | 2014-01-07 | 2018-01-16 | 深圳创维－Rgb电子有限公司 | A kind of ultra high-definition signal transferring device and network machine top box |
| CN203851223U (en) * | 2014-05-07 | 2014-09-24 | 无锡科技职业学院 | Conversion circuit converting LVDS to DVI and HDMI based on FPGA |
| US9894400B2 (en) * | 2015-05-12 | 2018-02-13 | Roku, Inc. | Profile driven communication polling for remote control |
| CN105141876B (en) * | 2015-09-24 | 2019-02-22 | 京东方科技集团股份有限公司 | Video signal conversion method, video-signal converting apparatus and display system |
| CN205510305U (en) * | 2015-12-31 | 2016-08-24 | 乐视致新电子科技（天津）有限公司 | TV core plate testing arrangement |
-
2017
- 2017-07-17 CN CN201710579602.0A patent/CN107205176B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103152540A (en) * | 2013-03-11 | 2013-06-12 | 深圳创维－Rgb电子有限公司 | Resolution conversion method and device and ultra-high-definition television |
| CN104363405A (en) * | 2014-10-31 | 2015-02-18 | 深圳创维－Rgb电子有限公司 | Ultrahigh-definition signal conversion device and conversion method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107205176A (en) | 2017-09-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107205176B (en) | Signal conversion device and method | |
| US8856840B2 (en) | Communication system, video signal transmission method, transmitter, transmitting method, receiver, and receiving method | |
| US20180310047A1 (en) | Method and Apparatus for Synchronizing Audio and Video Signals | |
| US8090030B2 (en) | Method, apparatus and system for generating and facilitating mobile high-definition multimedia interface | |
| JP5573361B2 (en) | Transmission device, reception device, transmission method, reception method, and transmission / reception device | |
| US20120044985A1 (en) | Transmission device and method of determining transmission date format | |
| JP7248068B2 (en) | Receiving device, transmitting device, receiving method and transmitting method | |
| US8730400B2 (en) | Image displaying apparatus and image processing apparatus | |
| JP6008141B2 (en) | Baseband video data transmission device, reception device, and transmission / reception system | |
| US9635303B2 (en) | Communication device and communication method | |
| CN210670381U (en) | Audio and video data sending device, receiving device and transmission system | |
| JP6471752B2 (en) | COMMUNICATION DEVICE, COMMUNICATION METHOD, AND COMPUTER PROGRAM | |
| CN101102487A (en) | Video transmission system and method based on VGA and HDMI display mode | |
| CN107566770B (en) | PG signal transmission control unit and method based on PCIe and HDMI | |
| KR100688981B1 (en) | Media Player, Control Method Thereof And Media Play System Comprising Therof | |
| CN101489075B (en) | Display signal extending apparatus and method for transmitting display signal therefor | |
| CN104240641A (en) | LED display screen control method and system | |
| CN106878650B (en) | DVI to VGA video conversion device and method thereof | |
| WO2021155869A1 (en) | Method for improving hdmi display data stream compression and interconnection | |
| WO2008032930A1 (en) | Method and apparatus for transmitting/receiving data | |
| CN212211183U (en) | Display device for separately transmitting menu signal and video signal and television | |
| JP2013132077A (en) | Transmitter, receiver, transmission method, reception method, transmission/reception system and transmission/reception method | |
| KR101334746B1 (en) | Display apparatus for displaying input video through USB connector and method thereof | |
| CN103369310A (en) | Multimedia wireless transmission method | |
| JP4839394B2 (en) | Data receiving apparatus and data receiving method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |