CN114086119A - 一种改善光学元件面形的薄膜制备方法 - Google Patents
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Abstract
本发明涉及一种改善光学元件面形的薄膜制备方法。通过具有张应力的高折射率膜层对现有薄膜应力进行匹配，减弱薄膜应力对光学元件面形的不利影响，从而改善光学元件面形。此方法显著改善了光学元件面形，并且可以减少工序，降低成本。
Description
技术领域
本实发明属于光学元件加工处理领域，具体是指一种改善光学元件面形的薄膜制备方法。
背景技术
在光学系统中最为核心的光学镜面，其面形质量的好坏直接影响光学系统的整体性能。在高能激光系统中，对单晶硅反射镜的面形要求也越来越高。我们一般用干涉仪量测的峰谷值（PV）来评价光学元件的面形。PV越小，表示光学元件面形精度越高。光学元件表面镀制薄膜的过程中，由于薄膜应力作用，光学元件会发生形变，从而对面形产生不利影响。目前的解决方法一般是非镜面镀膜进行应力平衡，从而在不影响光谱前提下改善光学元件面形。但这种方法会增加工序和成本，并且不适用于非镜面有光谱要求的光学元件，因此需要新方法来改善光学元件面形。从薄膜应力出发，减少薄膜应力对光学元件面形影响是一个很好的方向。
发明内容
本发明的目的在于提供一种改善光学元件面形的薄膜制备方法，从而降低薄膜应力对光学元件面形的不利影响。
本发明改善光学元件面形的薄膜制备方法，依次包括如下步骤：
（1）基片处理：将基片清洗或擦拭干净。
（2）镀制：利用离子束辅助沉积方式，在一定温度及低真空下，将设计的高折射率膜层（H1、H2）和低折射率膜层（L）镀制到基片。
本发明通过高折射率膜层H2对薄膜应力进行匹配，减弱薄膜应力对光学元件面形的不利影响，对改善光学元件面形有显著效果。
其中步骤（1）中所用到的基片为玻璃或晶体材料。
步骤（2）中所用基片烘烤温度为100℃-210℃，保温时间为30-60min，真空度<1.8x10-3Pa。
步骤（2）中H1和H2膜层厚度比例为0.01~100。
步骤（2）所用到的H1为压应力膜层，H2为张应力膜层；L为氧化硅或氟化镁。
本发明的有益效果：
通过具有张应力的高折射率膜层H2对现有薄膜应力进行匹配，减弱薄膜应力对光学元件的不利影响，从而改善光学元件面形。
附图说明
图1：实施例1中的膜层结构示意图
图2：对比例1中的膜层结构示意图。
具体实施方式
通过具体实施例和对比例对本发明进行进一步说明。
实施例1
（1）基片处理：通过超声波法将基片清洗干净并用异丙醇烘干。
（2）镀制：利用离子束辅助沉积方式，在210℃恒温40min，1.8x10-3Pa真空度下，将设计的如下膜系： 1.85L-1.98H2-1.99L-1.55H2-2.37L-1.39H2-2.32L-1.54H2-1.79L-0.74H2-0.99L-1.13H2-1.00L-0.79H2-1.06L-1.23H2-1.07L-0.81H2-0.92L-1.20H2-1.08L-0.90H1-0.88L-1.10H1-0.99L-0.95H1-0.99L-1.08H1-0.88L-0.93H1-1.06L-1.11H1-0.90L-0.89H1-1.08L-1.09H1-0.89L-0.91H1-1.72L（其中H2为氧化铪；H1为五氧化二钽；L为二氧化硅）
镀制到基片。
本实施例通过ZYGO干涉仪量测的PV为0.12λ@633nm。
对比例1
与实施例1中的步骤类似，不同的是步骤（2）中设计膜层为: 1.91L-2.38H1-1.27L-2.51H1-1.31L-2.43H1-1.81L-1.10H1-3.08L-0.91H1-1.01L-1.01H1-1.06L-0.91H1-0.91L-1.01H1-1.09L-0.97H1-0.90L-0.96H1-1.05L-0.98H1-1.00L-0.96H1-0.96L-0.93H1-1.06L-1.03H1-0.94L-0.80H1-2.01L（其中H1为五氧化二钽；L为二氧化硅）。
本对比例在ZYGO干涉仪量测的PV为0.39λ@633nm。
Claims (4)
1.一种改善光学元件面形的薄膜制备方法，依次包括如下步骤：
（1）基片处理：将基片清洗或擦拭干净；
（2）镀制：利用离子束辅助沉积方式，在一定温度及低真空下，将设计的高折射率膜层（H1、H2）和低折射率膜层（L）镀制到基片。
2.根据权利要求1所述的方法，其特征在于步骤（1）中所述基片是玻璃或晶体材料。
3.根据权利要求1所述的方法，其特征在于步骤（2）中H1和H2膜层厚度比例为0.01~100。
4.根据权利要求1所述的方法，其特征在于步骤（2）中H1为压应力膜层，H2为张应力膜层；L为氧化硅或氟化镁。
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