CN114048158A - General purpose GPIO port controller based on user command - Google Patents
General purpose GPIO port controller based on user command Download PDFInfo
- Publication number
- CN114048158A CN114048158A CN202111188758.9A CN202111188758A CN114048158A CN 114048158 A CN114048158 A CN 114048158A CN 202111188758 A CN202111188758 A CN 202111188758A CN 114048158 A CN114048158 A CN 114048158A
- Authority
- CN
- China
- Prior art keywords
- input
- gpio port
- output
- port
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000008054 signal transmission Effects 0.000 claims abstract description 31
- 230000006870 function Effects 0.000 claims abstract description 17
- 230000005540 biological transmission Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 3
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
Abstract
The invention discloses a general GPIO port controller based on user command, which comprises: the system comprises a microcontroller interface module (1), a working register array module (2), a command analysis and execution module (3) and an input/output GPIO port control module (4), wherein the signal transmission direction of a designated GPIO port is set to be input or output, or a plurality of designated GPIO ports are set to be in designated level states, and the system also can receive port level operation user commands sent by x80 series microcontrollers, set a designated single input/output GPIO port to be in a designated level state, and feed the current level state of the input/output GPIO port back to the x80 series microcontrollers for the inquiry and use of a user system. The invention enriches the functions of the user system and improves the flexibility of the user system for operating and using the GPIO port.
Description
Technical Field
The invention relates to a general purpose digital GPIO port controller, in particular to a general purpose GPIO port controller based on user commands.
Background
General digital Input/Output (General Purpose Input/Output) ports are a common digital Input/Output interface circuit, and a user system can configure a specific GPIO port as an Input port or an Output port according to the needs of the user system, so as to realize Input or Output of a digital signal. When the general purpose digital input/output GPIO port is used as an input port, the input signal can be processed digitally, which comprises the following steps: filtering glitches, debounce, etc., and detecting rising edges, falling edges, or levels of the input signal, and generating an interrupt request signal according to the detection result and transmitting the interrupt request signal to a microcontroller of the user system. When the general purpose digital input/output GPIO port is used as an output port, the GPIO port can be used for generating a control signal of an external circuit, switching on or off the power supply of the external circuit or starting the external circuit to perform certain operation. Meanwhile, by reading back the level state of the GPIO port, the user system can also know the working state of the external circuit and determine the subsequent action to be executed according to the working state. In addition, by utilizing the digital input/output GPIO port and monitoring a program through the microcontroller, the user system can also construct different control time sequences so as to meet the requirement of the user system on expanding a special function interface, thereby providing more flexible and convenient technical means for the design and function realization of the user system. Therefore, general purpose digital input/output GPIO ports have become a standard configuration block for microprocessors, microcontrollers, and digital signal processors, and currently, most embedded microprocessors, microcontrollers, and digital signal processors provide users with an unequal number of multifunctional general purpose digital input/output GPIO ports.
However, the number of multifunctional general purpose digital input/output GPIO ports provided by embedded microprocessors, microcontrollers, and digital signal processors is limited, and for some user systems requiring a large number of digital input/output ports, the user systems need to try to further expand the number of digital input/output GPIO ports to meet the input/output port requirements of the user systems. On the other hand, the current general purpose digital input/output GPIO controller provides a set of working registers for controlling the transmission direction of the GPIO port signal and the level state of the port. When the digital input/output GPIO port is configured to be output, the user system can directly set the digital input/output GPIO port to a required level state by writing a proper control word into the output data register/port setting register/port clearing register/port negating register, because each bit of the registers corresponds to one digital input/output GPIO port, one operation of the user system on the level of the digital input/output GPIO port is the level operation on all the digital input/output GPIO ports at the same time, when the user system only needs to perform the level operation on one specific digital input/output GPIO port, the control word written into the corresponding register must be carefully constructed to ensure that the whole operation only performs the level operation on one specific digital input/output GPIO port, without performing the same operation on the levels of other associated GPIO ports, which brings inconvenience to the user system operation using the general purpose digital input/output GPIO ports. It would clearly be advantageous to use general purpose digital input/output GPIO ports for user system operations if the digital input/output GPIO ports could provide a method of level manipulating only a single designated GPIO port.
Disclosure of Invention
The invention aims to provide a general purpose GPIO port controller based on a user command, which solves the problem that the current general purpose digital GPIO port controller can not carry out level operation on a single appointed GPIO port through single operation.
A general purpose input/output GPIO port controller based on user commands, comprising: the system comprises a microcontroller interface module, a working register array module, a command analysis and execution module and a GPIO port control module. The working register array module comprises: the device comprises a port direction register, an output data register, an input data register, a port setting register, a port clearing register, a port negation register and a user command register.
The microcontroller interface module is connected with the working register array module and the command analysis and execution module through internal connecting wires; the working register array module is connected with the command analysis and execution module and the input/output GPIO port control module through an internal connecting line; the command analysis and execution module is connected with the input/output GPIO port control module through an internal connection line.
The port direction register, the output data register, the input data register, the port setting register, the port clearing register, the port inverting register and the user command register are mutually independent memory units and are connected with the microcontroller interface module and the command analysis and execution module through internal connecting wires.
The functions of the microcontroller interface module are as follows: the x86 series microcontroller interface signal is monitored to generate register operation control signal, which is transmitted to the working register array module together with address bus signal and data bus signal, and at the same time, register write operation complete signal is generated and transmitted to the command analysis and execution module 3.
The function of the working register array module is as follows: receiving a register operation control signal, an address bus signal and a data bus signal transmitted by a microcontroller interface module, or latching the data bus signal into a register unit designated by the address bus signal, simultaneously transmitting the latched working parameters to an output command analysis and execution module and an input/output GPIO (general purpose input/output) port control module, and simultaneously transmitting a latched user command to a command analysis and execution module; or the value of the working register specified by the address bus signal is put on the data bus of the x86 series microcontroller interface for the user system to inquire and use.
The command analysis and execution module has the functions of: and receiving a register write operation completion signal output by the microcontroller interface module, analyzing user data stored in an output data register, a port setting register, a port clearing register and a port inverting register in the working register array module and a user command stored in a user command register, generating a control signal for operating the level of the input/output GPIO port, and transmitting the control signal to the input/output GPIO port control module.
The function of the input/output GPIO port control module is as follows: and receiving a control signal of the level of the operation input/output GPIO port output by the command analysis and execution module, and setting the input/output GPIO port with the signal transmission direction as output to be a specified level. When a control signal for setting the corresponding input/output GPIO port to be high level is received, setting the corresponding input/output GPIO port to be high level; when a control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level; when a control signal for setting the corresponding input/output GPIO port to be opposite level is received, setting the corresponding input/output GPIO port to be opposite level; when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, the level of the corresponding input/output GPIO port is kept unchanged.
The microcontroller interface module automatically monitors received x80 series microcontroller interface address signals, data signals and control signals, and when confirming that the x80 series microcontroller writes a general purpose GPIO port controller working register based on a user command, the microcontroller interface module automatically latches information on an x80 series microcontroller interface data bus into a working register unit designated by the x80 series microcontroller interface address bus in the working register array module, thereby setting the transmission direction of the general purpose GPIO port controller input/output GPIO port signals based on the user command and receiving the user data or the user command of the user system for carrying out level operation on the general purpose GPIO port controller input/output GPIO port based on the user command.
When a user system writes a port direction register of a general purpose GPIO port controller based on a user command, a working register array module sends corresponding register data to an input/output GPIO port control module, then the input/output GPIO port control module sets a signal transmission direction of a corresponding input/output GPIO port according to the value of each data bit of the port direction register, when the value of the data bit is 1b1, the corresponding input/output GPIO port is an input port, otherwise, when the value of the data bit is 1b0, the corresponding input/output GPIO port is an output port.
When a user system performs writing operation on an output data register of a general purpose GPIO port controller based on a user command, a working register array module sends corresponding register data to a command analyzing and executing module, then the command analyzing and executing module generates an input/output GPIO port level operation control signal according to the value of each data bit of an output data register and sends the input/output GPIO port level operation control signal to an input/output GPIO port control module, when the value of the data bit is 1b1, the generated corresponding input/output GPIO port is set to be a high level control signal, otherwise, when the value of the data bit is 1b0, the generated corresponding input/output GPIO port is set to be a low level control signal, and finally the input/output GPIO port control module operates the control signal according to the received input/output GPIO port level, and setting the input/output GPIO port with the corresponding signal transmission direction as output to be level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be high level is received, setting the corresponding input/output GPIO port to be high level, otherwise, when the control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level.
When a user system performs write operation on a port setting register of a general purpose GPIO port controller based on a user command, a working register array module sends corresponding data to a command analyzing and executing module, then the command analyzing and executing module generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port setting register and sends the control signal to an input/output GPIO port control module, when the value of the data bit is 1b1, the control signal for setting the corresponding input/output GPIO port to be high level is generated, otherwise, when the value of the data bit is 1b0, the control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and finally, the input/output port with the corresponding signal transmission direction as output is set to be the level designated by the user according to the received GPIO input/output port level operation control signal by the input/output port control module, and when a control signal for setting the corresponding input/output GPIO port to be at a high level is received, setting the corresponding input/output GPIO port to be at the high level, otherwise, when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, keeping the level of the corresponding input/output GPIO port unchanged.
When a user system performs write operation on a port clearing register of a general purpose GPIO port controller based on a user command, a working register array module sends corresponding data to a command analyzing and executing module, then the command analyzing and executing module generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port clearing register and sends the control signal to an input/output GPIO port control module, when the value of the data bit is 1b1, the control signal for setting the corresponding input/output GPIO port to be low level is generated, otherwise, when the value of the data bit is 1b0, the level of the corresponding input/output GPIO port is kept unchanged, and finally, the input/output port control module 4 operates the control signal according to the level of the received GPIO port, the input/output port with the corresponding signal transmission direction as output is set to be the level appointed by the user, and when a control signal for setting the corresponding input/output GPIO port to be at a low level is received, setting the corresponding input/output GPIO port to be at the low level, otherwise, when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, keeping the level of the corresponding input/output GPIO port unchanged.
When a user system performs write operation on a port set inverse register of a general purpose GPIO port controller based on a user command, a working register array module sends corresponding data to a command analysis and execution module, then the command analysis and execution module generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port set inverse register and sends the control signal to an input/output GPIO port control module, when the value of the data bit is 1b1, the control signal for setting the corresponding input/output GPIO port to be opposite level is generated, otherwise, when the value of the data bit is 1b0, the level of the corresponding input/output GPIO port is kept unchanged, and finally the input/output port control module operates the control signal according to the level of the received GPIO input/output port, the input/output port with the corresponding signal transmission direction as output is set to be the level appointed by the user, setting the corresponding input/output GPIO port to an opposite level when receiving a control signal setting the corresponding input/output GPIO port to the opposite level, otherwise, keeping the level of the corresponding input/output GPIO port unchanged when receiving a control signal keeping the level of the corresponding input/output GPIO port unchanged.
When a user system writes a user command register of a general purpose GPIO port controller based on a user command, a working register array module sends corresponding data to a command analysis and execution module, then the command analysis and execution module generates a control signal for operating the level of an input/output GPIO port identified by a port number in the user command register according to the value of an operation code in the user command register, when the operation code is 0xA, the control signal for setting the corresponding input/output GPIO port to be high level is generated, when the operation code is 0x5, the control signal for setting the corresponding input/output GPIO port to be low level is generated, when the operation code is 0xD, the control signal for setting the corresponding input/output GPIO port to be opposite level is generated, when the operation code is other value, the control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and sending to an input/output GPIO port control module, finally operating a control signal by the input/output GPIO port control module according to the received input/output GPIO port level, setting the input/output GPIO port with the appointed signal transmission direction as output to an appointed level, when receiving a control signal for setting the corresponding input/output GPIO port to a high level, when receiving a control signal for setting the corresponding input/output GPIO port to a low level, when receiving a control signal for setting the corresponding input/output GPIO port to an opposite level, when receiving a control signal for keeping the level of the corresponding input/output GPIO port unchanged, the corresponding input/output GPIO port level is kept unchanged.
When confirming that the x80 series microcontroller reads the general input/output GPIO port controller working register based on the user command, automatically outputting the register designated on the x80 series microcontroller interface address bus in the working register array module to the x80 series microcontroller interface data bus, thereby feeding back the values of the port direction register, the input data register, the port set register, the port clear register, the port set reverse register and the user command register to the user system for the user system to inquire and use.
After a user system reads an input data register of a general input/output GPIO port controller based on a user command, the user system knows the level state of each input/output GPIO port of the general input/output GPIO port controller based on the user command, when a certain data bit of the input data register is 1b1, the corresponding input/output GPIO port is at a high level, otherwise, when a certain data bit of the input data register is 1b0, the corresponding input/output GPIO port is at a low level, when a certain input/output GPIO port signal transmission direction is input, the port level is the signal level input to the corresponding input/output GPIO port by the user system, otherwise, when a certain input/output GPIO port signal transmission direction is output, the port level is the signal level input to the corresponding input/output GPIO port by the user system through a write output data register, otherwise, when a certain input/output GPIO port signal transmission direction is output, the port level is output, The result of the last level operation of the port setting register, the port clearing register, the port negation register or the user command register on the corresponding input/output GPIO port.
The invention fully considers the technical characteristics of an x86 series microprocessor/microcontroller/digital signal processor and the prior general purpose GPIO terminal controller, by introducing a user command register, and commands to operate on a single GPIO port level, on the basis of inheriting the functions of the existing general GPIO port controller, the GPIO port can be operated and used by a user according to the existing habits, the GPIO port level is set, cleared and negated, and the user can input user command form, the level of a single GPIO port is set, cleared and inverted, thereby enriching the method for operating the GPIO port by a user, meanwhile, the number of GPIO ports embedded in the existing x86 microcontroller/microprocessor/digital signal processor is expanded, the functions of a user system are enriched, and the flexibility of the GPIO ports used for operating the user system is improved.
Drawings
Fig. 1 is a schematic diagram of a general GPIO port controller based on a user command.
1. Microcontroller interface module 2, working register array module 3, command analysis and execution module
4. Input/output GPIO port control module
Detailed Description
A general purpose input/output GPIO port controller based on user commands, comprising: the system comprises a microcontroller interface module 1, a working register array module 2, a command analysis and execution module 3 and a GPIO port control module 4. The working register array module 2 comprises: the device comprises a port direction register, an output data register, an input data register, a port setting register, a port clearing register, a port negation register and a user command register.
The microcontroller interface module 1 is connected with the working register array module 2 and the command analysis and execution module 3 through internal connecting wires; the working register array module 2 is connected with the command analysis and execution module 3 and the input/output GPIO port control module 4 through internal connecting wires; the command analysis and execution module 3 is connected with the input/output GPIO port control module 4 through an internal connection line.
The port direction register, the output data register, the input data register, the port setting register, the port clearing register, the port inverting register and the user command register are mutually independent memory units and are connected with the microcontroller interface module 1 and the command analysis and execution module 3 through internal connecting wires.
The microcontroller interface module 1 functions as: the x86 series microcontroller interface signal is monitored to generate register operation control signal, which is transmitted to the working register array module 2 together with address bus signal and data bus signal, and at the same time, register write operation complete signal is generated and transmitted to the command analysis and execution module 3.
The function of the working register array module 2 is: receiving a register operation control signal, an address bus signal and a data bus signal transmitted by the microcontroller interface module 1, or latching the data bus signal into a register unit designated by the address bus signal, simultaneously transmitting the latched working parameters to the output command analysis and execution module 3 and the input/output GPIO port control module 4, and simultaneously transmitting the latched user command to the command analysis and execution module 3; or the value of the working register specified by the address bus signal is put on the data bus of the x86 series microcontroller interface for the user system to inquire and use.
The command parsing and executing module 3 has the following functions: receiving a register write operation completion signal output by the microcontroller interface module 1, analyzing user data stored in an output data register, a port setting register, a port clearing register and a port inverting register in the working register array module 2 and a user command stored in a user command register, generating a control signal for operating the level of an input/output GPIO port, and transmitting the control signal to the input/output GPIO port control module 4.
The input/output GPIO port control block 4 functions as: and receiving a control signal of operating the level of the input/output GPIO port output by the command analysis and execution module 3, and setting the input/output GPIO port with the signal transmission direction as output to be a specified level. When a control signal for setting the corresponding input/output GPIO port to be high level is received, setting the corresponding input/output GPIO port to be high level; when a control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level; when a control signal for setting the corresponding input/output GPIO port to be opposite level is received, setting the corresponding input/output GPIO port to be opposite level; when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, the level of the corresponding input/output GPIO port is kept unchanged.
The microcontroller interface module 1 automatically monitors the received x80 series microcontroller interface address signal, data signal and control signal, when confirming that the x80 series microcontroller writes the general purpose GPIO port controller work register based on the user command, automatically latches the information on the x80 series microcontroller interface data bus into the work register unit designated by the x80 series microcontroller interface address bus in the work register array module 2, thereby setting the transmission direction of the general purpose GPIO port controller input/output GPIO port signal based on the user command, and receiving the user data or the user command of the user system for carrying out level operation on the general purpose GPIO port controller input/output GPIO port based on the user command.
When a user system writes a port direction register of a general purpose GPIO port controller based on a user command, the working register array module 2 sends corresponding register data to the input/output GPIO port control module 4, then the input/output GPIO port control module 4 sets a signal transmission direction of a corresponding input/output GPIO port according to the value of each data bit of the port direction register, when the value of the data bit is 1b1, the corresponding input/output GPIO port is an input port, otherwise, when the value of the data bit is 1b0, the corresponding input/output GPIO port is an output port.
When a user system performs writing operation on an output data register of a general purpose GPIO port controller based on a user command, the working register array module 2 sends corresponding register data to the command analysis and execution module 3, then the command analysis and execution module 3 generates an input/output GPIO port level operation control signal according to the value of each data bit of the output data register and sends the input/output GPIO port level operation control signal to the input/output GPIO port control module 4, when the value of the data bit is 1b1, the generated corresponding input/output GPIO port is set to be a high level control signal, otherwise, when the value of the data bit is 1b0, the generated corresponding input/output GPIO port is set to be a low level control signal, and finally the input/output GPIO port control module 4 operates the control signal according to the received input/output GPIO port level, and setting the input/output GPIO port with the corresponding signal transmission direction as output to be level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be high level is received, setting the corresponding input/output GPIO port to be high level, otherwise, when the control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level.
When a user system performs write operation on a port setting register of a general purpose GPIO port controller based on a user command, a working register array module 2 sends corresponding data to a command analysis and execution module 3, then the command analysis and execution module 3 generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port setting register and sends the control signal to an input/output GPIO port control module 4, when the value of the data bit is 1b1, a control signal for setting the corresponding input/output GPIO port to be high level is generated, otherwise, when the value of the data bit is 1b0, a control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and finally the input/output GPIO port control module 4 operates the control signal according to the received level of the input/output GPIO port, and setting the input/output GPIO port with the corresponding signal transmission direction as output to be level designated by a user, when receiving a control signal for setting the corresponding input/output GPIO port to be high level, otherwise, when receiving the control signal for keeping the level of the corresponding input/output GPIO port unchanged, keeping the level of the corresponding input/output GPIO port unchanged.
When a user system writes a port clearing register of a general purpose GPIO port controller based on a user command, a working register array module 2 sends corresponding data to a command analyzing and executing module 3, then the command analyzing and executing module 3 generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port clearing register and sends the control signal to an input/output GPIO port control module 4, when the value of the data bit is 1b1, the control signal for setting the corresponding input/output GPIO port to be low level is generated, otherwise, when the value of the data bit is 1b0, the control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and finally the input/output GPIO port control module 4 operates the control signal according to the received input/output GPIO port level, and setting the input/output GPIO port with the corresponding signal transmission direction as output to be level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level, otherwise, when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, keeping the level of the corresponding input/output GPIO port unchanged.
When a user system performs write operation on a port inversion register of a general purpose GPIO port controller based on a user command, a working register array module 2 sends corresponding data to a command analysis and execution module 3, then the command analysis and execution module 3 generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port inversion register and sends the control signal to an input/output GPIO port control module 4, when the value of the data bit is 1b1, a control signal for setting the corresponding input/output GPIO port to be opposite level is generated, otherwise, when the value of the data bit is 1b0, a control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and finally the input/output GPIO port control module 4 operates the control signal according to the received input/output GPIO port level, and setting the input/output GPIO port with the corresponding signal transmission direction as output to be level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be opposite level is received, setting the corresponding input/output GPIO port to be opposite level, otherwise, when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, keeping the level of the corresponding input/output GPIO port unchanged.
When a user system writes a user command register of a general purpose GPIO port controller based on a user command, the working register array module 2 sends corresponding data to the command analysis and execution module 3, then the command analysis and execution module 3 generates a control signal for operating the level of an input/output GPIO port identified by a port number in the user command register according to the value of an operation code in the user command register, when the operation code is 0xA, the control signal for setting the corresponding input/output GPIO port to a high level is generated, when the operation code is 0x5, the control signal for setting the corresponding input/output GPIO port to a low level is generated, when the operation code is 0xD, the control signal for setting the corresponding input/output GPIO port to an opposite level is generated, when the operation code is other value, the control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and sent to the input/output GPIO port control module 4, and finally the input/output GPIO port control module 4 operates the control signal according to the received input/output GPIO port level, sets the input/output GPIO port whose transmission direction of the designated signal is output to a designated level, sets the corresponding input/output GPIO port to a high level when receiving the control signal that sets the corresponding input/output GPIO port to a high level, sets the corresponding input/output GPIO port to a low level when receiving the control signal that sets the corresponding input/output GPIO port to a low level, sets the corresponding input/output GPIO port to an opposite level when receiving the control signal that sets the corresponding input/output GPIO port to an opposite level, sets the corresponding input/output GPIO port to an opposite level when receiving the control signal that keeps the level of the corresponding input/output GPIO port unchanged, the corresponding input/output GPIO port level is kept unchanged.
When confirming that the x80 series microcontroller reads the general input/output GPIO port controller working register based on the user command, the register designated on the x80 series microcontroller interface address bus in the working register array module 2 is automatically output to the x80 series microcontroller interface data bus, thereby feeding back the values of the port direction register, the input data register, the port set register, the port clear register, the port set reverse register and the user command register to the user system for the user system to inquire and use.
After a user system reads an input data register of a general input/output GPIO port controller based on a user command, the user system knows the level state of each input/output GPIO port of the general input/output GPIO port controller based on the user command, when a certain data bit of the input data register is 1b1, the corresponding input/output GPIO port is at a high level, otherwise, when a certain data bit of the input data register is 1b0, the corresponding input/output GPIO port is at a low level, when a certain input/output GPIO port signal transmission direction is input, the port level is the signal level input to the corresponding input/output GPIO port by the user system, otherwise, when a certain input/output GPIO port signal transmission direction is output, the port level is the signal level input to the corresponding input/output GPIO port by the user system through a write output data register, otherwise, when a certain input/output GPIO port signal transmission direction is output, the port level is output, The result of the last level operation of the port setting register, the port clearing register, the port negation register or the user command register on the corresponding input/output GPIO port.
Claims (6)
1. A general purpose input/output GPIO port controller based on user commands, comprising: the system comprises a microcontroller interface module (1), a working register array module (2), a command analysis and execution module (3) and an input/output GPIO port control module (4);
the microcontroller interface module (1) is connected with the working register array module (2) and the command analysis and execution module (3) through internal connecting wires; the working register array module (2) is connected with the command analysis and execution module (3) and the input/output GPIO port control module (4) through internal connecting wires; the command analysis and execution module (3) is connected with the input/output GPIO port control module (4) through an internal connection line;
the control signal of the input/output GPIO port level sets the input/output GPIO port with the signal transmission direction as the output as the designated level; when a control signal for setting the corresponding input/output GPIO port to be high level is received, setting the corresponding input/output GPIO port to be high level; when a control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level; when receiving an x80 series microcontroller interface address signal, a data signal and a control signal which are automatically monitored by a corresponding input/output GPIO microcontroller interface module (1) and received, when confirming that an x80 series microcontroller writes a general purpose GPIO port controller working register based on a user command, automatically latching information on an x80 series microcontroller interface data bus into a working register unit which is designated by an x80 series microcontroller interface address bus in a working register array module (2), thereby setting the transmission direction of the general purpose GPIO port controller input/output GPIO port signal based on the user command, and receiving the user data or the user command which is used by a user system to carry out level operation on the general purpose GPIO port controller input/output GPIO port based on the user command;
the method comprises the following steps that a microcontroller interface module (1) automatically monitors received x80 series microcontroller interface address signals, data signals and control signals, when it is confirmed that an x80 series microcontroller writes a general purpose GPIO port controller working register based on a user command, information on an x80 series microcontroller interface data bus is automatically latched into a working register unit designated by an x80 series microcontroller interface address bus in a working register array module (2), so that the transmission direction of the general purpose GPIO port controller input/output GPIO port signals based on the user command is set, and user data or the user command of a user system for carrying out level operation on an input/output GPIO port of the general purpose GPIO port controller based on the user command is received;
when a user system writes a port direction register of a general purpose GPIO port controller based on a user command, a working register array module (2) sends corresponding register data to an input/output GPIO port control module (4), then the input/output GPIO port control module (4) sets a signal transmission direction of a corresponding input/output GPIO port according to the value of each data bit of a port direction register, when the value of the data bit is 1b1, the corresponding input/output GPIO port is an input port, otherwise, when the value of the data bit is 1b0, the corresponding input/output GPIO port is an output port;
when a user system writes an output data register of a general purpose GPIO port controller based on a user command, a working register array module (2) sends corresponding register data to a command analysis and execution module (3), then the command analysis and execution module (3) generates an input/output GPIO port level operation control signal according to the value of each data bit of an output data register and sends the input/output GPIO port level operation control signal to an input/output GPIO port control module (4), when the value of the data bit is 1b1, the generated corresponding input/output GPIO port is set to be a high level control signal, otherwise, when the value of the data bit is 1b0, the generated corresponding input/output GPIO port is set to be a low level control signal, and finally the input/output GPIO port control module (4) operates the control signal according to the received input/output port level, setting an input/output GPIO port of which the corresponding signal transmission direction is output to be a level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be a high level is received, setting the corresponding input/output GPIO port to be the high level, otherwise, when the control signal for setting the corresponding input/output GPIO port to be a low level is received, setting the corresponding input/output GPIO port to be the low level;
when a user system writes a port setting register of a general purpose GPIO port controller based on a user command, a working register array module (2) sends corresponding data to a command analysis and execution module (3), then the command analysis and execution module (3) generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port setting register and sends the control signal to an input/output GPIO port control module (4), when the value of the data bit is 1b1, a control signal for setting the corresponding input/output port to be high level is generated, otherwise, when the value of the data bit is 1b0, a control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and finally the input/output GPIO port control module (4) operates the control signal according to the received input/output GPIO port level, setting an input/output GPIO port of which the corresponding signal transmission direction is output to be a level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be a high level is received, setting the corresponding input/output GPIO port to be the high level, otherwise, when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, keeping the level of the corresponding input/output GPIO port unchanged;
when a user system writes a port clearing register of a general purpose GPIO port controller based on a user command, a working register array module (2) sends corresponding data to a command analyzing and executing module (3), then the command analyzing and executing module 3 generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port clearing register and sends the control signal to an input/output GPIO port control module (4), when the value of the data bit is 1b1, a control signal for setting the corresponding input/output port to be low level is generated, otherwise, when the value of the data bit is 1b0, a control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and finally the input/output GPIO port control module (4) operates the control signal according to the received input/output GPIO port level, setting an input/output GPIO port with the corresponding signal transmission direction as output to be a level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level, otherwise, when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, keeping the level of the corresponding input/output GPIO port unchanged;
when a user system writes a port inversion register of a general purpose GPIO port controller based on a user command, a working register array module (2) sends corresponding data to a command analysis and execution module (3), then the command analysis and execution module (3) generates a control signal for operating the level of an input/output GPIO port according to the value of each data bit of the port inversion register and sends the control signal to an input/output GPIO port control module (4), when the value of the data bit is 1b1, a control signal for setting the corresponding input/output GPIO port to be opposite level is generated, otherwise, when the value of the data bit is 1b0, a control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and finally the input/output GPIO port control module (4) operates the control signal according to the received level of the input/output GPIO port, setting an input/output GPIO port with the corresponding signal transmission direction as output to be level designated by a user, when a control signal for setting the corresponding input/output GPIO port to be opposite level is received, setting the corresponding input/output GPIO port to be opposite level, otherwise, when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, keeping the level of the corresponding input/output GPIO port unchanged;
when a user system writes a user command register of a general purpose GPIO port controller based on a user command, a working register array module (2) sends corresponding data to a command analysis and execution module (3), then the command analysis and execution module (3) generates a control signal for operating the level of an input/output GPIO port identified by a port number in the user command register according to the value of an operation code in the user command register, when the operation code is 0xA, the control signal for setting the corresponding input/output GPIO port to be high level is generated, when the operation code is 0x5, the control signal for setting the corresponding input/output GPIO port to be low level is generated, when the operation code is 0xD, the control signal for setting the corresponding input/output GPIO port to be opposite level is generated, when the operation code is other value, the control signal for keeping the level of the corresponding input/output GPIO port unchanged is generated, and sending to an input/output GPIO port control module (4), finally operating a control signal by the input/output GPIO port control module (4) according to the received input/output GPIO port level, setting the input/output GPIO port with the designated signal transmission direction as output to a designated level, when receiving a control signal for setting the corresponding input/output GPIO port to a high level, when receiving a control signal for setting the corresponding input/output GPIO port to a low level, when receiving a control signal for setting the corresponding input/output GPIO port to an opposite level, when receiving a control signal for keeping the level of the corresponding input/output GPIO port unchanged, keeping the level of the corresponding input/output GPIO port unchanged;
when confirming that the x80 series microcontroller reads the general input/output GPIO port controller working register based on the user command, automatically outputting the register designated on the x80 series microcontroller interface address bus in the working register array module (2) to the x80 series microcontroller interface data bus, thereby feeding back the values of the port direction register, the input data register, the port set register, the port clear register, the port reverse register and the user command register to the user system for the user system to inquire and use;
after a user system reads an input data register of a general input/output GPIO port controller based on a user command, the user system knows the level state of each input/output GPIO port of the general input/output GPIO port controller based on the user command, when a certain data bit of the input data register is 1b1, the corresponding input/output GPIO port is at a high level, otherwise, when a certain data bit of the input data register is 1b0, the corresponding input/output GPIO port is at a low level, when a certain input/output GPIO port signal transmission direction is input, the port level is the signal level input to the corresponding input/output GPIO port by the user system, otherwise, when a certain input/output GPIO port signal transmission direction is output, the port level is the signal level input to the corresponding input/output GPIO port by the user system through a write output data register, otherwise, when a certain input/output GPIO port signal transmission direction is output, the port level is output, The result of the last level operation of the port setting register, the port clearing register, the port negation register or the user command register on the corresponding input/output GPIO port.
2. A user command based general purpose input/output GPIO port controller according to claim 1 characterized in that said working register array module (2) comprises: the device comprises a port direction register, an output data register, an input data register, a port setting register, a port clearing register, a port negation register and a user command register; the port direction register, the output data register, the input data register, the port setting register, the port clearing register, the port inverting register and the user command register are mutually independent memory units and are connected with the microcontroller interface module (1) and the command analysis and execution module (3) through internal connecting wires.
3. A user command based general purpose input/output GPIO port controller according to claim 1 characterized in that said microcontroller interface module (1) functions as: the x86 series microcontroller interface signal is monitored, a register operation control signal is generated and is transmitted to the working register array example module (2) together with an address bus signal and a data bus signal, and meanwhile, a register write operation completion signal is generated and is transmitted to the command analysis and execution module (3).
4. A user command based general purpose input/output GPIO port controller according to claim 1 characterized in that said working register array block (2) functions as: receiving a register operation control signal, an address bus signal and a data bus signal transmitted by a microcontroller interface module (1), or latching the data bus signal into a register unit designated by the address bus signal, simultaneously transmitting the latched working parameters to a command analysis and execution module (3) and an input/output GPIO port control module (4), and simultaneously transmitting the latched user command to the command analysis and execution module (3); or the value of the working register specified by the address bus signal is put on the data bus of the x86 series microcontroller interface for the user system to inquire and use.
5. A user command based general purpose input/output GPIO port controller according to claim 1 characterized in that said command parsing and execution module (3) functions as: and receiving a register write operation completion signal output by the microcontroller interface module (1), analyzing user data stored in an output data register, a port setting register, a port clearing register and a port inverting register in the working register array module (2) and a user command stored in a user command register, generating a control signal for operating the level of an input/output GPIO port, and transmitting the control signal to the input/output GPIO port control module (4).
6. A user command based general purpose input/output GPIO port controller according to claim 1 characterized in that said input/output GPIO port control module (4) functions as: receiving a control signal of the level of an operation input/output GPIO port output by the command analysis and execution module (3), and setting the input/output GPIO port with the signal transmission direction as output to be a designated level; when a control signal for setting the corresponding input/output GPIO port to be high level is received, setting the corresponding input/output GPIO port to be high level; when a control signal for setting the corresponding input/output GPIO port to be low level is received, setting the corresponding input/output GPIO port to be low level; when a control signal for setting the corresponding input/output GPIO port to be opposite level is received, setting the corresponding input/output GPIO port to be opposite level; when the control signal for keeping the level of the corresponding input/output GPIO port unchanged is received, the level of the corresponding input/output GPIO port is kept unchanged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111188758.9A CN114048158A (en) | 2021-10-12 | 2021-10-12 | General purpose GPIO port controller based on user command |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111188758.9A CN114048158A (en) | 2021-10-12 | 2021-10-12 | General purpose GPIO port controller based on user command |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114048158A true CN114048158A (en) | 2022-02-15 |
Family
ID=80204589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111188758.9A Pending CN114048158A (en) | 2021-10-12 | 2021-10-12 | General purpose GPIO port controller based on user command |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114048158A (en) |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1707403A (en) * | 2004-06-09 | 2005-12-14 | 上海华博科技（集团）有限公司 | Input and output interface controller |
| CN101377764A (en) * | 2008-09-12 | 2009-03-04 | 北京中星微电子有限公司 | Allocating system of GPIO and data communicating method thereof |
| US20140075066A1 (en) * | 2012-09-10 | 2014-03-13 | Atmel Corporation | Low-power modes of microcontroller operation with access to configurable input/output connectors |
| CN104144137A (en) * | 2014-08-12 | 2014-11-12 | 北京控制与电子技术研究所 | High-speed LVDS serial synchronization communication controller |
| CN206975631U (en) * | 2017-05-12 | 2018-02-06 | 葛松芬 | A kind of universal input output timing processor |
| CN110895518A (en) * | 2019-07-01 | 2020-03-20 | 研祥智能科技股份有限公司 | GPIO (general purpose input/output) interface configuration method and system |
| CN112579495A (en) * | 2020-12-25 | 2021-03-30 | 上海东软载波微电子有限公司 | GPIO controller |
| CN112685349A (en) * | 2019-09-26 | 2021-04-20 | 深圳比亚迪微电子有限公司 | Bit operation control system and method with variable bit width |
-
2021
- 2021-10-12 CN CN202111188758.9A patent/CN114048158A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1707403A (en) * | 2004-06-09 | 2005-12-14 | 上海华博科技（集团）有限公司 | Input and output interface controller |
| CN101377764A (en) * | 2008-09-12 | 2009-03-04 | 北京中星微电子有限公司 | Allocating system of GPIO and data communicating method thereof |
| US20140075066A1 (en) * | 2012-09-10 | 2014-03-13 | Atmel Corporation | Low-power modes of microcontroller operation with access to configurable input/output connectors |
| CN104144137A (en) * | 2014-08-12 | 2014-11-12 | 北京控制与电子技术研究所 | High-speed LVDS serial synchronization communication controller |
| CN206975631U (en) * | 2017-05-12 | 2018-02-06 | 葛松芬 | A kind of universal input output timing processor |
| CN110895518A (en) * | 2019-07-01 | 2020-03-20 | 研祥智能科技股份有限公司 | GPIO (general purpose input/output) interface configuration method and system |
| CN112685349A (en) * | 2019-09-26 | 2021-04-20 | 深圳比亚迪微电子有限公司 | Bit operation control system and method with variable bit width |
| CN112579495A (en) * | 2020-12-25 | 2021-03-30 | 上海东软载波微电子有限公司 | GPIO controller |
Non-Patent Citations (1)
| Title |
|---|
| 胡宗棠 等: "构件化ColdFire 系列MCUs 通用GPIO 驱动设计", 《微计算机信息》 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104866452B (en) | Multi-serial extension method based on FPGA and TL16C554A | |
| US20040010773A1 (en) | Method and apparatus for displaying debug codes of a baisc input/output system | |
| CN107678988A (en) | A kind of multifunctional serial port device and implementation method | |
| JPH09204253A (en) | Multi-purpose keyboard interface | |
| CN115033444B (en) | 8051 core-based online debugging circuit control device | |
| CN107526614B (en) | Communication method of FPGA development board | |
| CN110399328B (en) | Control method and device for board-mounted graphics processor | |
| JPS6239580B2 (en) | ||
| CN110120877B (en) | Configuration circuit of exchange chip and configuration method of parameters of exchange chip | |
| CN109859454B (en) | Infrared code sending circuit, chip, remote control equipment and air conditioner based on infrared protocol | |
| CN113946480A (en) | Detection device and method for I2C bus | |
| CN114048158A (en) | General purpose GPIO port controller based on user command | |
| CN113064709A (en) | Task scheduling method and system suitable for MCU chip | |
| CN113625854A (en) | Mainboard power-on control system, method and device and readable storage medium | |
| CN107577574B (en) | Debugging switching circuit and debugging circuit board | |
| CN109189705B (en) | USB extension method, device, equipment, storage medium and system | |
| CN109408151B (en) | Automatic switching device and switching method for configuration mode of field programmable gate array | |
| CN113064833A (en) | Single chip microcomputer simulation method, system, device, equipment and storage medium | |
| CN107402898B (en) | Information processing method and electronic equipment | |
| CN106936518B (en) | Measuring device with bidirectional IO function | |
| KR100922812B1 (en) | Method and system for controlling of peripherals | |
| KR100386199B1 (en) | Improvements and Methods Using Processors, and Portable Electronic Devices | |
| CN115422110B (en) | Port configuration method of electronic equipment and PCIE Switch chip | |
| CN216053016U (en) | Different data bus signal access system | |
| CN218768136U (en) | Device for switching I2C bus by using programmable logic device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20220215 |
|
| WD01 | Invention patent application deemed withdrawn after publication |