CN114035022A - Test tool and test system of chip - Google Patents

Abstract

The application discloses a test tool for a chip, which comprises an objective table, wherein a positioning part and an alignment mark are formed on the objective table, the positioning part is used for positioning the chip to be tested and exposing a light port of the chip, and the alignment mark is used for horizontal position calibration of test equipment and the chip positioned on the positioning part; and the deflector is used for changing the direction of the light beam so as to couple the coupling optical fiber of the test equipment with the chip positioned on the positioning part. The application also discloses a test system of the chip. The application provides a test fixture and test system of chip can realize wafer level on-line test and the quick ageing of chip, easy operation, degree of automation height.

Description

Test tool and test system of chip

Technical Field

The application relates to the field of chip testing, in particular to a test tool and a test system for a chip.

Background

At present, a photoelectronic chip is taken as an example for testing a chip, and an on-line test of the photoelectronic chip is usually carried out through a single chip, and the photoelectronic chip has early failure in relation to the epitaxy of a heterogeneous material, so that the photoelectronic chip needs to be subjected to rapid aging treatment.

Disclosure of Invention

In view of this, the embodiments of the present application are expected to provide a testing tool and a testing system for a chip, so as to solve the problems of difficulty in on-line testing and rapid aging of the chip.

In order to achieve the above purpose, the technical solution of the embodiment of the present application is implemented as follows:

one aspect of the embodiment of the application discloses a test fixture of chip, includes:

the test device comprises an object stage, a positioning part and an alignment mark, wherein the object stage is provided with the positioning part and the alignment mark, the positioning part is used for positioning a chip to be tested and exposing a light port of the chip, and the alignment mark is used for horizontal position calibration of a test device and the chip positioned on the positioning part; and

the deflector is used for changing the direction of the light beam so as to couple the coupling optical fiber of the test equipment with the chip positioned on the positioning part.

Further, the test fixture further comprises:

the limiting mechanism is movably arranged on the objective table and used for fixing the chip on the positioning part.

Further, be formed with on the objective table with the spacing groove of location portion intercommunication, stop gear includes:

the limiting piece is movably arranged in the limiting groove and used for abutting against the chip to the positioning part, and the deflector is arranged on the limiting piece and can move along with the limiting piece;

and the limiting shaft assembly is arranged on the objective table and used for driving the limiting part to move.

Further, the locating part is spacing rack, spacing axle subassembly includes:

a limiting shaft;

the limiting gear is arranged on the limiting shaft and is used for being meshed with the limiting rack; and

the limiting bearing is arranged on the object stage in a penetrating mode and used for supporting the limiting shaft to rotate.

Furthermore, the number of the positioning parts is at least one, and the alignment marks and the positioning parts are arranged in a one-to-one correspondence manner.

Furthermore, the positioning portion is a positioning groove, the depth of the positioning groove is smaller than the thickness of the chip, and the positioning groove is arranged facing the opening at one end of the deflector, so that the light opening of the chip arranged in the positioning groove is exposed.

Further, the test tool further comprises a thermistor, and the thermistor is attached to the objective table.

Further, the deflector is a mirror or a triple prism.

Further, the deflector is made of an elemental semiconductor, an oxide, a polymer or a metal.

Further, the object stage is configured to be in a shape adapted to a wafer, and the number and the positions of the positioning portions are arranged corresponding to the number and the positions of the chips in the wafer.

In another aspect of the embodiments of the present application, a chip testing system is disclosed, which includes:

the test fixture of any one of the above; and

and the test equipment is used for testing the chip arranged on the test tool.

Further, the test apparatus includes:

and the coupling optical fiber is positioned above the deflector and used for emitting a test light beam to pass through the deflector and then be coupled with the chip on the positioning part.

The embodiment of the application discloses a test fixture and test system of chip through setting up objective table and deflector, is formed with location portion and alignment mark on the objective table, accomplishes the location and the calibration of horizontal position to the chip, and is convenient high-efficient, and degree of automation is high, can realize the on-line test of chip.

Drawings

FIG. 1 is a schematic structural diagram of a test fixture for a chip;

FIG. 2 is a schematic diagram of a chip testing system;

FIG. 3 is an enlarged schematic view at A in FIG. 1;

FIG. 4 is a schematic view of a portion of the stop mechanism shown in FIG. 1;

fig. 5 is a partial schematic view of the stopper mechanism shown in fig. 1 from another perspective.

Description of the reference numerals

Testing the tool 1; an object stage 11; a positioning portion 111; a positioning groove 111 a; a first side 1111; an opening 1112; a second side 1113; the third side 1114; a fourth side 1115; an alignment mark 112; a limiting groove 113; a deflector 12; a mirror 12 a; a second light path 121; a limiting mechanism 13; a stopper 131; a limit rack 131 a; a spacing shaft assembly 132; a stopper shaft 1321; limit gears 1322; a limit bearing 1323; a thermistor 14; a test device 2; a coupling fiber 21; a first light path 211; a probe card 22; a probe 221; and a chip 3.

Detailed Description

It should be noted that, in the present application, technical features in examples and embodiments may be combined with each other without conflict, and the detailed description in the specific embodiment should be understood as an explanation of the gist of the present application and should not be construed as an improper limitation to the present application.

The present application will be described in further detail with reference to the following drawings and specific embodiments. The descriptions of "first," "second," etc. in the embodiments of the present application are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly including at least one feature. In the description of the embodiments of the present application, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

In chip testing, such as electronic chips, optoelectronic chips, and the like, specifically, in optoelectronic chip testing, wafer level testing can be performed in a large batch, but most of the wafer level testing is performed based on a grating test structure to evaluate the performance of a real device, while the current wafer level testing cannot be performed on the performance of the real device at first, even if the real device can be tested through a grating, the spectral line caused by grating diffraction affects the accuracy of the testing.

For the existing stage that the photoelectron chip relates to the epitaxy of heterogeneous materials, lattice constant mismatch among materials and the like can be caused, and the photoelectron chip needs to be subjected to online test and rapid aging treatment in the process. The on-line test is to screen whether the performance of the chip can meet the application requirement; fast aging refers to early screening of the working life (reliability) of the chip, and removing the chips which are easy to fail in the early stage. Rapid aging is typically an accelerated life test, for example, at a voltage of 20% above the operating voltage (test voltage), at a temperature typically above 85 ℃, and for 48 hours or 100 hours on power. The test equipment generally includes a coupling fiber, a probe card, and a microscope.

Referring to fig. 1 to 3, in one aspect of the present disclosure, a test tool 1 for a chip includes a stage 11 and a deflector 12. The objective table 11 is formed with a positioning portion 111 and an alignment mark 112, the positioning portion 111 is used for positioning the chip 3 to be tested and exposing the light port of the chip 3; the alignment mark 112 is used for horizontal position calibration of the test apparatus 2 with the chip 3 located on the positioning portion 111, and for example, the coupling fiber 21 of the test apparatus 2, the probe 221 on the probe card 22, or a microscope can be horizontally position calibrated with the chip 3. The deflector 12 is provided on the stage 11 for changing the direction of the light beam, and enables the coupling fiber 21 of the test device 2 to be coupled with the chip 3 positioned on the positioning portion 111.

The above "positioning portion 111 is used for positioning the chip 3 to be tested" means that the positioning portion 111 may fix the chip 3 to be tested, or the positioning portion 111 may limit the chip 3 to be tested, and the chip 3 may be fixed by combining with other components (for example, the limiting mechanism 13 mentioned below).

This embodiment provides the support for the test of chip 3 through setting up objective table 11, is formed with location portion 111 and alignment mark 112 on the objective table 11, can accomplish the location and the calibration of horizontal position to chip 3, and the online test of chip can be realized to cooperation deflector 12, and the test is convenient high-efficient, degree of automation is high. The test fixture of the embodiment can be repeatedly used, and the test cost is reduced.

In one embodiment, the number of the positioning portions 111 is at least one, and may be, for example, one, two, or more than two. When there is one positioning portion 111, on-line testing of a single chip 3 can be realized. When the number of the positioning portions 111 is plural, the on-line test can be simultaneously performed on a plurality of chips 3 in a batch.

In an embodiment, the alignment marks 112 and the positioning portions 111 may be disposed in a one-to-one correspondence, that is, each positioning portion 111 corresponds to each alignment mark 112. Each positioning part 111 is provided with an alignment mark 112, so that the horizontal position calibration precision of the testing device 2 and the chip 3 positioned on the positioning part 111 is improved, and the testing of a plurality of testing devices 2 corresponding to the chips 3 on the plurality of positioning parts 111 can be realized simultaneously. Of course, if a single testing device 2 continuously tests a plurality of chips 3, only a small number of alignment marks 112 may be provided, and after the testing device 2 and the chip 3 having the alignment marks 112 are subjected to horizontal position calibration, the testing device 2 is moved by a corresponding distance according to the distance between the positioning portions 111, so as to align the chips 3 on the other positioning portions 111.

Further, when the alignment marks 112 are disposed in one-to-one correspondence with the positioning portions 111, the alignment marks 112 may also have numbers, which facilitates the test equipment 2 to record corresponding chip 3 information. For example, when there is an early failure in the testing of the chip 3, the testing apparatus 2 records the number of the alignment mark 112 corresponding to the chip 3, so as to facilitate the screening at a later stage.

Further, the alignment mark 112 may be located at any suitable position on the stage 11 as long as the test device 2 can perform horizontal position calibration of the chip 3 located on the positioning portion 111 through the alignment mark 112. For example, the alignment mark 112 may be located on the stage 11 at the first side 1111 near the positioning part 111.

In an embodiment, the positioning portion 111 may be a positioning groove 111 a. Specifically, the depth of the positioning groove 111a is smaller than the thickness of the chip 3, and the chip 3 is exposed out of the positioning groove 111a, so that the chip 3 can be conveniently clamped by the clamping tool. The degree of depth of constant head tank 111a also can be more than or equal to chip 3's thickness, and at this moment, for making things convenient for clamping tool centre gripping chip 3, can set up the ear groove in constant head tank 111a both sides for the space is dodged in the time of the clamping tool operation to the provision.

Further, the positioning groove 111a is provided facing the opening 1112 at one end of the deflector 12. Referring to fig. 3, the opening of the seating groove 111a is disposed at the second side 1113 of the seating groove 111a to expose the light opening of the chip 3 disposed in the seating groove 111 a.

In one embodiment, the positioning portion 111 may be an air hole formed on the stage 11, and the size of the air hole is smaller than that of the chip 3. For example, the chip 3 is placed on the air hole, and the air pump connected to the air hole is started, so that the chip 3 can be adsorbed on the stage 11 due to the suction force provided by the air pump, and the chip 3 can be fixed.

In one embodiment, the positioning portion 111 may be an adhesive strip or an adhesive layer.

In an embodiment, referring to fig. 4 and 5, the test fixture 1 further includes a limiting mechanism 13, and the limiting mechanism 13 is movably disposed on the stage 11 and is used for fixing the chip 3 on the positioning portion 111.

Specifically, a limit groove 113 communicating with the positioning portion 111 is formed on the stage 11, and the limit mechanism 13 includes a limit piece 131 and a limit shaft assembly 132; the limiting member 131 is movably disposed in the limiting groove 113 for abutting against the chip 3 in the positioning portion 111, and the deflector 12 may be disposed on the limiting member 131 and be capable of following the limiting member 131 to move. For example, the positioning portion 111 is a positioning groove 111a, the limiting groove 113 is communicated with the positioning groove 111a, and the limiting member 131 is used for abutting against the chip 3 in the positioning groove 111 a. The limiting shaft assembly 132 is disposed on the stage 11 and is used for driving the limiting member 131 to move.

In the present embodiment, the chip 3 is fixed in the positioning groove 111a by using the stopper mechanism 13, and the height of the input/output waveguide of the chip 3 can be controlled so that the waveguide can be aligned with the light beam passing through the deflector 12. The deflector 12 is disposed on the limiting member 131, so that the distance between the deflector 12 and the chip 3 can be maintained, and better coupling efficiency between the chip 3 and the deflector 12 is ensured.

In one embodiment, the limiting member 131 may be a limiting rack 131 a; the limiting shaft 1321 assembly 132 includes a limiting shaft 1321, a limiting gear 1322, and a limiting bearing 1323. The limit gear 1322 is arranged on the limit shaft 1321 and is used for being meshed with the limit rack 131 a; the limit bearing 1323 penetrates through the limit bearing 1323, and the limit bearing 1323 is arranged on the objective table 11 and used for supporting the limit shaft 1321 to rotate.

Specifically, the limit bearings 1323 may be disposed at both sides of the stage 11 in the axial direction of the limit shaft 1321, and support the limit shaft 1321 to rotate. For example, the limiting shaft 1321 is rotated to drive the limiting gear 1322 to rotate, the limiting gear 1322 is engaged with the limiting rack 131a, and the limiting rack 131a moves in the limiting groove 113, so that the chip 3 is pushed to move into the positioning groove 111a, and after three sides of the to-be-positioned groove 111a are contacted with three sides of the chip 3, the chip 3 is fixed. The limiting shaft 1321 may be rotated in such a manner that the shaft end of the limiting shaft 1321 is formed into an inner hexagon, and the limiting shaft 1321 is driven to rotate by an inner hexagon wrench; the rotation of the stopper shaft 1321 may be driven by a motor.

Further, the upper surface of the limiting rack 131a is lower than the second light path 121, so as to avoid blocking the light port of the chip 3 and affecting the optical coupling.

In the embodiment, the limit bearing 1323 is arranged for supporting the limit shaft 1321 to rotate, so that the friction coefficient in the movement process is reduced, the rotation precision is improved, and the movement precision of the limit rack 131a and the optical coupling ratio of the chip 3 are improved by meshing the limit shaft 1321 with the limit gear 1322.

In an embodiment, the limiting shaft 1321 assembly 132 may not include the limiting bearing 1323, the side surfaces of the limiting shaft 1321 and the stage 11, which are penetrated through, are provided with elongated holes, and the limiting shaft 1321 may rotate and move in the holes, so as to drive the limiting rack 131a to linearly move along the limiting groove 113, thereby fixing the chip 3.

In an embodiment, the limiting mechanism 13 may be a limiting plate, and the limiting plate is in a shape of a long strip plate; the limiting plate is located in the limiting groove 113, for example, the limiting plate is placed on the stage 11 in parallel to the second light path 121, and the limiting plate can be manually pushed to move towards the chip 3, so that the chip 3 is fixed.

In one embodiment, referring to fig. 1, in a large-scale test, one position-limiting mechanism 13 is disposed at each row (longitudinal row) of the positioning portions 111. Each positioning portion 111 in each column is provided with one limiting rack 131a, so that each limiting rack 131a can fix one chip 3 correspondingly. Each limiting rack 131a in each row is correspondingly provided with a limiting gear 1322, and a plurality of limiting gears 1322 are all arranged on the same limiting shaft 1321 in a penetrating manner. By driving the limiting shaft 1321 to rotate, all the limiting gears 1322 on the limiting shaft 1321 are driven to engage with the corresponding limiting racks 131a, so that all the chips 3 in the row are fixed at the same time. The mode is simple to operate, and the chip fixing efficiency is high.

In one embodiment, the deflector 12 may be disposed on the stage 11 without following the movement of the limiting member 131. For example, the stage 11 is formed with a stopper hole (not shown) communicating with the positioning groove 111a, and the stopper 131 is movably disposed in the stopper hole, and the stopper 131 is used to abut against the chip 3 in the positioning groove 111 a. Since the deflector 12 is provided on the stage 11 above the stopper hole and does not interfere with the stopper 131, the movement of the stopper 131 against the chip 3 is not affected. It is understood that, in this embodiment, a through slot communicating with the positioning slot 111a may be formed on the stage 11, the through slot is located above the limiting hole and at least partially isolated from the limiting hole, so as to dispose the deflector 12 on the isolated portion of the through slot, the bottom of the through slot is lower than the second light path 121, and the through slot is disposed so as to align and couple the light beam of the coupling optical fiber with the chip 3 via the second light path 121 after the light beam is deflected by the deflector 12.

In an embodiment, the deflectors 12 may be disposed on the stage 11 near the openings 1112 of the positioning portions 111 (at the light ports of the chip 3), corresponding to the positioning portions 111 one by one, that is, each positioning portion 111 is disposed corresponding to one deflector 12, for changing the direction of the light beam emitted from the coupling fiber 21. The light beam of the coupling fiber 21 travels along the first optical path 211 to the deflector 12, is deflected by the deflector 12, and is coupled to the chip 3 along the second optical path 121. By providing the deflector 12, the arrangement position of the test device 2 is changed, and the spatial position layout of the elements is more flexible.

Further, the deflector 12 may be a reflecting mirror 12a or a triangular prism, etc. The shape of the mirror 12a may be triangular when viewed from the third side 1114 to the fourth side 1115 of the positioning portion 111, and the first optical path 211 is perpendicular to the second optical path 121. The shape of the mirror 12a may be other shapes, but any shape may be used as long as it can ensure that the light beam emitted from the coupling fiber 21 can be reflected and coupled into the optical port of the chip 3.

Further, the material of the deflector 12 may be an elemental semiconductor, such as silicon or the like. The deflector 12 may be made of an oxide, a polymer, a metal, or the like.

In one embodiment, the stage 11 may be circular or square in shape, etc.

Further, the stage 11 is configured to have a shape adapted to the wafer, for example, a circular shape, the number and the positions of the positioning portions 111 are set corresponding to the number and the positions of the chips 3 in the wafer, and the spatial distribution of the wafer map and the model analysis thereof can be used to analyze the reason for the area with a low yield as a test result. Such as abnormal process steps, problem machines, etc. For high yield, a wafer map generated after each wafer is tested also needs to be recorded, and the wafer map can be conveniently used as the content of a work report or the important basis of accident diagnosis. The stage 11 is configured to have a shape adapted to the wafer, and the wafer stage can be used to test the chips on the test tool 1.

In one embodiment, the test fixture 1 further comprises a thermistor 14, and the thermistor 14 can be attached to any suitable position on the stage 11. The number of the thermistors 14 is at least one, and may be plural. For example, referring to fig. 1, four thermistors 14 are provided and are distributed in the vacant space around the stage 11. The thermistor 14 is used for real-time monitoring of the temperature in the vicinity of the chip 3. For the aging measurement, the environment of the chip 3 during operation can be simulated by controlling the temperature of the test environment.

Further, the temperature control test is not limited to the burn-in test, and may be other tests. For example, in the voltage-current or voltage-capacitance test of the microelectronic chip 3, the temperature can significantly increase the carrier transport speed in the channel, so as to realize the test of a single temperature variable, thereby obtaining the optimal operating temperature range of the chip 3.

In another aspect of the present embodiment, please refer to fig. 1 to 5, which provide a chip testing system, including any one of the testing tools 1 and the testing equipment 2. The testing device 2 is used for performing online testing on the chip 3 arranged on the testing tool 1, and the testing device 2 includes, but is not limited to, a coupling fiber 21, a probe card 22, a microscope, or the like.

For example, the coupling fiber 21 is located above the deflector 12, forming with said deflector 12a first optical path 211 for emitting a test beam. Specifically, the coupling fiber 21 may be a fiber array or a prism fiber, and the like, and the coupling efficiency is improved by optically coupling each chip 3 with the deflector 12. The probe card 22 is located above the chip 3, and the probe card 22 has a plurality of test probes 221, which can be in direct contact with the chip 3 for electrical testing, and has high testing efficiency. Specifically, rapid aging treatment can be performed by applying a voltage, and chips 3 which fail early are removed, so that the chips 3 can be conveniently screened. The microscope is used for observing the connection state of the coupling optical fiber 21 and/or the probe card 22 and the chip 3 and judging whether the coupling optical fiber and/or the probe card are in a communication state; or the chip 3 can be operated under a microscope, so that the operation is efficient, convenient and easy.

This embodiment has accomplished single chip or big chip on-line test and rapid aging through test fixture 1 and test equipment 2, easy operation, and degree of automation is high, can reject the chip that early became invalid. The test tool 1 can be repeatedly used for testing chips in different batches, so that the test efficiency is improved, and the test cost is reduced.

In one embodiment, the in-line test is not limited to the rapid burn-in test, but may be other tests, such as a charge/discharge test of a battery piece, a cycle endurance test of a microelectronic chip, and the like.

The above description is only a preferred embodiment of the present application, and is not intended to limit the present application, and it is obvious to those skilled in the art that various modifications and variations can be made in the present application. All changes, equivalents, modifications and the like which come within the spirit and principle of the application are intended to be embraced therein.

Claims (10)

1. The utility model provides a test fixture of chip which characterized in that includes:

the test device comprises an object stage, a positioning part and an alignment mark, wherein the object stage is provided with the positioning part and the alignment mark, the positioning part is used for positioning a chip to be tested and exposing a light port of the chip, and the alignment mark is used for horizontal position calibration of a test device and the chip positioned on the positioning part; and

the deflector is used for changing the direction of the light beam so as to couple the coupling optical fiber of the test equipment with the chip positioned on the positioning part.

2. The test tool of claim 1, further comprising:

the limiting mechanism is movably arranged on the objective table and used for fixing the chip on the positioning part.

3. The test fixture of claim 2, wherein a limiting groove communicated with the positioning portion is formed on the stage, and the limiting mechanism comprises:

the limiting piece is movably arranged in the limiting groove and used for abutting against the chip to the positioning part, and the deflector is arranged on the limiting piece and can move along with the limiting piece;

and the limiting shaft assembly is arranged on the objective table and used for driving the limiting part to move.

4. The test fixture of claim 3, wherein the limiting member is a limiting rack, and the limiting shaft assembly comprises:

a limiting shaft;

the limiting gear is arranged on the limiting shaft and is used for being meshed with the limiting rack; and

the limiting bearing is arranged on the object stage in a penetrating mode and used for supporting the limiting shaft to rotate.

5. The test tool according to claim 1, wherein at least one positioning portion is provided, and the alignment marks are arranged in one-to-one correspondence with the positioning portions; and/or the presence of a gas in the gas,

the positioning part is a positioning groove, the depth of the positioning groove is smaller than the thickness of the chip, and the positioning groove is arranged towards an opening at one end of the deflector so that a light opening of the chip arranged in the positioning groove is exposed.

6. The test tool of claim 1, further comprising a thermistor attached to the stage.

7. The test tool of claim 1, wherein the deflector is a mirror or a triple prism; and or (b) a,

the deflector is made of element semiconductor, oxide, polymer or metal.

8. The test tool according to any one of claims 1 to 7, wherein the stage is configured in a shape adapted to a wafer, and the number and the positions of the positioning portions are arranged corresponding to the number and the positions of chips in the wafer.

9. A system for testing a chip, comprising:

the test fixture of any one of claims 1-8; and

and the test equipment is used for testing the chip arranged on the test tool.

10. The test system of claim 9, wherein the test equipment comprises:

and the coupling optical fiber is positioned above the deflector and used for emitting a test light beam to pass through the deflector and then be coupled with the chip on the positioning part.

Images