CN114025506A - Inkjet method for circuit board and protective layer in circuit board - Google Patents
Inkjet method for circuit board and protective layer in circuit board Download PDFInfo
- Publication number
- CN114025506A CN114025506A CN202111269551.4A CN202111269551A CN114025506A CN 114025506 A CN114025506 A CN 114025506A CN 202111269551 A CN202111269551 A CN 202111269551A CN 114025506 A CN114025506 A CN 114025506A
- Authority
- CN
- China
- Prior art keywords
- data
- protective layer
- area
- type
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011241 protective layer Substances 0.000 title claims abstract description 107
- 238000000034 method Methods 0.000 title claims abstract description 34
- 239000010410 layer Substances 0.000 claims abstract description 79
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 238000005507 spraying Methods 0.000 claims description 59
- 239000007921 spray Substances 0.000 claims description 49
- 229910000679 solder Inorganic materials 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 238000007639 printing Methods 0.000 abstract description 10
- 230000000694 effects Effects 0.000 abstract description 6
- 239000000976 ink Substances 0.000 description 26
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 6
- 239000007788 liquid Substances 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- 230000005484 gravity Effects 0.000 description 3
- 229910052742 iron Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000007781 pre-processing Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ink Jet (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
The invention discloses a circuit board and an ink jet method of a protective layer in the circuit board. The circuit board comprises a substrate, a first protective layer and a second protective layer, wherein a circuit layer is arranged on one side of the substrate and comprises routing wires and connecting pads; the first protective layer covers the substrate, the routing wires and a substrate area between two adjacent connecting pads; the second protection layer is arranged on one side, away from the substrate, of the first protection layer, the coverage area of the second protection layer is smaller than that of the first protection layer, and the second protection layer covers the wiring. Through adopting above-mentioned technical scheme, the required printing ink that makes the second protective layer is less, and the protective layer on the basic unit is difficult too thick simultaneously, has realized reducing the printing ink cost and has been difficult for the effect that the protective layer that leads to the base plate is too thick the condition emergence that drops.
Description
Technical Field
The embodiment of the invention relates to the technology of circuit boards, in particular to an ink jet method for a circuit board and a protective layer in the circuit board.
Background
The passivation layer is a solder mask layer covering the circuit layer on the circuit board. The circuit layer generally includes traces and pads. The trace is used to complete the circuit. The connecting pad is used for welding and plugging components, such as a resistor, a capacitor and an MCU.
The traces need to be covered under the passivation layer, and the bonding pads need to be exposed outside the passivation layer. When the circuit board is welded with components, the protective layer (solder mask) can prevent the wires from being melted by the electric soldering iron during misoperation.
The existing protective layer is manufactured through an ink-jet process, wherein in the ink-jet process, liquid protective layer ink is sprayed on a running line and between connecting pads by ink-jet equipment according to design data of a circuit board, and the ink is solidified to form the protective layer.
The existing problem of the ink-jet process is that when the protective layer ink is sprayed on the wiring, the liquid protective layer ink can fall off the wiring due to surface tension, gravity, incompatibility of the protective layer ink and metal, etc., the protective layer attached to the wiring is few, and the edge of the wiring is less. The narrower the width of the wire, the less the protective layer attached to the wire, and even no protective layer at the edge.
The common method for increasing the thickness of the protective layer is to spray the protective layer twice in the same area, so that the ink cost of the protective layer is high, and the excessively thick protective layer on the substrate is easy to fall off.
Disclosure of Invention
The invention provides a circuit board and an ink jet method of a protective layer in the circuit board, which aim to realize the effects that the protective layer on a substrate is not easy to fall off due to excessive thickness and the cost of ink of the protective layer is lower.
In a first aspect, an embodiment of the present invention provides a circuit board, where the circuit board includes a substrate, a first protection layer, and a second protection layer, where one side of the substrate is provided with a circuit layer, and the circuit layer includes a trace and a connection pad;
the first protective layer covers the substrate, the routing wires and a substrate area between two adjacent connecting pads;
the second protection layer is arranged on one side, away from the substrate, of the first protection layer, the coverage area of the second protection layer is smaller than that of the first protection layer, and the second protection layer covers the wiring.
In an optional embodiment of the present invention, a thickness of the second protection layer located above the trace is greater than a thickness of the first protection layer along a direction perpendicular to the substrate.
In an alternative embodiment of the invention, the leveling of the first protective layer is greater than or equal to the leveling of the second protective layer.
In a second aspect, embodiments of the present invention further provide an ink-jet method for a protective layer in a circuit board, applied to an ink-jet apparatus, for manufacturing the protective layer in the circuit board according to any of the above embodiments;
the inkjet apparatus includes a processor for performing the inkjet method and a nozzle assembly;
the inkjet method includes:
acquiring first type integral data, wherein the first type integral data comprises substrate data and routing data;
determining a first spraying area according to the first type of overall data, wherein the first spraying area comprises a substrate area and a routing area;
controlling the nozzle assembly to spray the first spraying area to prepare a first protective layer;
acquiring second-type integral data, wherein the second-type integral data comprises routing data and connecting pad data, and determining the routing data according to the first-type integral data and the second-type integral data;
determining a second spraying area according to the routing data, wherein the second spraying area comprises a routing area;
and controlling the nozzle assembly to spray the second spraying area to prepare a second protective layer, wherein the coverage area of the second protective layer is smaller than that of the first protective layer.
In an optional embodiment of the present invention, determining the routing data according to the first type of data and the second type of data includes:
according to the first type of integral data and the second type of integral data, common data in the first type of integral data and the second type of integral data are extracted, and the common data comprise the routing data.
In an alternative embodiment of the present invention, obtaining the first type of whole data includes:
and acquiring solder mask layer data, wherein the solder mask layer data comprises the substrate data and the routing data.
In an alternative embodiment of the present invention, obtaining the second type of whole data includes:
and acquiring line layer data, wherein the line layer data comprises the routing data and the connecting pad data.
In an alternative embodiment of the present invention, before controlling the nozzle assembly to spray the first spray region, the method further includes:
and preprocessing the circuit board.
In an alternative embodiment of the invention, the nozzle assembly comprises a first nozzle and a second nozzle;
controlling the nozzle assembly to spray the first spray area, including:
controlling the first nozzle to spray the first spraying area;
controlling the nozzle assembly to spray the second spray area, including:
and controlling the second nozzle to spray the second spraying area.
In an alternative embodiment of the invention, the diameter of the first nozzle is larger than the diameter of the second nozzle.
According to the invention, the second protection layer is arranged on the side, away from the substrate, of the first protection layer, meanwhile, the coverage area of the second protection layer is smaller than that of the first protection layer, and the second protection layer covers the wiring, so that compared with the case that two protection layers with the same coverage area are arranged in the same area, the effect of reducing the printing ink cost is achieved by arranging the second protection layer with the smaller coverage area; meanwhile, the second protective layer with the smaller coverage area still covers the wiring, so that compared with the situation that two identical protective layers are arranged in the same area, the area covered by the second protective layer on the substrate is smaller, and the effect that the protective layer of the substrate is not easy to fall off due to over thickness is achieved.
Drawings
Fig. 1 is a schematic structural diagram of a circuit board according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view of a circuit board of FIG. 1 taken along line A-A;
fig. 3 is a schematic flow chart illustrating an ink-jet method for a protective layer in a circuit board according to a second embodiment of the present invention.
Wherein, 1, a substrate; 2. a circuit layer; 21. routing; 22. a connecting pad; 3. a first protective layer; 4. and a second protective layer.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 1 is a schematic structural diagram of a circuit board according to an embodiment of the present invention, and fig. 2 is a cross-sectional view of the circuit board of fig. 1 taken along line a-a; as shown in fig. 1 and fig. 2, the circuit board includes a substrate 1, a first protection layer 3 and a second protection layer 4, wherein a circuit layer 2 is disposed on one side of the substrate 1, and the circuit layer 2 includes traces 21 and connection pads 22.
The first protective layer 3 covers the substrate 1, the trace 21 and the area of the substrate 1 between two adjacent connecting pads 22.
The second protection layer 4 is disposed on a side of the first protection layer 3 away from the substrate 1, a coverage area of the second protection layer 4 is smaller than a coverage area of the first protection layer 3, and the second protection layer 4 covers the trace 21.
Wherein the trace 21 is used for connecting a circuit, the trace 21 is usually made of a conductive material. The connecting pad 22 is used for soldering and plugging components, such as resistors, capacitors and MCU.
The first protective layer 3 and the second protective layer 4 are both manufactured through an ink-jet process, wherein the ink-jet process is that ink-jet equipment sprays liquid protective layer ink in a specified area according to design data of a circuit board, and the first protective layer 3 and the second protective layer 4 are formed after the ink is solidified. The first protective layer 3 and the second protective layer 4 can prevent the wire 21 from being melted by an electric soldering iron during misoperation.
According to the scheme, the second protection layer 4 is arranged on the side, away from the substrate 1, of the first protection layer 3, meanwhile, the coverage area of the second protection layer 4 is smaller than that of the first protection layer 3, the second protection layer 4 covers the routing wires 21, compared with the case that two identical protection layers are arranged in the same area, the effect of reducing the printing ink cost is achieved by arranging the second protection layer 4 with a smaller coverage area; meanwhile, the second protective layer 4 with a smaller coverage area is arranged to still cover the wiring 21, so that the coverage area of the second protective layer 4 on the substrate 1 is smaller than that of the second protective layer 4 arranged in the same area, and the effect that the protective layer of the substrate 1 is not easy to fall off due to over thickness is achieved.
Preferably, the thickness of the second protection layer 4 above the trace 21 is greater than the thickness of the first protection layer 3 along the direction perpendicular to the substrate 1.
The thickness of the second protective layer 4 above the wire 21 is larger than that of the first protective layer 3, so that the wire 21 can be better protected, and the condition that the wire 21 is melted by an electric soldering iron during misoperation is prevented.
In addition to the above examples, the leveling property of the first protective layer 3 was greater than or equal to that of the second protective layer 4.
Among them, leveling refers to the property of the ink to uniformly level on a printing material to exhibit sufficient gloss without pinholes. Because the coverage area of the first protection layer 3 is larger than that of the second protection layer 4, the leveling property of the first protection layer 3 is larger than or equal to that of the second protection layer 4, so that the first protection layer 3 can more uniformly cover the substrate 1 area between the substrate 1, the trace 21 and the two adjacent connecting pads 22. Because the coverage area of the second protective layer 4 is smaller than that of the first protective layer 3, and meanwhile, the second protective layer 4 covers the area of the wire 21, the second protective layer 4 mainly covers the area of the wire 21, and the leveling property of the second protective layer 4 is smaller than or equal to that of the first protective layer 3, so that the second protective layer 4 can better cover the area of the wire 21 and is not easy to fall off from the wire 21 due to reasons such as surface tension, gravity, incompatibility of the protective layer ink and metal, and the like.
Example two
Fig. 3 is a schematic flow chart illustrating an ink-jet method for a protective layer of a circuit board according to a second embodiment of the present invention, which is applied to an ink-jet apparatus for manufacturing the protective layer of the circuit board according to any one of the above embodiments; the inkjet apparatus includes a processor for performing the inkjet method and a nozzle assembly; as shown in fig. 3, the inkjet method includes:
s210, first-type integral data are obtained, wherein the first-type integral data comprise substrate data and routing data.
The whole data means that the included data content is difficult to be directly split in the same data file. The first type of overall data comprises the substrate data and the routing data, so that the substrate data and the routing data are in the same data file although the first type of overall data comprises the substrate data and the routing data, and the first type of overall data is difficult to be directly split into two separate data files.
S220, determining a first spraying area according to the first type of overall data, wherein the first spraying area comprises a substrate area and a routing area.
The substrate area refers to the exposed part of the substrate in the circuit board, and the routing area refers to the exposed part of the routing in the circuit board. The first spray area refers to the area that the nozzle assembly will spray for the first spray.
And S230, controlling the nozzle assembly to spray the first spraying area to prepare a first protective layer.
The nozzle assembly is a component used for spraying ink to a designated area of the circuit board, the first spraying area is sprayed by controlling the nozzle assembly, and the first spraying area comprises a substrate area and a wiring area, so that the substrate area and the wiring area can be covered by the first protective layer at the moment.
S240, second type integral data is obtained, wherein the second type integral data comprises routing data and connecting pad data, and the routing data is determined according to the first type integral data and the second type integral data.
The second type of whole data refers to an integral file including routing data and connection pad data, so that the second type of whole data includes the routing data and the connection pad data, but the routing data and the connection pad data are in the same data file, and the second type of whole data is difficult to be directly split into two separate data files.
The first type of integral data comprises substrate data and routing data, and certain data processing is carried out on the first type of integral data and the second type of integral data, so that the routing data can be determined.
And S250, determining a second spraying area according to the routing data, wherein the second spraying area comprises a routing area.
Wherein the second spray area refers to the area that the nozzle assembly will spray for the second spray.
And S260, controlling the nozzle assembly to spray the second spraying area to prepare a second protection layer, wherein the coverage area of the second protection layer is smaller than that of the first protection layer.
And the covering area of the second protective layer is smaller than that of the first protective layer, so that compared with spraying two protective layers with the same area, the ink is saved. The second spraying area is sprayed by controlling the nozzle assembly, and the second spraying area comprises a routing area, so that the second protective layer mainly covers the routing area at the moment, however, since the ink has certain fluidity, although the nozzle assembly only sprays the routing area, a part of the second protective layer can flow to the substrate area.
In addition, the sequence number in this embodiment does not represent a specific execution sequence, and the sequence may also be changed according to different application scenarios, for example, the first type of overall data and the second type of overall data may be obtained first, then the first spraying area and the second spraying area are determined, and finally the nozzle assembly sequentially sprays the first spraying area and the second spraying area. Or first-class overall data can be obtained first, a first spraying area is determined, then second-class overall data is obtained, a second spraying area is determined, and finally the nozzle assembly sequentially sprays the first spraying area and the second spraying area. The execution sequence of the steps is not particularly limited, as long as the nozzle assembly first sprays the first spraying region and then sprays the second spraying region.
Among the above-mentioned scheme, through earlier regional spraying with walking the line to the base plate, the preparation obtains first protective layer, then carry out the spraying to walking the line region, the preparation obtains the second protective layer, because the principle that printing ink is hydrophilic mutually, the second protective layer can depend on first protective layer more easily, so the second protective layer can be in the regional higher thickness of reserving of walking, also difficult protective layer is too thick on the base plate simultaneously and leads to droing, because the spraying of second time only needs the spraying to walk the line region, compare in regional spraying same two-layer protective layer printing ink at the base plate, the spraying area is little, the printing ink cost has been reduced. Meanwhile, the problems that when the protective layer is sprayed on the wiring, the liquid protective layer falls off from the wiring due to the reasons of surface tension, gravity, incompatibility of the protective layer ink and metal and the like, the protective layer attached to the wiring is few, and the protective layer is easy to fall off due to over thickness if the protective layer is sprayed on the substrate twice are solved.
Optionally, determining the routing data according to the first type of data and the second type of data includes:
according to the first type of integral data and the second type of integral data, common data in the first type of integral data and the second type of integral data are extracted, and the common data comprise the routing data.
The first type of integral data comprises a substrate area and a wiring area, and the second type of integral data comprises wiring data and connecting pad data, so that the first type of integral data and the second type of integral data both comprise wiring data, and the wiring data can be obtained by extracting common data in the first type of integral data and the second type of integral data.
Specifically, the acquiring of the first type of overall data includes:
and acquiring solder mask layer data, wherein the solder mask layer data comprises the substrate data and the routing data.
The solder mask data refers to a protection layer data file in a circuit board design file used in a common process of spraying a protection layer, and since the conventional spraying of the protection layer is to spray a substrate and a trace, the solder mask data generally includes substrate data and trace data.
In an alternative embodiment of the present invention, obtaining the second type of whole data includes:
and acquiring line layer data, wherein the line layer data comprises the routing data and the connecting pad data.
The circuit layer data refers to a data file of a circuit layer in a circuit board design file, and because the routing and the connecting pads belong to the same layer of circuit layer in the circuit board, the circuit layer data usually comprises routing data and connecting pad data.
In an optional embodiment of the present invention, before controlling the nozzle assembly to spray the first spray region, the method further includes:
and preprocessing the circuit board.
The pretreatment is to remove oxidation and dirt on the surface of the circuit board to make the copper surface have roughness to facilitate the adhesion of dry films and printing inks, and the common pretreatment modes include a sand blasting grinding method, a chemical pretreatment method, a mechanical grinding method and the like. The purpose of removing oil and oxidation on the surface is achieved through pretreatment, and meanwhile, after the treatment, the surface of the circuit copper layer is roughened to improve the adhesive force of the printing ink.
In an alternative embodiment of the invention, the nozzle assembly comprises a first nozzle and a second nozzle;
controlling the nozzle assembly to spray the first spray area, including:
and controlling the first nozzle to spray the first spraying area.
Controlling the nozzle assembly to spray the second spray area, including:
and controlling the second nozzle to spray the second spraying area.
Wherein, the first nozzle and the second nozzle can be the same nozzle or different nozzles. The first spraying area and the second spraying area are sprayed by the first nozzle and the second nozzle respectively, when the sprayed ink is different, the spraying accuracy requirements of the first spraying area and the second spraying area are different, and the like, the first spraying area and the second spraying area can be sprayed by the proper nozzles conveniently, and compared with the method that one nozzle is used for spraying the first spraying area and the second spraying area, the universality is stronger.
Preferably, the diameter of the first nozzle is larger than the diameter of the second nozzle.
The range of the first spraying area is larger than that of the second spraying area, so that the large-area coverage is mainly used when the first spraying area is sprayed, the precision requirement is not high, and the precision requirement is high when the second spraying area is sprayed according to the routing accurately. The diameter of the first nozzle is larger than that of the second nozzle, so that the requirement of spraying precision can be better met.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111269551.4A CN114025506B (en) | 2021-10-29 | 2021-10-29 | A circuit board and an inkjet method for a protective layer in the circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111269551.4A CN114025506B (en) | 2021-10-29 | 2021-10-29 | A circuit board and an inkjet method for a protective layer in the circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114025506A true CN114025506A (en) | 2022-02-08 |
| CN114025506B CN114025506B (en) | 2024-07-30 |
Family
ID=80058731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111269551.4A Active CN114025506B (en) | 2021-10-29 | 2021-10-29 | A circuit board and an inkjet method for a protective layer in the circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114025506B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07115258A (en) * | 1993-10-20 | 1995-05-02 | Sony Corp | Printed wiring board and its manufacture |
| CN101925251A (en) * | 2009-06-09 | 2010-12-22 | 株式会社藤仓 | Flexible printed circuit board and manufacture method thereof |
| JP2011119567A (en) * | 2009-12-07 | 2011-06-16 | Panasonic Corp | Method of manufacturing printed wiring board |
| KR101184543B1 (en) * | 2011-08-05 | 2012-09-19 | 삼성전기주식회사 | Printed circuit board and method of manufacturing the same, and semiconductor package using the same |
| CN105228362A (en) * | 2014-06-30 | 2016-01-06 | 发那科株式会社 | Printed circuit board and manufacture method thereof |
| JP2020035848A (en) * | 2018-08-29 | 2020-03-05 | 沖電気工業株式会社 | Printed wiring board and method of forming solder resist |
| KR20200144213A (en) * | 2019-06-18 | 2020-12-29 | 스템코 주식회사 | Flexible circuit board and electronic device with the flexible circuit board, and manufacturing method of flexible circuit board |
-
2021
- 2021-10-29 CN CN202111269551.4A patent/CN114025506B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07115258A (en) * | 1993-10-20 | 1995-05-02 | Sony Corp | Printed wiring board and its manufacture |
| CN101925251A (en) * | 2009-06-09 | 2010-12-22 | 株式会社藤仓 | Flexible printed circuit board and manufacture method thereof |
| JP2011119567A (en) * | 2009-12-07 | 2011-06-16 | Panasonic Corp | Method of manufacturing printed wiring board |
| KR101184543B1 (en) * | 2011-08-05 | 2012-09-19 | 삼성전기주식회사 | Printed circuit board and method of manufacturing the same, and semiconductor package using the same |
| CN105228362A (en) * | 2014-06-30 | 2016-01-06 | 发那科株式会社 | Printed circuit board and manufacture method thereof |
| JP2020035848A (en) * | 2018-08-29 | 2020-03-05 | 沖電気工業株式会社 | Printed wiring board and method of forming solder resist |
| KR20200144213A (en) * | 2019-06-18 | 2020-12-29 | 스템코 주식회사 | Flexible circuit board and electronic device with the flexible circuit board, and manufacturing method of flexible circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114025506B (en) | 2024-07-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4162583B2 (en) | Printed wiring board and semiconductor device | |
| US7586754B2 (en) | Printed wiring board and process for manufacturing the same | |
| KR100850243B1 (en) | Printed Circuit Board and Manufacturing Method | |
| KR101219905B1 (en) | The printed circuit board and the method for manufacturing the same | |
| EP3432693A1 (en) | Encapsulation of circuit trace | |
| KR20090053053A (en) | Substrate Manufacturing Method | |
| JP2016012702A (en) | Print circuit board balancing wettability and anticorrosion of solder coat and manufacturing method of the same | |
| CN114025506A (en) | Inkjet method for circuit board and protective layer in circuit board | |
| US10144078B2 (en) | Method for cleaning an Electronic circuit board | |
| KR101199174B1 (en) | The printed circuit board and the method for manufacturing the same | |
| CN101483977A (en) | Circuit board and preparation method thereof | |
| JP2000208881A (en) | Printed wiring board and conductor pattern formation method for it | |
| JP4972601B2 (en) | Wiring board manufacturing method | |
| KR20150052053A (en) | Method and structure for forming contact pads on a printed circuit board using zero under-cut technology | |
| CN114096074B (en) | Circuit board and ink-jet method for protective layer in circuit board | |
| US6395994B1 (en) | Etched tri-metal with integrated wire traces for wire bonding | |
| JPH11195723A (en) | Wiring board | |
| JP2003133714A (en) | Printed-wiring board and manufacturing method thereof | |
| JP2019153696A (en) | Circuit board and manufacturing method of the same | |
| JPS5930553Y2 (en) | wiring board | |
| KR101957242B1 (en) | Method of manufacturing printed circuit board | |
| TWI602483B (en) | Method and structure for forming contact pads on a printed circuit board using zero under cut technology | |
| JPS5844605Y2 (en) | Structure to prevent solder bridging on printed circuit boards | |
| JPH07273431A (en) | Printed wiring board and its manufacture | |
| JPH05291735A (en) | Printed wiring board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Building 16, 1st Floor, Changzhou Science and Education City, No. 18-67 Changwu Middle Road, Wujin District, Changzhou City, Jiangsu Province 213000 Patentee after: Dishengwei (Jiangsu) Equipment Technology Co.,Ltd. Country or region after: China Address before: 430056 Standard Factory Building B, 2nd Floor, Zones 2-67, Export Processing Zone, 8MC Plot (69 Checheng South Road), Wuhan Economic and Technological Development Zone, Wuhan City, Hubei Province, China Patentee before: Disheng (Wuhan) Microelectronics Technology Co.,Ltd. Country or region before: China Address after: 430056 Standard Factory Building B, 2nd Floor, Zones 2-67, Export Processing Zone, 8MC Plot (69 Checheng South Road), Wuhan Economic and Technological Development Zone, Wuhan City, Hubei Province, China Patentee after: Disheng (Wuhan) Microelectronics Technology Co.,Ltd. Country or region after: China Address before: 215100 floor 2, building 2, Ruijing building, No. 868, Jinshan South Road, Mudu Town, Wuzhong District, Suzhou City, Jiangsu Province Patentee before: Jiangsu Desheng Intelligent Technology Co.,Ltd. Country or region before: China |