CN114008762B - 半导体存储装置 - Google Patents

半导体存储装置

Info

Publication number
CN114008762B
CN114008762B CN202080044702.3A CN202080044702A CN114008762B CN 114008762 B CN114008762 B CN 114008762B CN 202080044702 A CN202080044702 A CN 202080044702A CN 114008762 B CN114008762 B CN 114008762B
Authority
CN
China
Prior art keywords
transistor
node
gate
transistors
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202080044702.3A
Other languages
English (en)
Chinese (zh)
Other versions
CN114008762A (zh
Inventor
广濑雅庸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Socionext Inc
Original Assignee
Socionext Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Socionext Inc filed Critical Socionext Inc
Publication of CN114008762A publication Critical patent/CN114008762A/zh
Application granted granted Critical
Publication of CN114008762B publication Critical patent/CN114008762B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CN202080044702.3A 2019-06-21 2020-05-27 半导体存储装置 Active CN114008762B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019-115209 2019-06-21
JP2019115209 2019-06-21
PCT/JP2020/020976 WO2020255655A1 (ja) 2019-06-21 2020-05-27 半導体記憶装置

Publications (2)

Publication Number Publication Date
CN114008762A CN114008762A (zh) 2022-02-01
CN114008762B true CN114008762B (zh) 2025-08-05

Family

ID=74037091

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202080044702.3A Active CN114008762B (zh) 2019-06-21 2020-05-27 半导体存储装置

Country Status (4)

Country Link
US (2) US11915744B2 (https=)
JP (1) JP7590655B2 (https=)
CN (1) CN114008762B (https=)
WO (1) WO2020255655A1 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11114153B2 (en) * 2019-12-30 2021-09-07 Taiwan Semiconductor Manufacturing Co., Ltd. SRAM devices with reduced coupling capacitance
US12039242B2 (en) * 2020-08-31 2024-07-16 Taiwan Semiconductor Manufacturing Company Ltd. Structure and method of non-rectangular cell in semiconductor device
US12199152B2 (en) * 2021-01-18 2025-01-14 Samsung Electronics Co., Ltd. Selective single diffusion/electrical barrier
US12073919B2 (en) * 2021-06-25 2024-08-27 Advanced Micro Devices, Inc. Dual read port latch array bitcell
US12008237B2 (en) * 2022-04-19 2024-06-11 Advanced Micro Devices, Inc. Memory bit cell with homogeneous layout pattern of base layers for high density memory macros
WO2025062483A1 (ja) * 2023-09-19 2025-03-27 株式会社ソシオネクスト 半導体集積回路装置
WO2025099800A1 (ja) * 2023-11-06 2025-05-15 株式会社ソシオネクスト 半導体集積回路装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1419292A (zh) * 2001-11-14 2003-05-21 三菱电机株式会社 半导体存储器
WO2014185085A1 (ja) * 2013-05-14 2014-11-20 株式会社 東芝 半導体記憶装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2665644B2 (ja) 1992-08-11 1997-10-22 三菱電機株式会社 半導体記憶装置
KR100526884B1 (ko) * 2003-08-25 2005-11-09 삼성전자주식회사 듀얼 포트 에스램의 레이아웃 구조 및 그에 따른 형성방법
KR100702011B1 (ko) * 2005-03-16 2007-03-30 삼성전자주식회사 다중 게이트 트랜지스터들을 채택하는 씨모스 에스램 셀들및 그 제조방법들
US7400523B2 (en) * 2006-06-01 2008-07-15 Texas Instruments Incorporated 8T SRAM cell with higher voltage on the read WL
US9424889B1 (en) * 2015-02-04 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple-port SRAM device
US20090161410A1 (en) * 2007-12-21 2009-06-25 Texas Instruments Inc. Seven transistor sram cell
US8526228B2 (en) * 2012-01-06 2013-09-03 International Business Machines Corporation 8-transistor SRAM cell design with outer pass-gate diodes
JP5726770B2 (ja) * 2012-01-12 2015-06-03 株式会社東芝 半導体装置及びその製造方法
WO2014184933A1 (ja) 2013-05-16 2014-11-20 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド Ｓｇｔを有する半導体装置の製造方法
US9362292B1 (en) * 2015-04-17 2016-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Two-port SRAM cell structure for vertical devices
US10707218B2 (en) * 2018-07-26 2020-07-07 Globalfoundries Inc. Two port SRAM cell using complementary nano-sheet/wire transistor devices
JP7606101B2 (ja) * 2019-06-03 2024-12-25 株式会社ソシオネクスト 半導体記憶装置
WO2020255801A1 (ja) * 2019-06-17 2020-12-24 株式会社ソシオネクスト 半導体記憶装置
JP7590656B2 (ja) * 2019-06-21 2024-11-27 株式会社ソシオネクスト 半導体記憶装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1419292A (zh) * 2001-11-14 2003-05-21 三菱电机株式会社 半导体存储器
WO2014185085A1 (ja) * 2013-05-14 2014-11-20 株式会社 東芝 半導体記憶装置

Also Published As

Publication number Publication date
US12417801B2 (en) 2025-09-16
US11915744B2 (en) 2024-02-27
US20240153549A1 (en) 2024-05-09
WO2020255655A1 (ja) 2020-12-24
JPWO2020255655A1 (https=) 2020-12-24
JP7590655B2 (ja) 2024-11-27
US20220115388A1 (en) 2022-04-14
CN114008762A (zh) 2022-02-01

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