CN113990241A

CN113990241A - Pixel circuit, driving method thereof and display device

Info

Publication number: CN113990241A
Application number: CN202111287433.6A
Authority: CN
Inventors: 陈亮; 刘冬妮; 韩承佑; 肖丽; 赵蛟; 郑皓亮; 玄明花
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2021-11-02
Filing date: 2021-11-02
Publication date: 2022-01-28
Anticipated expiration: 2041-11-02
Also published as: CN113990241B

Abstract

The application discloses a pixel circuit, a driving method thereof and a display device. The pixel circuit current amplitude control circuit comprises a first data writing sub-circuit and a light-emitting control sub-circuit, wherein the first data writing sub-circuit responds to a first scanning signal to access a data signal, and the light-emitting control sub-circuit responds to a light-emitting control signal to provide driving current for a light-emitting unit; and the time modulation circuit comprises a second data writing sub-circuit and a time signal writing sub-circuit, wherein the second data writing sub-circuit responds to the first scanning signal, accesses the data signal, stores the data signal in the second storage capacitor, responds to the first time modulation signal, and transmits the driving current to the light-emitting unit, and the time signal writing sub-circuit responds to the input second time modulation signal and stops transmitting the driving current to the light-emitting unit. The pixel circuit reduces the input data amount in gray scale control and reduces the driving cost.

Description

Pixel circuit, driving method thereof and display device

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display device.

Background

The micro LED and the MiniLED are new generation display technologies, and have higher brightness, better luminous efficiency and lower power consumption compared with the existing OLED technology, so the excellent characteristics of the micro LED and the MiniLED can enable the micro LED and the MiniLED to be applied to televisions, mobile phones and tablet computers. Meanwhile, when the micro led and the MiniLED are used as self-luminous devices, the luminous efficiency is reduced along with the reduction of the current density under low current density. In contrast, different gray scales of OLED display are realized by driving OLED devices with different current densities to emit light with different brightness. However, in the micro led and MiniLED display, only the current density is changed to realize the brightness of different gray scales, and thus, the low luminous efficiency and the high power consumption are caused by the low current density in the low gray scale.

In the prior art, the brightness of a light-emitting device is controlled by controlling the current and the light-emitting time for pixel driving of a micro LED and a MiniLED, different data signals need to be written in the pixel driving and the MiniLED respectively, the data volume is large, and more severe examination is provided for the driving capability of a driving chip.

Disclosure of Invention

In order to solve at least one of the above problems, a first aspect of the present application provides a pixel circuit including a current amplitude control circuit, a light emitting unit, and a time modulation circuit, wherein:

a current amplitude control circuit including a first data writing sub-circuit accessing a data signal in response to a first scan signal, storing the data signal based on a first storage capacitor, and a light emission control sub-circuit supplying a driving current to the light emitting unit in response to a light emission control signal, the driving current being a signal generated based on the first scan signal and the data signal;

and a time modulation circuit including a second data writing sub-circuit which accesses a data signal in response to the first scan signal and stores in the second storage capacitor, and transmits a driving current to the light emitting unit in response to the first time modulation signal, and a time signal writing sub-circuit which stops transmitting the driving current to the light emitting unit in response to the inputted second time modulation signal.

In some alternative embodiments, the second data writing sub-circuit includes: a first transistor, a second transistor, a third transistor, and a second storage capacitor, wherein:

a first end of the first transistor is connected with a data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected with a first scanning signal;

the first end of the second transistor is connected to the second node, the second end of the second transistor is connected to the first time modulation signal, and the control end of the second transistor is connected to the first scanning signal;

the first end of the third transistor is connected to the second node, the second end of the third transistor is accessed to the first time modulation signal, and the control end of the third transistor is accessed to the second scanning signal;

the first end of the second storage capacitor is connected to the first node, and the second end of the second storage capacitor is connected to the second node.

In some alternative embodiments, the second data writing sub-circuit includes: a first transistor, a second transistor, a third transistor, an inverter, and a second storage capacitor, wherein:

the first end of the second transistor is connected to the second node, the second end of the second transistor is connected to the first time modulation signal inverted by the phase inverter, and the control end of the second transistor is connected to the first scanning signal;

the first end of the third transistor is connected to the second node, the second end of the third transistor is accessed to the first time modulation signal inverted by the inverter, and the control end of the third transistor is accessed to the second scanning signal;

In some alternative embodiments, the second data writing sub-circuit includes: a first transistor and a second storage capacitor, wherein:

the first end of the second storage capacitor is connected to the first node, and the second end of the second storage capacitor is connected to the first time modulation signal.

In some alternative embodiments, the time signal writing sub-circuit comprises: a third storage capacitor, a first end of the third storage capacitor is connected to the second time modulation signal, a second end is connected to the first node,

wherein the second time modulation signal is a signal whose amplitude changes proportionally with time.

In some embodiments of the present invention, the,

the first data writing sub-circuit includes: a scan switch transistor, a drive transistor, a threshold compensation transistor, and a first storage capacitor,

the first light emission control sub-circuit includes: a first light emission control transistor and a second light emission control transistor,

the current amplitude control circuit further includes: a first reset transistor and a light emitting transistor, wherein:

a first end of the scanning switch transistor is connected with a data signal, a second end of the scanning switch transistor is connected to a third node, and a control end of the scanning switch transistor is connected with a first scanning signal;

the first end of the driving transistor is connected to the third node, the second end of the driving transistor is connected to the fourth node, and the control end of the driving transistor is connected to the fifth node;

the first end of the threshold compensation transistor is connected to the fourth node, the second end of the threshold compensation transistor is connected to the fifth node, and the control end of the threshold compensation transistor is connected to the first scanning signal;

the first end of the first reset transistor is connected to the fifth node, the second end of the first reset transistor is connected to the first power supply signal, and the control end of the first reset transistor is connected to the reset signal;

the first end of the first light-emitting control transistor is connected to a second power supply signal, the second end of the first light-emitting control transistor is connected to a third node, and the control end of the first light-emitting control transistor is connected to a light-emitting control signal;

the first end of the first storage capacitor is connected to a second power supply signal, and the second end of the first storage capacitor is connected to the fifth node;

the first end of the second light-emitting control transistor is connected to the fourth node, the second end of the second light-emitting control transistor is connected to the first end of the light-emitting transistor, and the control end of the second light-emitting control transistor is connected to the light-emitting control signal;

a second terminal of the light emitting transistor is connected to an anode of the light emitting cell, a control terminal is connected to the first node, and/or

The current amplitude control circuit further comprises a second reset transistor, wherein the first end of the second reset transistor is connected to the anode of the light-emitting unit, the second end of the second reset transistor is connected to the first power supply signal, and the control end of the second reset transistor is connected to the reset signal.

In some optional embodiments, the light emitting unit is a micro led or a MiniLED.

A second aspect of the invention provides a display device comprising the pixel circuit described above.

A third aspect of the present invention provides a driving method using the pixel circuit described above, comprising:

the current amplitude control circuit is used for responding to a first scanning signal, accessing a data signal, storing the data signal based on a first storage capacitor and responding to a light-emitting control signal to provide a driving current for the light-emitting unit;

the time modulation circuit is accessed to a data signal in response to a first scanning signal and stored in the second storage capacitor, and transmits a driving current to the light emitting unit in response to a first time modulation signal, and stops transmitting the driving current to the light emitting unit in response to an input second time modulation signal, the driving current being a signal generated based on the first scanning signal and the data signal.

In some of the alternative embodiments, the first and second,

the time modulation circuit comprises a second data write sub-circuit and a time signal write sub-circuit, wherein

The second data writing sub-circuit includes: a first transistor, a second transistor, a third transistor, and a second storage capacitor, wherein: a first end of the first transistor is connected with a data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected with a first scanning signal; the first end of the second transistor is connected to the second node, the second end of the second transistor is connected to the first time modulation signal, and the control end of the second transistor is connected to the first scanning signal; the first end of the third transistor is connected to the second node, the second end of the third transistor is accessed to the first time modulation signal, and the control end of the third transistor is accessed to the second scanning signal; the first end of the second storage capacitor is connected to the first node, the second end is connected to the second node, and the time signal writing sub-circuit comprises: a third storage capacitor, a first end of the third storage capacitor is connected to the second time modulation signal, a second end is connected to the first node,

the driving method comprises the following steps:

a reset stage: the current amplitude control circuit is reset in response to a reset signal;

threshold compensation and data writing phase: the current amplitude control circuit reads a data signal and supplies a driving current to the light emitting unit, and the time modulation circuit accesses the data signal and writes the data signal into a first terminal of the second storage capacitor in response to a first scan signal, and accesses a first time modulation signal having a first level into a second terminal of the second storage capacitor in response to the first scan signal;

and a light emitting modulation stage:

a time length determining stage, responding to the second scanning signal, the second end of the second storage capacitor is connected to the first time modulation signal with the second level to determine the light emitting time length through the coupling action,

and in the light emitting control stage, the light emitting unit emits light under the control of the driving current provided by the current amplitude control circuit and a second time modulation signal connected to the first end of the third storage capacitor, and stops emitting light when the second time modulation signal reaches a preset threshold value.

In some of the alternative embodiments, the first and second,

The second data writing sub-circuit includes: a first transistor, a second transistor, a third transistor, an inverter, and a second storage capacitor, wherein: a first end of the first transistor is connected with a data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected with a first scanning signal; the first end of the second transistor is connected to the second node, the second end of the second transistor is connected to the first time modulation signal inverted by the phase inverter, and the control end of the second transistor is connected to the first scanning signal; the first end of the third transistor is connected to the second node, the second end of the third transistor is accessed to the first time modulation signal inverted by the inverter, and the control end of the third transistor is accessed to the second scanning signal; the first end of the second storage capacitor is connected to the first node, the second end is connected to the second node, and the time signal writing sub-circuit comprises: a third storage capacitor, a first end of the third storage capacitor is connected to the second time modulation signal, a second end is connected to the first node,

the driving method comprises the following steps:

threshold compensation and data writing phase: the current amplitude control circuit reads a data signal and supplies a driving current to the light emitting unit, and the time modulation circuit switches in the data signal in response to a first scan signal and writes the data signal into a first terminal of the second storage capacitor, and switches in a first time modulation signal having a first level and inverted into a second terminal of the second storage capacitor in response to the first scan signal;

and a light emitting modulation stage:

a duration determination stage for receiving the inverted first time modulation signal with the second level in response to the second scan signal to determine the light emitting duration through coupling,

In some alternative embodiments, the time modulation circuit includes a second data writing sub-circuit, and the time signal writing sub-circuit, the second data writing sub-circuit including: a first transistor and a second storage capacitor, wherein: a first end of the first transistor is connected with a data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected with a first scanning signal; the first end of the second storage capacitor is connected to the first node, the second end is connected to the first time modulation signal, the first end of the second storage capacitor is connected to the first node, the second end is connected to the second node, and the time signal writing sub-circuit comprises: a third storage capacitor, a first end of the third storage capacitor is connected to the second time modulation signal, a second end is connected to the first node,

the driving method comprises the following steps:

threshold compensation and data writing phase: the current amplitude control circuit reads the data signal and provides a driving current for the light-emitting unit, and the second data writing sub-circuit responds to the first scanning signal to access the data signal and write the data signal into the first end of the second storage capacitor;

and a light emitting modulation stage:

a time length determining stage, the second storage capacitor responds to the first time modulation signal accessed by the second end to determine the light emitting time length through the coupling action,

and a light emitting control stage: the light-emitting unit emits light under the control of the driving current provided by the current amplitude control circuit and a second time modulation signal connected to the first end of the third storage capacitor, and stops emitting light when the second time modulation signal reaches a preset threshold value.

The invention has the following beneficial effects:

the pixel circuit, the driving method thereof and the display device are provided, the current amplitude control circuit and the time modulation circuit are arranged, the current amplitude control circuit and the time modulation circuit are connected into the same data signal under the control of a first scanning signal, meanwhile, the time modulation circuit responds to the first time modulation signal and transmits driving current to the light emitting unit, responds to an input second time modulation signal and stops transmitting the driving current to the light emitting unit, only one data signal is needed in each frame of picture display, then current and time control can be completed, data volume is effectively simplified, the burden of a driving chip is reduced, display control can be achieved by using a chip with high performance, product cost is reduced, and the display device has wide application prospect.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic circuit schematic of a pixel circuit according to the prior art;

FIG. 2 is a timing diagram of the pixel circuit shown in FIG. 1;

FIG. 3 is a schematic block diagram of a pixel circuit according to an embodiment of the present invention;

FIG. 4 is a schematic circuit schematic of a pixel circuit according to one embodiment of the invention;

FIG. 5 is a timing diagram of the pixel circuit of the embodiment shown in FIG. 4;

FIG. 6 is a schematic circuit schematic of a pixel circuit according to another embodiment of the invention;

FIG. 7 is a timing diagram of the pixel circuit of the embodiment shown in FIG. 6;

FIG. 8 is a schematic circuit diagram of a pixel circuit according to another embodiment of the invention; and

fig. 9 is a timing diagram of the pixel circuit of the embodiment shown in fig. 8.

Detailed Description

In order to more clearly illustrate the present application, the present application is further described below in conjunction with the preferred embodiments and the accompanying drawings. Similar parts in the figures are denoted by the same reference numerals. It is to be understood by persons skilled in the art that the following detailed description is illustrative and not restrictive, and is not intended to limit the scope of the present application.

It should be noted that the ordinal numbers "first", "second", "third", … …, etc., are not intended to limit the order of individual elements, nodes, elements or components, but are merely intended to distinguish between the individual elements, nodes, elements or components. The terms "comprises," "comprising," or "having," when used in this specification, are intended to be open-ended, i.e., to encompass a element, node, component, or section, but also to encompass other elements, nodes, components, or sections, in addition to or in addition to such elements, nodes, components, or sections.

The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices with the same characteristics, and since the source and drain of the transistors used herein are symmetrical, the source and drain may be interchanged. In the embodiment of the present invention, the gate of the transistor is referred to as a control terminal, one of the source and the drain is referred to as a first terminal, and the other is referred to as a second terminal. In the embodiments of the present invention, the first terminal of the transistor is referred to as a source, and the second terminal is referred to as a drain. In addition, the embodiments of the present invention may employ transistors including a P-type transistor or an N-type transistor, and the P-type transistor is described as an example for convenience of description. It should be understood by those skilled in the art that when the transistor is N-type, the specific structure of the circuit is not affected, and the potential of the driving transistor only needs to be adjusted appropriately.

The inventor researches and discovers that in the prior art, when the light emitting units are micro inorganic light emitting diodes (such as micro leds or minileds), in order to accurately realize gray scale control, the amplitude and duration of current flowing through each light emitting unit need to be controlled simultaneously in the picture display of each frame of image. As shown in fig. 1, a pixel circuit for modulating a gray scale by using a current amplitude and a duration together, since a period of a Frame includes a plurality of light-emitting periods with different time lengths, taking a timing chart illustrated in fig. 2 as an example, in the period of a Frame (1Frame), a light-emitting control signal provided by a light-emitting control signal terminal EM has 3 effective level periods with different time lengths; when the scanning signal provided by the scanning signal terminal GateA is at an active level, writing and storing the current data Vdata _ I in the storage capacitor C1; before the light-emitting control signal provided by the light-emitting control signal terminal EM is effective, writing and storing the duration data signal Vdata _ T into the storage capacitor C2 under the control of the time control signal terminal GateB; in the time periods T1, T2 and T3 when the light emitting control signal provided by the light emitting control signal terminal em (n) is at the active level, the current data signal Vdata _ I and the duration data signal Vdata _ T simultaneously act on the light emitting device, and if the Vdata _ I in the storage capacitor C1 is at the high level voltage, and the Vdata _ T stored in the storage capacitor C2 is at the active level voltage which can turn on the transistor T8 in the time periods T1, T2 and T3, the cumulative light emitting duration of the light emitting unit in the frame is (T1+ T2+ T3). It can be understood that, within a time of one Frame (1Frame), the emission control signal EM has several active level time periods with different durations, and as the number of the active level time periods increases, the amount of the time data signal increases by multiple, which has higher requirements on the performance of the driver chip, and will increase the product cost.

In order to solve at least one of the above problems, as shown in fig. 3, an embodiment of the present invention provides a pixel circuit including a current amplitude control circuit 100, a light emitting unit 200, and a time modulation circuit 300, wherein:

a current amplitude control circuit 100 including a first data writing sub-circuit accessing a data signal in response to a first scan signal, storing the data signal based on a first storage capacitor, and a light emission control sub-circuit supplying a driving current to the light emitting unit 200 in response to a light emission control signal, wherein the driving current is a signal generated based on the first scan signal and the data signal;

and a time modulation circuit 300 including a second data writing sub-circuit which accesses a data signal in response to the first scan signal and stores it in the second storage capacitor, and transmits a driving current to the light emitting unit in response to the first time modulation signal, and a time signal writing sub-circuit which stops transmitting the driving current to the light emitting unit in response to the inputted second time modulation signal.

In this embodiment, by providing the current amplitude control circuit and the time modulation circuit, the current amplitude control circuit and the time modulation access the same data signal under the control of the first scanning signal, and at the same time, the time modulation circuit transmits the driving current to the light emitting unit in response to the first time modulation signal, and stops transmitting the driving current to the light emitting unit in response to the input second time modulation signal, so that only one data signal is needed in each frame of picture display to complete the current and time control, thereby effectively simplifying the data volume, reducing the burden of the driving chip, reducing the product cost, and having a wide application prospect.

The pixel circuit of the embodiment of the present invention is described in detail below with reference to specific examples, and in the following embodiments, the time modulation circuits 300 having different example structures will be distinguished by different labels such as 300-1, 302-2, 300-3.

In a specific example, as shown in fig. 4, the pixel circuit includes a current amplitude control circuit 100, a light emitting unit 200, and a time modulation circuit 300-1.

The light emitting unit 200 includes at least one light emitting device D, and in the embodiment of the present invention, the light emitting device D may be a micro led or a MiniLED, but the present application is not limited thereto, and the light emitting device D may also be another light emitting device whose display brightness is affected by both current and time. The light emitting unit 200 may include a plurality of light emitting devices D connected in series or a plurality of light emitting devices D connected in parallel or a plurality of light emitting devices D combined in series and parallel.

The current amplitude control circuit 100 includes a first data writing sub-circuit and a light emission control sub-circuit. The first data writing sub-circuit includes a first storage capacitor C1, a scan switch transistor T4, a driving transistor T5, and a threshold compensation transistor T6. The first data writing sub-circuit writes and stores the data signal Vdata of the data signal terminal data (n) in the first storage capacitor C1 in response to the first scan signal of the first scan signal terminal gate (n). The light emission control sub-circuit includes a first light emission control transistor T8 and a second light emission control transistor T9, and supplies a driving current to the light emitting unit 200 in response to a light emission control signal of a light emission control signal terminal em (n).

In particular, in the embodiment of the present invention, the time modulation circuit 300-1 includes a second data writing sub-circuit, and a time signal writing sub-circuit.

The second data writing sub-circuit switches in the data signal Vdata in response to the first scan signal of the first scan signal terminal gate (n) and stores the data signal Vdata in the second storage capacitor C2, and transmits the driving current to the light emitting unit 200 in response to the first time modulation signal of the first time modulation signal terminal sw (n), and the time signal writing sub-circuit controls the second data writing sub-circuit to stop transmitting the driving current to the light emitting unit 200 in response to the second time modulation signal inputted from the second time modulation signal terminal vtri (n).

In the embodiment of the present invention, the data signal Vdata can be simultaneously written into the current amplitude control circuit 100 and the time modulation circuit 300 by the control of the first scan signal and stored in the first storage capacitor C1 and the second storage capacitor C2, respectively, and the first data writing sub-circuit can be controlled to supply the driving current to the light emitting unit 200 by the stored data signal Vdata under the action of the first time modulation signal, and the time signal writing sub-circuit can stop the transmission of the driving current to the light emitting unit 200 based on the control of the first time modulation signal, so that the control of the current amplitude and the light emitting time can be realized only by using the data signal Vdata.

Specifically, in the present example, the second data writing sub-circuit includes: a first transistor T1, a second transistor T2, a third transistor T3, and a second storage capacitor C2. The first transistor T1 has a first terminal connected to the data signal Vdata, a second terminal connected to the first node N1, and a control terminal connected to a first scan signal at a first scan signal terminal gate (N), where the first scan signal may be a row scan signal provided by a gate driver circuit (GOA) for a row in which the pixel circuit is located. The first end of the second transistor T2 is connected to the second node N2, the second end is connected to the first time modulation signal of the first time modulation signal terminal sw (N), and the control end is connected to the first scan signal of the first scan signal terminal gate (N). A first terminal of the third transistor T3 is connected to the second node N2, a second terminal thereof is connected to the first time modulation signal of the first time modulation signal terminal sw (N), a control terminal thereof is connected to the second scan signal of the second scan signal terminal Gate (N +1), a first terminal of the second storage capacitor C2 is connected to the first node N1, and a second terminal thereof is connected to the second node N2, wherein the second scan signal may be a row scan signal provided by the GOA for a row next to a row in which the pixel circuit is located. Of course, those skilled in the art will understand that the present invention is not intended to limit the specific form and signal source of each signal, as long as the signals can satisfy the driving principle of the pixel circuit of the embodiment of the present invention.

Specifically, in the present example, the time signal writing sub-circuit includes the third storage capacitance C3. The first terminal of the third storage capacitor C3 is connected to a second time modulation signal of the second time modulation signal terminal vtri (N), and the second terminal is connected to the first node N1, where the second time modulation signal is a signal whose amplitude changes proportionally with time, such as a ramp signal, a triangle wave signal, etc.

In the current amplitude control circuit 100, a first terminal of the scan switch transistor T4 is connected to the data signal Vdata of the data signal terminal, a second terminal thereof is connected to the third node N3, and a control terminal thereof is connected to the first scan signal of the first scan signal terminal gate (N). The driving transistor T5 has a first terminal connected to the third node N3, a second terminal connected to the fourth node N4, and a control terminal connected to the fifth node N5. The threshold compensation transistor T6 has a first terminal connected to the fourth node N4, a second terminal connected to the fifth node N5, and a control terminal connected to the first scan signal of the first scan signal terminal gate (N). The current amplitude control circuit 100 further includes: a first reset transistor T7 and a light emitting transistor T10. A first terminal of the first reset transistor T7 is connected to the fifth node N5, a second terminal is connected to the first power signal of the first power signal terminal Vinit, a control terminal is connected to the reset signal of the reset signal terminal RST, the first reset transistor T7 is configured to reset the first storage capacitor C1 to ensure correctness of each image display, and optionally, the reset signal may be a row scan signal provided by the GOA and corresponding to a row of the pixel circuit. The first end of the first light emitting control transistor T8 is connected to the second power signal of the second power signal terminal VDD, the second end is connected to the third node N3, and the control end is connected to the light emitting control signal of the light emitting control signal terminal em (N). The first end of the first storage capacitor C1 is connected to the second power signal, and the second end is connected to the fifth node N5. The second light emission controlling transistor T9 has a first terminal connected to the fourth node N4, a second terminal connected to the first terminal of the light emission transistor T10, and a control terminal receiving the light emission control signal from the light emission control signal terminal em (N). The second terminal of the light emitting transistor T10 is connected to the anode of the light emitting cell 200, and the control terminal is connected to the first node N1.

In addition, optionally, the current amplitude control circuit 100 further includes a second reset transistor T11, a first terminal of the second reset transistor is connected to the anode of the light emitting unit 200, a second terminal of the second reset transistor is connected to the first power signal of the first power signal terminal Vinit, and a control terminal of the second reset transistor is connected to the reset signal of the reset signal terminal RST. The second reset transistor T11 is used to reset the light emitting cell 200 in response to a reset signal.

In order to clarify the operation principle of the pixel circuit in the embodiment of the present application, a driving method of the pixel circuit in the embodiment of the present application is described below, and a specific process is described with reference to fig. 4 and with reference to the timing chart of fig. 5.

An embodiment of the present application provides a driving method using the pixel circuit, including:

the current amplitude control circuit 100 accesses the data signal Vdata in response to the first scan signal of the first scan signal terminal gate (n), stores the data signal Vdata based on the first storage capacitor C1, and supplies a driving current to the light emitting unit 200 in response to the light emission control signal of the light emission control signal terminal em (n);

the time modulation circuit 300-1 switches in the data signal Vdata in response to the first scan signal of the first scan signal terminal gate (n) and stores it in the second storage capacitor C2, and transmits a driving current to the light emitting unit in response to the first time modulation signal of the first time modulation signal terminal sw (n), and stops transmitting the driving current to the light emitting unit 200 in response to the inputted second time modulation signal, wherein the driving current is a signal generated based on the first scan signal and the data signal.

Specifically, as shown in fig. 4, the driving method includes: a reset phase, a threshold compensation and data writing phase, and a light emission modulation phase.

Reset phase t 1:

when the reset signal (timing diagram not shown) of the reset signal terminal RST shown in fig. 4 is at a low level, the first reset transistor T7 and the second reset transistor T11 in the current magnitude control circuit 100 are turned on to couple the first power signal of the first power signal terminal Vinit to the second terminal of the first storage capacitor C1 and the anode of the light emitting cell 200. Optionally, the first power signal is a DC signal with a voltage amplitude of-3-0V, which is exemplary only and is not intended to be limiting. In this example, the reset of the current amplitude control circuit 100 is completed by discharging the first storage capacitor C1 and the light emitting cell 200.

At this stage, the scan switch transistor T4 is turned off, the light emission control signal of the light emission control signal terminal em (n) keeps high level and is switched in the first light emission control transistor T8 and the second light emission control transistor T9, both of which keep off, and the light emitting unit 200 does not emit light.

Threshold compensation and data write phase t 2:

the first scan signal at the first scan signal terminal gate (n) is at a low level, and at this time, the scan switch transistor T4, the driving transistor T5, and the threshold compensation transistor T6 are all turned on, and the first data writing sub-circuit writes the data signal Vdata and stores the data signal in the first storage capacitor C1 by charging the first storage capacitor C1. In addition, when the first storage capacitor C1 is balanced in potential, the potential of the control terminal (gate) of the driving transistor T5 is (Vdata + Vth _ \:)_T5) The threshold voltage Vth \ "u is applied to the driving transistor T5_T5Compensation of (2).

Meanwhile, since the first scan signal of the first scan signal terminal gate (n) is at a low level, the first transistor T1 and the second transistor T2 in the time modulation circuit 300-1 are also turned on, the second data writing sub-circuit writes the data signal Vdata and stores the data signal in the second storage capacitor C2 by charging the second storage capacitor C2, and when the potentials are balanced, the potential of the first terminal of the second storage capacitor C2 is VH, at this time, since the second transistor T2 is turned on, the second data writing sub-circuit connects the first time modulation signal of the first time modulation signal terminal sw (n) to the second terminal of the second storage capacitor C2 to charge the terminal electrode, and when the potentials are balanced, the second storage capacitor C2 holds (Vdata-VH) between the two terminals.

And a light emitting modulation stage: comprising a duration determination phase t3 and a lighting control phase t4, wherein:

duration determination stage t 3: the first scan signal at the first scan signal terminal gate (n) is at a high level, and the first transistor T1 and the second transistor T2 in the time modulation circuit 300-1 are turned off. The second scan signal of the second scan signal terminal Gate (n +1) maintains a low level and the third transistor T3 is turned on. The first time modulation signal at the first time modulation signal terminal sw (n) still remains connected to the second storage capacitor C2, but the first time modulation signal jumps to the low level VL. The second terminal of the second storage capacitor C2 is switched on at a low level VL, which is written to. The first terminal of the second storage capacitor C2 jumps to (Vdata-VH + VL) due to the coupling effect.

Whether the light emitting transistor T10 can be turned on or not depends on Vgs \ u_T10And Vth \ u_T10The magnitude relationship of (1). Due to Vgs __T10That is, when VH and VL are constant, the magnitude of the data signal Vdata determines whether the light-emitting transistor T10 can be turned on. In the embodiment of the invention, in the duration determination stage T3, the amplitude of the data signal Vdata is determined according to whether the light emitting transistor T10 needs to be turned on after the potential of the second storage capacitor C2 is balanced. It will be understood by those skilled in the art that the light emitting transistor T10 can satisfy Vgs _uafter the potential of the second storage capacitor C2 is balanced in the duration determination period T3 by appropriately setting the sizes of VH and VL_T10-Vth__T10<0, the light emitting transistor T10 is turned on.

In conjunction with the following turn-off mechanism, the magnitude of the data signal Vdata will determine the turn-on duration of the light emitting transistor T10, i.e. the light emitting duration of the light emitting unit 200, with VH and VL determined. Therefore, the second memory cell C2 determines the light emitting time period of the light emitting cell 200 through the coupling effect at the time period determination stage t 3.

Lighting control phase t 4: the light emitting unit 200 emits light under the control of the driving current provided by the current amplitude control circuit 100 and a second time modulation signal of a second time modulation signal terminal vtri (n) connected to the first terminal of the third storage capacitor C3, and the light emitting unit 200 stops emitting light when the second time modulation signal reaches a predetermined threshold value.

Specifically, a light emission control signal terminal EM: (n), the first emission control transistor T8 and the second emission control transistor T9 are kept at a low level, the first scan signal of the first scan signal terminal Gate (n) and the second scan signal of the second scan signal terminal Gate (n +1) are at a high level, the second transistor T2 and the third transistor T3 are turned off, the second terminal of the second storage capacitor C2 is no longer affected by the first time modulation signal of the first time modulation signal terminal sw (n), and the control terminal of the emission transistor T10 is at an on state (Vdata-VH + VL + Vth \\ \/u)_T10) The light emitting cell 200 starts emitting light during a low level period because vtri (N) is turned on to a signal whose amplitude is changed in proportion to time, and the modulation signal becomes gradually larger from the initial 0 stage from the second time, and the voltage of the first node N1 is gradually raised by the coupling action until the light emitting transistor T10 satisfies Vgs \u_T10-Vth__T10At time point 0, the light emitting transistor T10 is turned off, and the light emitting unit 200 stops emitting light. Therefore, by turning off the circuit, the timing of stopping light emission of the light emitting unit 200 is determined by the coupling action of the third storage capacitor C3 and by the second time modulation signal having a signal whose amplitude changes in proportion to time. It will be understood by those skilled in the art that in the present embodiment, the predetermined threshold is such that the light emitting transistor T10 satisfies Vgs __T10-Vth__T10When the value is 0, the amplitude of the second time modulation signal is determined according to the values of input Vdata, VH, VL.

Meanwhile, through the above analysis, under the condition that the amplitude of the second time modulation signal is constant, the specific value of the input data signal Vdata determines the light emitting time of the light emitting unit 200. When the value of Vdata is larger, (Vdata-VH + VL) is larger, the time required for the light emitting transistor T10 to turn off is shorter.

In addition, as can be seen from the timing waveforms shown in fig. 5, the switching control signal is consistent with the row scanning signal provided by the conventional GOA circuit and the light emission control signal provided by the EOA circuit, and the switching control mechanism is simple.

In the embodiment of the invention, by setting the time modulation circuit 300-1, specifically by the second data writing sub-circuit, the picture driving current and the light emitting duration can be controlled by writing the data signal Vdata in one scanning, and by introducing the turn-off circuit, the turn-off time is automatically controlled according to the data signal, a plurality of data signals for controlling the light emitting duration do not need to be given in a plurality of times, so that the data volume is greatly reduced, the duration can be controlled by utilizing the existing circuit signal output of the existing GOA circuit and the EOA, the complicated PWM signal output is not needed, and the control difficulty is further reduced. Therefore, through the embodiment of the invention, gray scale control can be completed without increasing the performance requirement on the driving chip, the product cost is reduced, and the invention has wide application prospect.

Considering that in the examples shown in fig. 4 and 5, the first time modulation signal of the first time modulation signal terminal sw (n) is at a high level during the time periods T1, T2, and T4, and is at a low level during the time period T3, although there is an advantage that the time modulation signal can be provided by using the conventional GOA, during the time period T4, the terminal sw (n) is kept at the high level, and the second terminal electrode of the second storage capacitor C2 is kept at the low level, so that leakage current of the second transistor T2 and the third transistor T3 is significant, and the display effect may be affected.

Therefore, in an alternative embodiment, the signals coupled to the second terminal of the second transistor T2 and the second terminal of the third transistor T3 are modified to: the high level is maintained for the period T2 and the low level is maintained for the periods T1, T3, and T4 to reduce leakage of the second transistor T2 and the third transistor T3.

In a specific implementation, an inverter may be added between the second transistor T2 and the third transistor T3 and the first time modulation signal terminal sw (n), so that the first time modulation signal is inverted and then connected to the second terminal of the second transistor T2 and the second terminal of the third transistor T3.

In another specific example, as shown with reference to fig. 6, the time modulation circuit 300-2 includes a second data writing sub-circuit, and a time signal writing sub-circuit.

Specifically, in the present example, the second data writing sub-circuit includes: a first transistor T1, a second transistor T2, a third transistor T3, and a second storage capacitor C2. The first transistor T1 has a first terminal connected to the data signal Vdata, a second terminal connected to the first node N1, and a control terminal connected to a first scan signal at a first scan signal terminal gate (N), where the first scan signal may be a row scan signal provided by a gate driver circuit (GOA) for a row in which the pixel circuit is located. The second transistor T2 has a first terminal connected to the second node N2, a second terminal connected to the first time modulation signal inverted by the inverter, and a control terminal connected to the first scan signal of the first scan signal terminal gate (N). The third transistor T3 has a first terminal connected to the second node N2, a second terminal connected to the first time modulation signal inverted by the inverter, a control terminal connected to the second scan signal of the second scan signal terminal Gate (N +1), a first terminal connected to the first node N1 of the second storage capacitor C2, and a second terminal connected to the second node N2, wherein the second scan signal may be a row scan signal provided by the GOA for a row next to a row of the pixel circuit. Of course, those skilled in the art will understand that the present invention is not intended to limit the specific form and signal source of each signal, as long as the signals can satisfy the driving principle of the pixel circuit of the embodiment of the present invention.

Specifically, in the present example, the time signal writing sub-circuit includes the third storage capacitance C3. The first terminal of the third storage capacitor C3 is connected to the second time modulation signal of the second time modulation signal terminal vtri (N), the second terminal is connected to the first node N1, and the second time modulation signal is a signal whose amplitude changes proportionally with time.

In this embodiment, the circuit structure of the current amplitude control circuit 100 is the same as the example shown in fig. 4, and is not described again here.

The driving method of this embodiment is also similar to that of the pixel circuit in fig. 4, except for the threshold compensation and data writing phase t2 and the duration writing phase t3 in the emission modulation phase. The specific procedure of the threshold compensation and data writing phase t2 and the duration writing phase t3 in the emission modulation phase in the driving method of the pixel circuit of this embodiment is described below with reference to the timing chart of fig. 7.

It should be noted that, in order to ensure the normal driving of the pixel circuit, the first time modulation signal can be selected reasonably by those skilled in the art. For example, in this example, the first time modulation signal may be a row scanning signal of a row in which the pixel circuit is located, which is output by the GOA circuit, as the first time modulation signal, so that the signal input to the second terminal of the second storage capacitor is ensured to be at the high level VH in the stage t3, and the signal input to the second terminal of the second storage capacitor is ensured to be at the low level in the stage t 4.

Threshold compensation and data write phase 2: the current amplitude control circuit reads the data signal and supplies the driving current to the light emitting unit 200, and the time modulation circuit switches in the data signal and writes the data signal to the first terminal of the second storage capacitor in response to the first scan signal, and switches in the inverted first time modulation signal having the first level to the second terminal of the second storage capacitor C2 in response to the first scan signal;

duration write phase t3 in the emission modulation phase: in response to the second scan signal of the second scan signal terminal Gate (n +1), the second terminal of the second storage capacitor C2 receives the inverted first time modulation signal having the second level to determine the light emitting time period through the coupling effect.

Those skilled in the art will understand that the same driving steps can refer to the above description of the circuit structure in fig. 4, and are not described herein again.

In another alternative embodiment, the structure of the pixel circuit can be further simplified by using the emission control signal EM given by the existing EOA circuit.

In a specific example, referring to fig. 8, the pixel circuit includes a current amplitude control circuit 100, a light emitting unit 200, and a time modulation circuit 300-3.

The light emitting unit 200 includes at least one light emitting device D, and in the embodiment of the present invention, the light emitting device D may be a micro led or a MiniLED, but the present application is not limited thereto, and may also be another light emitting device whose display brightness is affected by both current and time. The light emitting unit 200 may include a plurality of light emitting devices D connected in series or a plurality of light emitting devices D connected in parallel or a plurality of light emitting devices D combined in series and parallel.

The current amplitude control circuit 100 includes a first data writing sub-circuit and a light emission control sub-circuit. The first data writing sub-circuit includes a first storage capacitor C1, a scan switch transistor T4, a driving transistor T5, and a threshold compensation transistor T6. The first data writing sub-circuit responds to a first scanning signal of a first scanning signal terminal gate (n) to access a data signal Vdata, and stores the data signal based on the first storage capacitor C1. The light emission control sub-circuit includes a first light emission control transistor T8 and a second light emission control transistor T9, and provides a driving current to the light emitting unit 200 in response to a light emission control signal of the light emission control signal terminal em (n), wherein the driving current is a signal generated based on the first scan signal and the data signal.

The time modulation circuit 300-3 includes a second data writing sub-circuit, and a time signal writing sub-circuit.

In particular, in the present embodiment, the second data writing sub-circuit includes: a first transistor T1, and a second storage capacitor C2. The first transistor T1 has a first terminal connected to the data signal Vdata, a second terminal connected to the first node N1, and a control terminal connected to a first scan signal at a first scan signal terminal gate (N), where the first scan signal may be a row scan signal provided by a gate driver circuit (GOA) for a row in which the pixel circuit is located. The first end of the second storage capacitor C2 is connected to the first node N1, and the second end is connected to the first time modulation signal of the first time modulation signal terminal sw (N). Preferably, in this embodiment, the first time modulation signal sw (n) may be a signal EM provided by the EOA circuit, and specifically may be a light emitting control signal of a row above the row where the pixel circuit is located.

As can be seen from the timing diagram of fig. 9, the light-emitting control signal in the row above the row of the pixel circuits may be both high level in the time period T2 and low level in the time period T3, and it can be ensured that the low level is maintained in the time period T4, and only the second time modulation signal affects the potential at the first node N1 in the time period T4, so as to ensure that the light-emitting transistor T10 is normally turned on in the time period T4, and that only the second time modulation signal controls the light-emitting transistor T10 to be turned off.

In addition, specifically, in the present example, the time signal writing sub-circuit includes the third storage capacitance C3. The first terminal of the third storage capacitor C3 is connected to the second time modulation signal of the second time modulation signal terminal vtri (N), the second terminal is connected to the first node N1, and the second time modulation signal is a signal whose amplitude changes proportionally with time.

It should be noted that, in this example, the structure of the driving control circuit 100 is the same as that of the above embodiment, and is not described again here.

In order to clarify the operation principle of the pixel circuit in the embodiment of the present application, a driving method of the pixel circuit in the embodiment of the present application is described below, and a specific process is described with reference to fig. 8 and with reference to a timing chart of fig. 9.

the current amplitude control circuit 100 accesses a data signal in response to a first scan signal, stores the data signal based on the first storage capacitor C1 and supplies a driving current to the light emitting unit 200 in response to a light emission control signal;

the time modulation circuit 300-1 switches in a data signal in response to the first scan signal and stores in the second storage capacitor C2, and transmits a driving current to the light emitting unit in response to the first time modulation signal, and stops transmitting the driving current to the light emitting unit 200 in response to the inputted second time modulation signal.

Specifically, as shown in fig. 9, the driving method includes: a reset phase, a threshold compensation and data writing phase, and a light emission modulation phase.

Reset phase t 1:

when the reset signal (timing diagram not shown) of the reset signal terminal RST shown in fig. 8 is at a low level, the first reset transistor T7 and the second reset transistor T11 in the current magnitude control circuit 100 are turned on to couple the first power signal of the first power signal terminal Vinit to the second terminal of the first storage capacitor C1 and the anode of the light emitting cell 200. Optionally, the first power signal is a DC signal and the voltage amplitude is-3 ~ 0V, although this is exemplary only and the invention is not intended to be limited. In this example, the reset of the current amplitude control circuit 100 is completed by discharging the first storage capacitor C1 and the light emitting cell 200.

Threshold compensation and data write phase t 2:

Meanwhile, since the first scan signal is at a low level, the first transistor T1 in the time modulation circuit 300-1 is turned on, the second data writing sub-circuit writes the data signal Vdata and stores the data signal in the second storage capacitor C2 by charging the second storage capacitor C2, and since the first time of the first time modulation signal terminal EM (n-1) is at a high level VH, when the potentials are balanced, the potential of the first terminal of the second storage capacitor C2 is VH, the second data writing sub-circuit connects the first time modulation signal of the first time modulation signal terminal sw (n) to the second terminal of the second storage capacitor C2 to charge the terminal, and when the potentials are balanced, the second storage capacitor C2 is held between the two terminals (Vdata-VH).

duration determination stage t 3: the first scan signal at the first scan signal terminal gate (n) is at a high level, and the first transistor T1 in the time modulation circuit 300-3 is turned off. The first time-modulated signal remains switched into the second storage capacitor C2, but now the first time-modulated signal jumps to the low level VL. The second terminal of the second storage capacitor C2 is switched to the low level VL, and the terminal electrode becomes the low level VL. The first terminal of the second storage capacitor C2 jumps to (Vdata-VH + VL) due to the coupling effect.

Whether the light emitting transistor T10 can be turned on or not depends on Vgs \ u_T10And Vth \ u_T10The magnitude relationship of (1). Due to Vgs __T10That is, when VH and VL are constant, the magnitude of the data signal Vdata determines whether the light-emitting transistor T10 can be turned on. In the embodiment of the invention, after the second storage capacitor C2 is potential balanced in the duration determination period T3, the amplitude of the data signal Vdata is determined according to whether the light emitting transistor T10 needs to be turned on. It will be understood by those skilled in the art that the light emitting transistor T10 satisfies (Vgs _u) after the potential of the second storage capacitor C2 is balanced in the duration determination period T3 by appropriately setting the sizes of VH and VL_T10-Vth__T10)<0, the light emitting transistor T10 is turned on.

In conjunction with the following turn-off mechanism, the magnitude of the data signal Vdata will determine the turn-on duration of the light emitting transistor T10, i.e. the light emitting duration of the light emitting unit 200, with VH and VL determined. Therefore, the duration determining stage t3, the second memory cell C2 determines the light emitting duration of the light emitting cell 200 through the coupling effect.

Lighting control phase t 4: the light emitting unit 200 emits light under the control of the driving current provided by the current amplitude control circuit 100 and the second time modulation signal connected to the first terminal of the third storage capacitor C3, and the light emitting unit 200 stops emitting light when the second time modulation signal reaches a predetermined threshold value.

Specifically, the emission control signal em (n) is at a low level, the first and second light emitting transistors T8 and T9 are kept turned on, and the control terminal of the light emitting transistor T10 is turned on (Vdata-VH + VL + Vth \/v_T10) The light emitting cell 200 starts emitting light during a low level period because vtri (N) is turned on to a signal having a magnitude that is proportional to time, and gradually increases from a stage where the magnitude is initially 0, and gradually raises the voltage of the first node N1 (i.e., the gate voltage of the light emitting transistor T10) by coupling until the light emitting transistor T10 satisfies Vgs \_ \ u_T10＝Vth__T10At this time, the light emitting transistor T10 is turned off, and the light emitting unit 200 stops emitting light. Thus, by switching off the circuit, the coupling effect of the third storage capacitor C3 is utilized, and the amplitude of the coupling effect appears over timeThe second time modulation signal of the proportional change acts to determine the light emission stop timing of the light emitting unit 200. It will be understood by those skilled in the art that in the present embodiment, the predetermined threshold is such that the light emitting transistor T10 satisfies Vgs \ u_T10-Vth__T10When the value is 0, the predetermined threshold value is determined according to the values of input Vdata, VH, VL.

Meanwhile, through the above analysis, under the condition that the second time modulation signal of vtri (n) is constant, the specific amplitude of the input data signal Vdata determines the light emitting duration of the light emitting unit 200. When the value of Vdata is larger, (Vdata-VH + VL) is larger, the time required for the light emitting transistor T10 to turn off is shorter.

In the embodiment of the invention, the data signal is written in one scanning mode by arranging the time modulation circuit 300-3, particularly by the second data writing sub-circuit, that is, the driving current and the duration of luminous display can be controlled, and the turn-off time is automatically controlled according to the data signal by introducing the turn-off circuit, so that the data signals of a plurality of control times do not need to be given in a plurality of times, and the data volume is greatly reduced. Meanwhile, the output signal of the existing EOA circuit is utilized to further simplify the structure of the pixel circuit, thereby further reducing the product cost while finishing the gray scale control and having wide application prospect.

It should be noted that, although the emission control signal EM is used as the first time modulation signal in this example, the present invention is not limited thereto. In some optional embodiments, the first time modulation signal may also be shown in fig. 6, the inverted first scan signal is used as the first time modulation signal, gray scale control can be realized according to the simplified circuit shown in fig. 8, and the time modulation signal can be provided by using the existing circuit structure.

Another aspect of the present application also provides a display device including the pixel circuit according to the embodiment of the present application. The specific implementation manner of this embodiment is the same as that of the previous embodiment, and is not described herein again.

It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.

Claims

1. A pixel circuit comprising a current amplitude control circuit, a light emitting unit, and a time modulation circuit, wherein:

the current amplitude control circuit comprises a first data writing sub-circuit and a light-emitting control sub-circuit, wherein the first data writing sub-circuit is used for accessing a data signal in response to a first scanning signal, storing the data signal based on a first storage capacitor, and providing a driving current to the light-emitting unit in response to a light-emitting control signal, and the driving current is a signal generated based on the first scanning signal and the data signal;

the time modulation circuit comprises a second data writing sub-circuit and a time signal writing sub-circuit, wherein the second data writing sub-circuit is used for responding to the first scanning signal, accessing the data signal and storing the data signal in a second storage capacitor, and responding to a first time modulation signal to transmit the driving current to the light-emitting unit, and the time signal writing sub-circuit is used for responding to an input second time modulation signal to stop transmitting the driving current to the light-emitting unit.

2. The pixel circuit according to claim 1, wherein the second data writing sub-circuit comprises: a first transistor, a second transistor, a third transistor, and a second storage capacitor, wherein:

a first end of the first transistor is connected to the data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected to the first scanning signal;

a first end of the second transistor is connected to a second node, a second end of the second transistor is connected to the first time modulation signal, and a control end of the second transistor is connected to the first scanning signal;

a first end of the third transistor is connected to the second node, a second end of the third transistor is connected to the first time modulation signal, and a control end of the third transistor is connected to a second scanning signal;

3. The pixel circuit according to claim 1, wherein the second data writing sub-circuit comprises: a first transistor, a second transistor, a third transistor, an inverter, and a second storage capacitor, wherein:

the first end of the second transistor is connected to a second node, the second end of the second transistor is connected to the first time modulation signal inverted by the phase inverter, and the control end of the second transistor is connected to the first scanning signal;

a first end of the third transistor is connected to the second node, a second end of the third transistor is connected to the first time modulation signal inverted by the inverter, and a control end of the third transistor is connected to a second scanning signal;

4. The pixel circuit according to claim 1, wherein the second data writing sub-circuit comprises: a first transistor and a second storage capacitor, wherein:

5. The pixel circuit according to any one of claims 2 to 4, wherein the time signal writing sub-circuit comprises: a third storage capacitor having a first terminal connected to the second time modulation signal and a second terminal connected to the first node,

6. The pixel circuit according to any one of claims 2-4,

the first data writing sub-circuit includes: a scan switch transistor, a drive transistor, a threshold compensation transistor, and the first storage capacitor,

the light emission control sub-circuit includes: a first light emission control transistor and a second light emission control transistor,

a first end of the scanning switch transistor is connected to the data signal, a second end of the scanning switch transistor is connected to a third node, and a control end of the scanning switch transistor is connected to the first scanning signal;

the first end of the first reset transistor is connected to the fifth node, the second end of the first reset transistor is connected to a first power supply signal, and the control end of the first reset transistor is connected to a reset signal;

a first end of the first light-emitting control transistor is connected to a second power supply signal, a second end of the first light-emitting control transistor is connected to the third node, and a control end of the first light-emitting control transistor is connected to the light-emitting control signal;

a first end of the first storage capacitor is connected to the second power supply signal, and a second end of the first storage capacitor is connected to the fifth node;

a second terminal of the light emitting transistor is connected to an anode of the light emitting unit, a control terminal is connected to the first node,

and/or

The current amplitude control circuit further comprises a second reset transistor, wherein a first end of the second reset transistor is connected to the anode of the light emitting unit, a second end of the second reset transistor is connected to the first power supply signal, and a control end of the second reset transistor is connected to the reset signal.

7. The pixel circuit according to claim 1, wherein the light emitting unit is a MicroLED or a MiniLED.

8. A display device comprising the pixel circuit according to any one of claims 1 to 7.

9. A driving method using the pixel circuit according to any one of claims 1 to 7, comprising:

the current amplitude control circuit is used for responding to a first scanning signal, accessing a data signal, storing the data signal based on a first storage capacitor and responding to a light-emitting control signal to provide a driving current for a light-emitting unit;

the time modulation circuit switches in the data signal in response to a first scan signal and stores the data signal in a second storage capacitor, and transmits the driving current to the light emitting unit in response to a first time modulation signal, and stops transmitting the driving current to the light emitting unit in response to an input second time modulation signal, the driving current being a signal generated based on the first scan signal and the data signal.

10. The driving method according to claim 9,

the time modulation circuit comprises a second data writing sub-circuit and a time signal writing sub-circuit, wherein

The second data write sub-circuit includes: a first transistor, a second transistor, a third transistor, and a second storage capacitor, wherein: a first end of the first transistor is connected to the data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected to the first scanning signal; a first end of the second transistor is connected to a second node, a second end of the second transistor is connected to the first time modulation signal, and a control end of the second transistor is connected to the first scanning signal; a first end of the third transistor is connected to the second node, a second end of the third transistor is connected to the first time control modulation signal, and a control end of the third transistor is connected to a second scanning signal; the first end of the second storage capacitor is connected to the first node, the second end is connected to the second node, and the time signal writing sub-circuit comprises: a third storage capacitor having a first terminal connected to the second time modulation signal and a second terminal connected to the first node,

the driving method includes:

threshold compensation and data writing phase: the current amplitude control circuit reads a data signal and supplies a driving current to the light emitting unit, and the time modulation circuit switches in the data signal and writes the data signal into a first terminal of the second storage capacitor in response to the first scan signal, and switches in the first time modulation signal having a first level into a second terminal of the second storage capacitor in response to the first scan signal;

and a light emitting modulation stage:

a duration determination stage, in response to the second scanning signal, the second terminal of the second storage capacitor is connected to the first time modulation signal with a second level to determine the light emitting duration through the coupling effect,

and in the light emitting control stage, the light emitting unit emits light under the control of the driving current provided by the current amplitude control circuit and a second time modulation signal accessed at the first end of the third storage capacitor, and the light emitting unit stops emitting light when the second time modulation signal reaches a preset threshold value.

11. The driving method according to claim 9,

The second data write sub-circuit includes: a first transistor, a second transistor, a third transistor, an inverter, and a second storage capacitor, wherein: a first end of the first transistor is connected to the data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected to the first scanning signal; the first end of the second transistor is connected to a second node, the second end of the second transistor is connected to the first time modulation signal inverted by the phase inverter, and the control end of the second transistor is connected to the first scanning signal; a first end of the third transistor is connected to the second node, a second end of the third transistor is connected to the first time modulation signal inverted by the inverter, and a control end of the third transistor is connected to a second scanning signal; the first end of the second storage capacitor is connected to the first node, the second end is connected to the second node, and the time signal writing sub-circuit comprises: a third storage capacitor having a first terminal connected to the second time modulation signal and a second terminal connected to the first node,

the driving method includes:

threshold compensation and data writing phase: the current amplitude control circuit reads a data signal and supplies a driving current to the light emitting unit, and the time modulation circuit switches in the data signal and writes the data signal into a first terminal of the second storage capacitor in response to the first scan signal, and switches in the first time modulation signal having a first level and inverted into a second terminal of the second storage capacitor in response to the first scan signal;

and a light emitting modulation stage:

a duration determination stage for receiving the inverted first time modulation signal with the second level in response to the second scan signal to determine the light emitting duration through the coupling effect,

12. The driving method according to claim 9,

the time modulation circuit includes a second data write sub-circuit, and a time signal write sub-circuit, the second data write sub-circuit including: a first transistor and a second storage capacitor, wherein: a first end of the first transistor is connected to the data signal, a second end of the first transistor is connected to a first node, and a control end of the first transistor is connected to the first scanning signal; the first end of the second storage capacitor is connected to the first node, the second end of the second storage capacitor is connected to the first time modulation signal, the first end of the second storage capacitor is connected to the first node, the second end of the second storage capacitor is connected to the second node, and the time signal writing sub-circuit comprises: a third storage capacitor having a first terminal connected to the second time modulation signal and a second terminal connected to the first node,

the driving method includes:

threshold compensation and data writing phase: the current amplitude control circuit reads a data signal and provides a driving current to the light emitting unit, and the second data writing sub-circuit accesses the data signal in response to the first scanning signal and writes the data signal into the first end of the second storage capacitor;

and a light emitting modulation stage:

a time length determining stage, wherein the second storage capacitor responds to the first time modulation signal accessed by the second end to determine the light emitting time length through the coupling action,