CN113972201A - 一种大功率射频器件的封装结构和封装方法 - Google Patents

一种大功率射频器件的封装结构和封装方法 Download PDF

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CN113972201A
CN113972201A CN202010711078.XA CN202010711078A CN113972201A CN 113972201 A CN113972201 A CN 113972201A CN 202010711078 A CN202010711078 A CN 202010711078A CN 113972201 A CN113972201 A CN 113972201A
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radio frequency
packaging
power
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frequency power
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卓英浩
肖智敏
竹磊
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Innogration Suzhou Co ltd
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Priority to US18/017,415 priority patent/US20230282609A1/en
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Abstract

本发明公开了一种大功率射频器件的封装结构，包括多个并联的射频功率芯片和封装法兰，所述多个射频功率芯片倾斜设置在封装法兰的封装内腔内，减少射频功率芯片的输入引线数量，使得输入引线和输出引线在空间上不交叠。多颗芯片倾斜排列在封装法兰上，显著提高了封装空间利用率，达到更大功率输出目的。通过少量减少中间射频功率芯片的输入引线数量，可以使输出引线不会有减少，可以保障大功率应用过程的可靠性，而且避免了输入引线和输出引线在空间上的大面积交叠，降低互感有效避免射频功率器件发生震荡。

Description

一种大功率射频器件的封装结构和封装方法
技术领域
本发明涉及射频器件的封装技术领域，具体地涉及一种大功率射频器件的封装结构和封装方法。
背景技术
主流的射频功率芯片通常考虑到产品性能和散热等因素，芯片的尺寸大都是矩形的，且有较大的长宽比。受限于生产和装配工艺限制，单颗芯片不会做的很大，当单颗芯片输出功率无法满足要求时，大多是通过使用多颗芯片并联装配在同一封装内部。目前主流的大功率射频功率放大器件内部芯片布局结构如图1所示，结合图2所示，多颗芯片1并联装配在同一封装4内部，芯片1和封装内腔5平行，多颗芯片1并排焊接在封装法兰6上，芯片1的引线（Bond-wire）方向与芯片焊盘（BondPad）方向垂直，输入引线3和输出引线2的另一端焊接在引脚7，输入引线3和输出引线2不会跨越芯片1上方，也不会出现输入引线3和输出引线2在空间上的交叠，但是受芯片尺寸和封装内部腔体大小的限制，无法达到更大功率输出的目的。
发明内容
针对上述存在的技术问题，本发明目的在于提供一种大功率射频器件的封装结构和封装方法，多颗芯片倾斜排列在封装法兰上，显著提高了封装空间利用率，达到更大功率输出目的。
为了解决现有技术中的这些问题，本发明提供的技术方案是：
一种大功率射频器件的封装结构，包括多个并联的射频功率芯片和封装法兰，所述多个射频功率芯片倾斜设置在封装法兰的封装内腔内，减少射频功率芯片的输入引线数量，使得输入引线和输出引线在空间上不交叠。
优选的技术方案中，所述多个射频功率芯片与封装内腔形成一定的夹角，所述多个射频功率芯片以相同角度平行排布。
优选的技术方案中，所述射频功率芯片的最外端与封装内腔的间距大于等于设定阈值。
优选的技术方案中，减少位于中部的射频功率芯片的输入引线数量，根据相邻芯片输出引线位置和该中部射频功率芯片输入引线线间距计算确定减少的输入引线数量。
优选的技术方案中，根据每个射频功率芯片的焊盘位置与连接端的焊盘位置的距离确定输入引线和输出引线的长度。
本发明还公开了一种大功率射频器件的封装方法，包括以下步骤：
S01：根据射频功率芯片的最外端与封装内腔的间距大于等于设定阈值，确定射频功率芯片与封装内腔的倾斜夹角；
S02：根据确定的倾斜夹角将多个射频功率芯片贴装于封装内腔内；
S03：根据每个射频功率芯片的焊盘位置与连接端的焊盘位置的距离确定输入引线和输出引线的长度，并进行打线；
S04：减少射频功率芯片的输入引线数量，使得输入引线和输出引线在空间上不交叠。
优选的技术方案中，所述步骤S02中倾斜夹角通过以下方法确定：
将射频功率芯片用吸嘴吸起，使得封装内腔和射频功率芯片上下居中，以封装法兰的中心点为圆心旋转封装载具使封装法兰跟随载具一同旋转，旋转角度为确定的倾斜夹角，固定封装载具位置。
优选的技术方案中，所述步骤S02中还包括计算射频功率芯片间的水平间距，根据确定的水平间距贴装多个射频功率芯片。
优选的技术方案中，所述步骤S04中减少位于中部的射频功率芯片的输入引线数量，根据相邻芯片输出引线位置和该中部射频功率芯片输入引线线间距计算确定减少的输入引线数量。
相对于现有技术中的方案，本发明的优点是：
1、多颗芯片倾斜排列在封装法兰上，显著提高了封装空间利用率，达到更大功率输出目的。本发明中通过对芯片旋转避免了引线直接跨越相邻芯片上方的问题，通过少量减少中间射频功率芯片的输入引线数量，可以使输出引线不会有减少，可以保障大功率应用过程的可靠性，而且避免了输入引线和输出引线在空间上的大面积交叠，降低互感有效避免射频功率器件发生震荡。
2、本发明中所涉及的芯片焊接和引线键合工艺都是成熟工艺无须重新研发验证，可以很快实现量产。避免重新设计封装、芯片尺寸问题，极大节省了成本和产品研发周期，客户也可以很快的实现兼容替换。
附图说明
下面结合附图及实施例对本发明作进一步描述：
图1为现有大功率射频功率器件的内部芯片布局和引线示意图；
图2为图1的侧视图；
图3为本发明实例射频功率器件内部芯片布局和芯片示意图；
图4为图3的侧视图；
图5为本发明旋转角度确定示意图。
具体实施方式
以下结合具体实施例对上述方案做进一步说明。应理解，这些实施例是用于说明本发明而不限于限制本发明的范围。实施例中采用的实施条件可以根据具体厂家的条件做进一步调整，未注明的实施条件通常为常规实验中的条件。
实施例：
如图3、4所示，本发明的大功率射频器件的封装结构，包括多个并联的射频功率芯片20和封装法兰21，多个射频功率芯片20倾斜设置在封装法兰21的封装内腔22内，多个射频功率芯片20与封装内腔22形成一定的夹角，多个射频功率芯片20最好以相同角度平行排布。可以使得后续的工艺更加简单。射频功率芯片的数量根据选用的封装尺寸和选用的芯片大小决定。
如图5所示，在确定倾斜角度∠A时，射频功率芯片20的最外端与封装内腔22的间距大于等于设定阈值，例如最小间距d。具体的，最大倾斜角度不能使芯片的左上方顶角，右下方顶角和封装内腔边缘距离小于最小间距d。
在将射频功率芯片20贴装于封装法兰21后，需要做引线连接。
为了降低互感有效避免射频功率器件发生震荡，减少射频功率芯20片的输入引线23数量，使得输入引线23和输出引线24在空间上不交叠。减少芯片的输入引线数量可以实现较多的输出引线数量，对于大功率应用过程可靠性有更好的保障。
较佳的实施例中，减少位于中部的射频功率芯片的输入引线数量，可以进一步的实现较多的输出引线数量，提供可靠性，根据相邻芯片输出引线位置和该中部射频功率芯片输入引线线间距计算确定减少的输入引线数量。
根据每个射频功率芯片的焊盘位置与连接端的焊盘位置的距离确定输入引线23和输出引线24的长度。
连接端可以是有封装的引脚25，也可以是无封装的其他需要连接的电子元件，这里不做限定。
本发明还公开了一种大功率射频器件的封装方法，包括以下步骤：
S01：根据射频功率芯片的最外端与封装内腔的间距大于等于设定阈值，确定射频功率芯片与封装内腔的倾斜夹角；
S02：计算射频功率芯片间的水平间距，根据确定的水平间距贴装多个射频功率芯片，根据确定的倾斜夹角将多个射频功率芯片贴装于封装内腔内；
S03：根据每个射频功率芯片的焊盘位置与连接端的焊盘位置的距离确定输入引线和输出引线的长度，并进行打线；
S04：减少射频功率芯片的输入引线数量，使得输入引线和输出引线在空间上不交叠。
下面结合具体的实例进行说明封装方法：
首先根据设计需求选择合适的现有陶瓷封装和芯片；本实例方案选用了现有的一款封装，内腔尺寸是27.94mm*6.96mm；选用的一种芯片尺寸（a*b）是6.15mm*1.9mm。
将芯片用焊接设备的吸嘴吸起，确保封装和芯片上下居中，这里的封装包括封装法兰和引脚，以封装的中心点为圆心旋转封装载具使封装跟随载具一同旋转，最大旋转角度不能使芯片的左上方顶角，右下方顶角和封装边缘距离小于最小间距d，在确保工艺质量可控的前提下，选取最大的旋转角，固定封装载具位置。
根据芯片背金特性选用特定的焊接设备，然后芯片焊接设备会拍照识别封装位置，根据已知的旋转角度和封装尺寸及芯片尺寸，可以计算并设计出相对合理的芯片步进，即射频功率芯片间的水平间距，再将芯片步进编程输入贴片机中，设定焊接程序进行多芯片焊接贴片。这里计算射频功率芯片间的水平间距可以根据三角函数的公式进行计算。
然后将已焊接好的半成品，在打线机台上进一步对芯片位置拍照识别，根据芯片焊盘位置设定不同线长的引线，做引线连接。
减少射频功率芯片的输入引线数量，使得输入引线和输出引线在空间上不交叠。根据相邻芯片输出引线位置和该中部射频功率芯片输入引线线间距计算确定减少的输入引线数量。
最后盖好陶瓷盖子，测试。
若采用现有布局方案，该封装只能放置4颗所选尺寸大小的芯片，而通过利用本发明技术方法相同封装可以放置6颗相同尺寸大小的芯片。显著提高了封装空间利用率，达到更大功率输出目的。
应当理解的是，本发明的上述具体实施方式仅仅用于示例性说明或解释本发明的原理，而不构成对本发明的限制。因此，在不偏离本发明的精神和范围的情况下所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。此外，本发明所附权利要求旨在涵盖落入所附权利要求范围和边界、或者这种范围和边界的等同形式内的全部变化和修改例。

Claims (9)

1.一种大功率射频器件的封装结构，包括多个并联的射频功率芯片和封装法兰，其特征在于，所述多个射频功率芯片倾斜设置在封装法兰的封装内腔内，减少射频功率芯片的输入引线数量，使得输入引线和输出引线在空间上不交叠。
2.根据权利要求1所述的大功率射频器件的封装结构，其特征在于，所述多个射频功率芯片与封装内腔形成一定的夹角，所述多个射频功率芯片以相同角度平行排布。
3.根据权利要求2所述的大功率射频器件的封装结构，其特征在于，所述射频功率芯片的最外端与封装内腔的间距大于等于设定阈值。
4.根据权利要求1所述的大功率射频器件的封装结构，其特征在于，减少位于中部的射频功率芯片的输入引线数量，根据相邻芯片输出引线位置和该中部射频功率芯片输入引线线间距计算确定减少的输入引线数量。
5.根据权利要求1所述的大功率射频器件的封装结构，其特征在于，根据每个射频功率芯片的焊盘位置与连接端的焊盘位置的距离确定输入引线和输出引线的长度。
6.一种大功率射频器件的封装方法，其特征在于，包括以下步骤：
S01：根据射频功率芯片的最外端与封装内腔的间距大于等于设定阈值，确定射频功率芯片与封装内腔的倾斜夹角；
S02：根据确定的倾斜夹角将多个射频功率芯片贴装于封装内腔内；
S03：根据每个射频功率芯片的焊盘位置与连接端的焊盘位置的距离确定输入引线和输出引线的长度，并进行打线；
S04：减少射频功率芯片的输入引线数量，使得输入引线和输出引线在空间上不交叠。
7.根据权利要求6所述的大功率射频器件的封装方法，其特征在于，所述步骤S02中倾斜夹角通过以下方法确定：
将射频功率芯片用吸嘴吸起，使得封装内腔和射频功率芯片上下居中，以封装法兰的中心点为圆心旋转封装载具使封装法兰跟随载具一同旋转，旋转角度为确定的倾斜夹角，固定封装载具位置。
8.根据权利要求6或7所述的大功率射频器件的封装方法，其特征在于，所述步骤S02中还包括计算射频功率芯片间的水平间距，根据确定的水平间距贴装多个射频功率芯片。
9.根据权利要求6所述的大功率射频器件的封装方法，其特征在于，所述步骤S04中减少位于中部的射频功率芯片的输入引线数量，根据相邻芯片输出引线位置和该中部射频功率芯片输入引线线间距计算确定减少的输入引线数量。
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