CN113972131A - Oxide layer removing method and semiconductor processing equipment - Google Patents

Oxide layer removing method and semiconductor processing equipment Download PDF

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Publication number
CN113972131A
CN113972131A CN202111214478.0A CN202111214478A CN113972131A CN 113972131 A CN113972131 A CN 113972131A CN 202111214478 A CN202111214478 A CN 202111214478A CN 113972131 A CN113972131 A CN 113972131A
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China
Prior art keywords
oxide layer
layer
etching
processed
semiconductor processing
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CN202111214478.0A
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Chinese (zh)
Inventor
王晓娟
马振国
郑波
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Beijing Naura Microelectronics Equipment Co Ltd
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Beijing Naura Microelectronics Equipment Co Ltd
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Priority to CN202111214478.0A priority Critical patent/CN113972131A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046—Dry cleaning only
    • H01L21/02049—Dry cleaning only with gaseous HF
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention provides an oxide layer removing method and semiconductor processing equipment, wherein the oxide layer removing method comprises the following steps: s1, oxidizing the layer to be processed to form a specified oxide layer; s2, etching the layer to be processed with the specified oxide layer; step S1 and step S2 are carried out in a circulating mode until the preset total etching thickness is achieved; wherein, the etching selection ratio of the specified oxide layer and the layer to be processed in the step S2 is made to reach a preset ratio by adjusting the thickness of the specified oxide layer obtained in the step S1. According to the technical scheme of the oxide layer removing method and the semiconductor processing equipment, the etching selection ratio of the specified oxide layer and the layer to be processed can reach the preset ratio, and the requirement of the process on the etching selection ratio is met.

Description

Oxide layer removing method and semiconductor processing equipment
Technical Field
The invention relates to the technical field of cleaning, in particular to an oxide layer removing method and semiconductor processing equipment.
Background
With the application of template cleaning and multi-pattern exposure cleaning, the cleaning requirement is increased rapidly, the cleaning requirement is higher and higher, and especially the etching selection ratio of thermally grown silicon dioxide and various film layers is more and more strict. For example, in removing Si3N4When the natural oxide layer is formed, SiO is ensured2And Si3N4Has an etching selectivity of 1: 1. When the oxide layer back etching process with high etching amount is carried out, SiO is ensured2And Si3N4While the etching selection ratio of (1: 1), the etching morphology is required to meet the requirements, i.e. bowl effect (focusing) and difference effect (loading) are reduced.
The existing oxide removal method is to directly etch the oxide layer, and the process gas usually includes HF and NH3(catalyst), the reaction principle of the method is as follows:
SiO2+6HF+2NH3→(NH4)2SiF6+2H2O
(NH4)2SiF6→SiF4+2NH3+2HF
in practical applications, the above-mentioned oxide layer removal method inevitably has the following problems:
first, for low etch native oxide removal, SiO2And Si3N4The etching selectivity of (a) cannot reach 1: 1.
Secondly, for the oxide layer back-etching process with high etching amount, in order to obtain better bowl-shaped effect and difference effect, the cycle number of the oxide layer removing method needs to be increased, but the cycle number can cause SiO2And Si3N4Is much greater than 1.
Disclosure of Invention
The invention aims to at least solve one of the technical problems in the prior art, and provides an oxide layer removing method and semiconductor processing equipment, which can enable the etching selection ratio of a specified oxide layer and a layer to be processed to reach a preset ratio and meet the requirements of the process on the etching selection ratio.
In order to achieve the above object, the present invention provides an oxide layer removing method, comprising the steps of:
s1, oxidizing the layer to be processed to form a specified oxide layer;
s2, etching the layer to be processed with the specified oxide layer;
circularly performing the step S1 and the step S2 until a preset total etching thickness is reached;
and adjusting the thickness of the specified oxide layer obtained in the step S1 to make the etching selection ratio of the specified oxide layer and the layer to be processed in the step S2 reach a preset ratio.
Optionally, the layer to be processed comprises Si3N4(ii) a The specified oxide layer comprises SiO2(ii) a The preset ratio is 1: 1.
Optionally, the obtained etching morphology meets the requirement by adjusting the cycle times of the step S1 and the step S2.
Optionally, the thickness of the specified oxide layer ranges from 1 nm to 10 nm.
Optionally, in the step S1, the oxidizing gas includes at least one of oxygen and water vapor.
Optionally, the flow rate of the oxidizing gas ranges from 10 sccm to 2000 sccm.
Optionally, the thickness of the specified oxide layer ranges from 1 nm to 50 nm.
Optionally, for the removal of the natural oxide layer, the thickness of the specified oxide layer ranges from 1 nm to 3 nm.
Optionally, after completing the step S2 each time and before proceeding to the next step S1, the method further includes the following steps:
and S3, carrying out an annealing process on the layer to be processed to remove solid products and adsorption products.
As another technical solution, the present invention further provides a semiconductor processing apparatus for performing the method for removing an oxide layer provided by the present invention, the semiconductor processing apparatus comprising:
at least one process chamber used for etching the layer to be processed with the specified oxide layer;
and the oxidation chamber is used for oxidizing the layer to be processed.
Optionally, the semiconductor processing apparatus further includes an annealing chamber, configured to perform an annealing process on the layer to be processed.
Optionally, the process chamber is integrated into a dual function chamber with both annealing and etching.
Optionally, the processing temperatures of the etching step and the annealing step of the dual-function chamber are the same; wherein the etching step adopts a process gas comprising NH3HF and a carrier gas; wherein, the NH3The flow rate of the liquid is taken to be within the range of 100-600 sccm; the flow rate of the HF is within the range of 100-600 sccm; the flow rate of the carrier gas ranges from 10 sccm to 6000 sccm.
Optionally, the oxidation chamber is integrated into a dual-function chamber with both annealing and oxidation.
The invention has the beneficial effects that:
according to the technical scheme of the oxide layer removing method and the semiconductor processing equipment, an oxidation step is added before the step of etching the oxide layer, namely, the layer to be processed is oxidized to form the specified oxide layer, and the etching selection ratio of the specified oxide layer and the layer to be processed in the subsequent etching step can reach the preset ratio by adjusting the thickness of the specified oxide layer, so that the requirement of the process on the etching selection ratio is met.
Drawings
Fig. 1 is a flowchart illustrating an oxide layer removing method according to a first embodiment of the present invention;
FIG. 2 is a block diagram illustrating a method for removing an oxide layer according to a second embodiment of the present invention;
fig. 3 is a block diagram of a semiconductor processing apparatus according to a third embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the method for removing the oxide layer and the semiconductor processing apparatus provided by the present invention are described in detail below with reference to the accompanying drawings.
First embodiment
Referring to fig. 1, the method for removing an oxide layer provided in the present embodiment includes the following steps:
s1, oxidizing the layer to be processed to form a specified oxide layer;
and S2, etching the layer to be processed with the specified oxide layer.
Circularly performing the step S1 and the step S2 until the preset total etching thickness is reached;
wherein, the etching selection ratio of the specified oxide layer and the layer to be processed in the step S2 is made to reach a preset ratio by adjusting the thickness of the specified oxide layer obtained in the step S1. In practical applications, the thickness of the specified oxide layer can be adjusted by adjusting the reaction temperature and/or the oxidation time.
In the oxide layer removing method provided by this embodiment, an oxidation step S1 is added before the etching step S2, and by adjusting the thickness of the specified oxide layer, the etching selection ratio of the specified oxide layer and the layer to be processed in the subsequent etching step S2 can reach a preset ratio, thereby meeting the requirement of the process on the etching selection ratio.
The designated oxide layer refers to an oxide layer additionally formed after the layer to be processed is oxidized, so as to adjust the etching selection ratio of the subsequent etching step.
The oxide layer removing method provided by the embodiment can be used for removing Si3N4An oxide layer formed after being subjected to an FCVD (Flowable CVD) process or thermal oxidation. Specifically, the layer to be processed is Si3N4The oxide layer is defined as SiO2Usually requiring SiO2And Si3N4Has an etching selectivity of 1: 1. In this case, step S1 can be performed on Si3N4Additionally forming a layer of SiO2Layer, throughOver-adjusting the SiO2The thickness of the layer, SiO in step S2 can be adjusted2And Si3N4The etching selection ratio of (2) is 1:1, so that the requirement of the process on the etching selection ratio can be met.
Optionally, for the oxide layer etching-back process with a high etching amount, that is, the etching amount in step S2 is relatively large (for example, 100-. In order to satisfy the requirements of the etching selection ratio and the etching profile at the same time, the number of cycles of step S1 and step S2 may be adjusted to adjust the oxidized thickness of the layer to be processed each time step S1 is performed, that is, the thickness of the specified oxide layer.
In the oxide layer removing method provided in this embodiment, by adjusting the number of cycles of step S1 and step S2, the oxidized thickness of the layer to be processed, i.e., the thickness of the specified oxide layer, can be adjusted each time step S1 is performed, so that not only the etching selectivity can reach 1:1, but also the bowl effect (footing) and the difference effect (loading) can be reduced.
Optionally, for the oxide layer etchback process with high etching amount, the value range of the thickness of the specified oxide layer is 1-10 nm. Within the thickness range, the requirements of etching selection ratio and etching morphology can be easily met simultaneously. For the process without the requirement of etching morphology, the thickness of the oxide layer ranges from 1 nm to 50 nm.
Optionally, for the removal of the native oxide layer, the etching amount is small, and therefore the requirement of the etching selectivity only needs to be met, and the problem of the etching morphology does not need to be considered, so that the value range of the thickness of the specified oxide layer is 1-3 nm.
Optionally, in step S1, the oxidizing gas includes at least one of oxygen and water vapor.
Optionally, the flow rate of the oxidizing gas ranges from 10 sccm to 2000 sccm.
Alternatively, in step S1, the oxidizing gas is introduced into the oxidizing chamber by the carrier gas, but of course, in practiceIn use, the oxidizing gas may also be introduced into the oxidation chamber by self-evaporation through a flow controller (MFC). Wherein the carrier gas may be PN2At least one of argon and nitrogen. The flow rate of the carrier gas ranges from 10 sccm to 6000 sccm. The value range of the chamber pressure adopted in the step S1 is 10mTorr-20 Torr; the process temperature adopted in the step S1 is within the range of 100-1200 ℃.
Optionally, in step S2, the process gas includes NH3HF and a carrier gas; wherein NH3The flow rate of the liquid is taken to be within the range of 100-600 sccm; the flow rate of HF is ranged from 100 sccm to 600 sccm; the flow rate of the carrier gas ranges from 10 sccm to 6000 sccm. The value range of the chamber pressure adopted in the step S2 is 10mTorr-20 Torr; the process temperature adopted in the step S2 is in the range of 25-200 ℃.
Second embodiment
Referring to fig. 2, the method for removing an oxide layer provided in the present embodiment includes the following steps:
s1, oxidizing the layer to be processed to form a specified oxide layer;
s2, etching the layer to be processed with the specified oxide layer;
s3, annealing the layer to be processed to remove solid products and adsorption products;
s4, judging whether the total etching thickness is reached, if yes, ending the process; if not, the process returns to step S1.
By performing the step S3, i.e., the annealing process, once after the step S2 is completed, the solid product and the adsorbed product on the layer to be processed can be removed, so that the cleaning effect can be further improved.
Third embodiment
Referring to fig. 3, the semiconductor processing equipment provided in this embodiment is used for performing the oxide layer removal method provided in the above embodiments of the present invention. The semiconductor processing equipment comprises at least one process chamber 1, an oxidation chamber 2 and an annealing chamber 3, wherein the process chamber 1 is used for etching a layer to be processed with a specified oxidation layer. Fig. 3 shows four process chambers 1, and by providing a plurality of process chambers 1, a plurality of etching steps can be simultaneously performed, thereby improving productivity. The oxidation chamber 2 is used for oxidizing the layer to be processed. The annealing chamber is used for carrying out annealing process on the layer to be processed.
According to the semiconductor processing equipment provided by the embodiment, the oxidation chamber 2 is additionally arranged, an oxidation step can be added before the step of etching the oxide layer by using the process chamber 1, and the etching selection ratio of the specified oxide layer and the layer to be processed in the subsequent etching step can reach the preset ratio by adjusting the thickness of the specified oxide layer, so that the requirement of the process on the etching selection ratio is met.
Optionally, in practical applications, the annealing chamber 3 and the process chamber 1 may be integrated into a dual-function chamber with annealing and etching functions. In this case, the dual function chamber may be subjected to the etching step and the annealing step at different process temperatures, i.e., the etching step S2 is performed at a lower temperature and then the annealing step S3 is performed at a higher temperature. Alternatively, the dual function chamber may be subjected to the same process temperature for the etching step and the annealing step, respectively, wherein the flow rate of the process gas used in the etching step S3 is increased appropriately. Specifically, the process gas used in the etching step S3 includes NH3HF and a carrier gas; wherein NH3The flow rate of the liquid is taken to be within the range of 100-600 sccm; the flow rate of HF is ranged from 100 sccm to 600 sccm; the flow rate of the carrier gas ranges from 10 sccm to 6000 sccm. Of course, the annealing chamber 3 and the process chamber 1 may be separately configured.
Optionally, the annealing chamber 3 and the oxidation chamber 2 are integrated into a dual-function chamber with annealing and oxidation. Of course, the annealing chamber 3 and the oxidation chamber 2 may be separately configured.
In summary, in the oxide layer removing method and the semiconductor processing apparatus provided in the foregoing embodiments of the present invention, an oxidation step is added before the step of etching the oxide layer, that is, the layer to be processed is oxidized to form the specified oxide layer, and the etching selection ratio between the specified oxide layer and the layer to be processed in the subsequent etching step can reach the preset ratio by adjusting the thickness of the specified oxide layer, so as to meet the requirement of the process on the etching selection ratio.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.

Claims (14)

1. The oxide layer removing method is characterized by comprising the following steps:
s1, oxidizing the layer to be processed to form a specified oxide layer;
s2, etching the layer to be processed with the specified oxide layer;
circularly performing the step S1 and the step S2 until a preset total etching thickness is reached;
and adjusting the thickness of the specified oxide layer obtained in the step S1 to make the etching selection ratio of the specified oxide layer and the layer to be processed in the step S2 reach a preset ratio.
2. The method according to claim 1, wherein the layer to be processed comprises Si3N4(ii) a The specified oxide layer comprises SiO2(ii) a The preset ratio is 1: 1.
3. The method as claimed in claim 1 or 2, wherein the etching morphology obtained by adjusting the number of cycles of step S1 and step S2 is satisfactory.
4. The method according to claim 3, wherein the thickness of the predetermined oxide layer is in a range of 1 to 10 nm.
5. The method of claim 1 or 2, wherein in the step S1, the oxidizing gas includes at least one of oxygen and water vapor.
6. The method according to claim 1 or 2, wherein a flow rate of the oxidizing gas is in a range of 10 to 2000 sccm.
7. The method according to claim 1 or 2, wherein the thickness of the predetermined oxide layer is in a range of 1 to 50 nm.
8. The method according to claim 7, wherein the thickness of the predetermined oxide layer ranges from 1 nm to 3nm in the case of removing a native oxide layer.
9. The method for removing the oxide layer according to claim 1 or 2, further comprising the following steps after completing the step S2 each time and before proceeding to the next step S1:
and S3, carrying out an annealing process on the layer to be processed to remove solid products and adsorption products.
10. A semiconductor processing apparatus for performing the oxide layer removing method of any one of claims 1 to 9, the semiconductor processing apparatus comprising:
at least one process chamber used for etching the layer to be processed with the specified oxide layer;
and the oxidation chamber is used for oxidizing the layer to be processed.
11. The semiconductor processing apparatus of claim 10, further comprising an annealing chamber for performing an annealing process on the layer to be processed.
12. The semiconductor processing apparatus of claim 10, wherein the process chamber is integrated as a dual function chamber with both annealing and etching.
13. The semiconductor processing apparatus of claim 12, wherein the dual function chamber is configured to perform the etching step and the annealing step at the same process temperature; wherein the etching step adopts a process gas comprising NH3HF and a carrier gas; wherein, the NH3The flow rate of the liquid is taken to be within the range of 100-600 sccm; the flow rate of the HF is within the range of 100-600 sccm; the flow rate of the carrier gas ranges from 10 sccm to 6000 sccm.
14. The semiconductor processing apparatus of claim 10, wherein the oxidation chamber is integrated as a dual function chamber with both annealing and oxidation.
CN202111214478.0A 2019-09-24 2019-09-24 Oxide layer removing method and semiconductor processing equipment Pending CN113972131A (en)

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US20030045098A1 (en) * 2001-08-31 2003-03-06 Applied Materials, Inc. Method and apparatus for processing a wafer
TWI236712B (en) * 2004-07-06 2005-07-21 Macronix Int Co Ltd Method for forming oxide on ONO structure
CN100555593C (en) * 2006-07-21 2009-10-28 日月光半导体制造股份有限公司 Form the method for soldering projection
US8252696B2 (en) * 2007-10-22 2012-08-28 Applied Materials, Inc. Selective etching of silicon nitride
CN102543672A (en) * 2010-12-22 2012-07-04 中芯国际集成电路制造(上海)有限公司 Method for removing natural silicon oxide layer and method for forming self-aligned silicide
US9412603B2 (en) * 2013-11-19 2016-08-09 Applied Materials, Inc. Trimming silicon fin width through oxidation and etch
CN106571293A (en) * 2015-10-09 2017-04-19 北京北方微电子基地设备工艺研究中心有限责任公司 Silicon chip etching method
US9984923B2 (en) * 2016-06-30 2018-05-29 International Business Machines Corporation Barrier layers in trenches and vias

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Application publication date: 20220125