CN113960453A - Test device and test method for rapidly generating STDF (standard test definition distribution) data - Google Patents
Test device and test method for rapidly generating STDF (standard test definition distribution) data Download PDFInfo
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Abstract
A test method and device for rapidly generating STDF data comprises a lower computer and an upper computer; the lower computer is used for performing CP test before packaging and/or FT test after packaging on the N chips on the M wafers; the test module sends out a test result of each chip through the first interface; the upper computer comprises a second interface, a processing module and an STDF file storage module; the second interface receives the test result data of each chip sent by the first interface in sequence, and the test result data are processed by the processing module in sequence to form an STDF file and then sent to the STDF file storage module. Therefore, the invention utilizes the STDF structuralization characteristic to synchronously read and write the STDF file in the test process, so that the writing of the STDF file and the test of the tester are synchronously carried out, each field is dynamically inserted, the generation is not started until the test of the tester is completely finished, the efficiency of writing the STDF file is improved, and the rapid operation of the test of the tester is ensured.
Description
Technical Field
The present invention relates to the field of Automatic Test Equipment (ATE for short) for semiconductors, and in particular, to a Test apparatus and a Test method for quickly generating Standard Test Data File (STDF) Data.
Background
In the semiconductor industry, each chip undergoes two rigorous tests before being put on the market, namely a CP test before packaging and an FT test after packaging.
CP (chip bonding) test is performed between Wafer manufacturing and packaging in the whole chip manufacturing process, and the exposed chip is connected with a tester through a probe on the whole Wafer which is not subjected to scribing packaging, so that the CP test of the chip is performed.
The FT (final test) test is the last interception before the Chip leaves a factory, the test object is a packaged Chip (Chip), the package is carried out after the CP test, the FT test is carried out after the package, and the final detection result can be used for detecting the process level of a package factory.
It is clear to those skilled in the art that the test opportunities provided by different vendors generate different test results, which makes the conversion, analysis and storage of the test results difficult. The STDF specification is a storage specification for chip test data in the semiconductor industry, that is, the STDF is a standard test data format and contains summary information and test results of all test items.
The STDF standard adopts a uniform format/specification to store all types of test data generated by CP or FT chip tests, and solves the problem that the test data formats generated by different brands of test machines in the chip test industry are not uniform, so that the standard is regarded and accepted by the semiconductor industry, whether a tester supplier, a chip test company or a chip design company, and becomes a practical industry standard under the condition that the standard is not a mandatory industry standard.
Referring to fig. 1, fig. 1 shows a prior art testing apparatus for generating STDF data. As shown in the figure, the testing device comprises an upper computer and a lower computer, wherein the lower computer is used for performing CP (chip content testing) before packaging and/or FT (chip performance testing) after packaging on N chips on M wafers; the test module stores the test result of each chip in the first storage module firstly, and sends the test result out through the first interface after all tests are finished; the upper computer comprises a second interface, a second storage module, a processing module and a third storage module (STDF file storage module); and the second interface receives all the test result data sent by the first interface and stores the test result data in the second storage module, and all the test result data are sequentially processed by the processing module to form an STDF file and then are sent to the third storage module.
According to the technical scheme, along with the collection of a large amount of test data after the test is finished, the lower computer needs a large first storage module to store the test data, and needs a second storage module at the upper computer end, so that the content of test result data needing to be stored and written in the STDF is very large, and the STDF file size can reach hundreds of M, so that the test efficiency can be reduced if the STDF file is written in a large amount of time after the test is finished. Therefore, there is a need for a method for generating an STDF file quickly.
Disclosure of Invention
The invention aims to provide a testing device and a testing method for rapidly generating STDF (standard deviation correction function) data, which can realize real-time processing of acquired testing data and save storage modules in an upper computer and a lower computer.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a test apparatus for fast generation of STDF data, comprising:
the lower computer is used for carrying out CP test before packaging and/or FT test after packaging on the N chips on the M wafers; the test module sends out a test result of each chip through the first interface; wherein M and N are integers greater than or equal to 1;
the upper computer comprises a second interface, a processing module and an STDF file storage module; the second interface sequentially receives the test result data of each chip sent by the first interface, and the test result data are sequentially processed by the processing module to form an STDF file and then are sent to the STDF file storage module.
Further, the processing module comprises:
the testing device comprises a setting unit and a judging unit, wherein the setting unit is used for constructing an initial STDF file frame before the testing device starts testing, the initial STDF file comprises four necessary fields of FAR, MIR, PCR and MRR, the FAR and MIR fields are fields for reading and writing basic information from an engineering file, the PCR and MRR fields are test result summary data, and the quantity information of PART _ CNT in the PCR and MRR fields is recorded as 0;
the path pointer building unit is used for building a first-level pointer for indicating the initial position information of each Wafer and a second-level pointer for indicating the position information of each chip in each Wafer; the first-level pointer comprises a pointer 1 and a pointer 2, wherein the pointer 1 stores the end position of the last byte of the MIR field, and the pointer 2 stores the position of the byte before the PCR field; the second-level pointers comprise M groups, and each group of pointers comprises N +1 pointers;
the initialization unit is used for sequentially inserting SDR, PMR and WCR configuration information sections related to engineering after the last node of the MIR field according to the pointer 1 in the initial STDF file when the testing device starts testing, and updating the coordinate information of the pointer 1 after importing the coordinate information to enable the pointer to point to the last byte position of the WCR field;
the generating unit is used for generating PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in each of the M wafers according to the real-time test data received by the second interface; inserting PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in M wafers in sequence before the coordinate information of the second-level pointer according to the coordinate information of the second-level pointer, wherein after the sequential insertion operation is completed, the coordinate information of the second-level pointer is updated until the coordinate information of the second-level pointer is updated to the (N + 1) th time;
the summarizing unit is used for fetching a WRR field from the front of the pointer 2 updated for the (N + 1) th time, updating WRR field information according to the test result summarizing data, and calculating the total quantity according to the PRR field; and packaging the data into a TSR-SBR-HBR byte string, splicing the TSR-SBR-HBR byte string to the front of the pointer 2, and updating PCR (polymerase chain reaction) and MRR (maximum likelihood ratio) information behind the pointer 2 to finish the generation of the STDF file.
In order to achieve the above object, another technical solution of the present invention is as follows:
a test method for rapidly generating STDF data comprises the following steps:
step S1: a test module in the lower computer performs CP test before packaging and/or FT test after packaging on N chips on M wafers, and the test module sends out a test result of each chip through a first interface; wherein M and N are integers greater than or equal to 1;
step S2: the second interface in the upper computer sequentially receives the test result data of each chip sent by the first interface in real time, the processing module only comprises an initial STDF file which is read from the engineering file and written in the basic information field, and the test result data of the N chips on the M wafers are sequentially processed by the processing module and then sequentially inserted into the initial STDF file to form the STDF file and stored.
Further, the step S2 includes:
step S21: before starting a test, constructing an initial STDF file frame, wherein the initial STDF file comprises four necessary fields of FAR, MIR, PCR and MRR, the FAR and MIR fields are fields for reading and writing basic information from an engineering file, the PCR and MRR fields are test result summary data, and the quantity information of PART _ CNT in the PCR and MRR fields is recorded as 0;
step S22: building a first-level pointer indicating the initial position information of each Wafer and a second-level pointer indicating the position information of each chip in each Wafer; the first-level pointer comprises a pointer 1 and a pointer 2, wherein the pointer 1 stores the end position of the last byte of the MIR field, and the pointer 2 stores the position of the byte before the PCR field; the second-level pointers comprise M groups, and each group of pointers comprises N +1 pointers;
step S23: when a test device starts a test, according to a pointer 1 in the initial STDF file, inserting SDR, PMR and WCR configuration information sections related to engineering in sequence after the last node of the MIR field, and updating the coordinate information of the pointer 1 after leading in so as to enable the pointer to point to the last byte position of the WCR field;
step S24: generating PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in each of the M wafers according to the real-time test data received by the second interface; inserting PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in M wafers in sequence before the coordinate information of the second-level pointer according to the coordinate information of the second-level pointer, wherein after the sequential insertion operation is completed, the coordinate information of the second-level pointer is updated until the N +1 th time of the coordinate information of the second-level pointer;
step S25: and (3) acquiring a WRR field from the front of the pointer 2 updated for the (N + 1) th time, updating WRR field information according to the test result summary data, calculating the total quantity according to the PRR field, packaging into a TSR-SBR-HBR byte string, splicing to the front of the pointer 2, updating PCR and MRR information behind the pointer 2, and completing the generation and storage of the STDF file.
Further, the step S24 includes:
step S241: the second level pointers comprise M sets (A, B … M), each set comprising N +1 pointers; selecting all test data of a first chip of a first wafer, summarizing the test data into a PIR-PTR-MPR-FTR-PRR field, and inserting the field into A1After the pointer, newly creating a pointer A after the insertion is finished2Point to the last byte of PRR, and update the coordinate information of pointer 2;
step S242: selecting all test data of a second chip of the first wafer, summarizing the test data into a PIR-PTR-MPR-FTR-PRR field, and inserting the field into A2After the pointer is inserted, a new pointer A3 points to the last byte of the PRR after the insertion is completed, and meanwhile, the coordinate information of the pointer 2 is updated;
step S243: and analogizing in turn, inserting all the test results of the Nth chip, and newly building AN+1The pointer points to the last byte of the PRR, namely the coordinate information of the second-level pointer is updated to the (N + 1) th time;
step S244: when all the chips of the previous wafer are inserted, the pointer B is newly established1Starting all the testing numbers of the first chip of the second waferInserting according to the summary until all the test results of the Nth chip are inserted, and newly building BN+1The pointer points to the last byte of the PRR, namely the coordinate information of the second-level pointer is updated to the (N + 1) th time;
……
step S245: when all the chips of the M-1 wafer are inserted, newly building a pointer M1Starting to summarize and insert all test data of the first chip of the Mth wafer until all test results of the Nth chip are inserted, and newly building the MN+1The pointer points to the last byte of the PRR, i.e. the coordinate information of the second level pointer is updated to the N +1 th time.
Further, in step S24, when the PIR, PTR, MPR, FTR, and/or PRR field of the test result of each chip of each of the M wafers is inserted before the coordinate information of the second-level pointer, the checking of the PIR, PTR, MPR, FTR, and/or PRR field of each chip is further included.
According to the technical scheme, the device and the test method have the following beneficial effects:
firstly, the STDF file is generated more quickly and efficiently;
secondly, the time of the test flow is reduced;
thirdly, dynamically generating an STDF file, and occupying less storage resources of an upper computer and a lower computer;
and fourthly, before the insertion, the field content input into the STDF file is checked, so that the accuracy of the STDF file is ensured.
Drawings
FIG. 1 shows a prior art testing apparatus for generating STDF file data
FIG. 2 is a schematic diagram of a testing apparatus for generating STDF file data in the embodiment of the present invention
FIG. 3 is a schematic diagram of a test method for generating STDF file data in the embodiment of the present invention
FIG. 4 is a schematic diagram illustrating a byte structure of an STDF file generated in the embodiment of the present invention
FIG. 5 is a schematic diagram illustrating a byte forming process of the STDF file generated in the embodiment of the present invention
Detailed Description
The following describes the embodiments of the present invention in further detail with reference to fig. 2-5.
Referring to fig. 2, fig. 2 is a schematic diagram of a testing apparatus for generating STDF file data according to an embodiment of the present invention. As shown in fig. 2, in the technical solution of the present invention, a lower computer and an upper computer are also used to work in cooperation.
The test device is the same as a lower computer in the prior art, and is used for performing CP test before packaging and/or FT test after packaging on N chips on M wafers; but different from the lower computer in the prior art, the test system only comprises a test module and a first interface, and the test module sends out the test result of each chip through the first interface; wherein M and N are integers greater than or equal to 1. That is, the lower computer in the embodiment of the present invention does not include a memory module, and the result of the test performed by the lower computer on each device or chip (dut) under test of the current Wafer (Wafer) is directly thrown to the upper computer from the beginning of the test of the first Wafer (Wafer).
In the embodiment of the invention, the upper computer does not comprise a storage module, and the test result summary of each chip sent by the storage module of the lower computer at one time does not need to be stored in the prior art. The system can comprise a second interface, a processing module and an STDF file storage module; the second interface sequentially receives the test result data of each chip sent by the first interface, and the test result data are sequentially processed by the processing module to form an STDF file and then are sent to the STDF file storage module.
The invention utilizes the structural characteristic of the STDF to synchronously read and write the STDF in the testing process, so that the writing of the STDF is synchronously carried out with the testing of the testing machine, each field is dynamically inserted, and the generation is not started until the testing of the testing machine is completely finished, thereby improving the efficiency of writing the STDF, ensuring the rapid running of the testing machine, and checking the field information in the process of writing the STDF to ensure the accuracy of the STDF.
In the embodiment of the present invention, the processing module plays a main role, and as shown in fig. 2, the processing module includes a setting unit, a path pointer building unit, an initialization unit, and a generation unit.
The method comprises the steps that a setting unit constructs an initial STDF file frame before the testing device starts testing, wherein the initial STDF file comprises four necessary fields of FAR, MIR, PCR and MRR, the FAR and MIR fields are fields for reading and writing basic information from an engineering file, the PCR and MRR fields are test result summary data, and the quantity information of PART _ CNT in the PCR and MRR fields is recorded as 0 first.
The path pointer establishing unit is used for establishing a first-level pointer indicating the initial position information of each Wafer and a second-level pointer indicating the position information of each chip in each Wafer; the first-level pointer comprises a pointer 1 and a pointer 2, wherein the pointer 1 stores the end position of the last byte of the MIR field, and the pointer 2 stores the position of the byte before the PCR field; the second level pointers comprise M sets of pointers, each set of pointers comprising N +1 pointers.
And the initialization unit is used for sequentially inserting SDR, PMR and WCR configuration information sections related to engineering after the last node of the MIR field according to the pointer 1 in the initial STDF file when the testing device starts testing, and updating the coordinate information of the pointer 1 after importing the coordinate information to enable the pointer to point to the last byte position of the WCR field.
The generating unit is used for generating PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in each of the M wafers according to the real-time test data received by the second interface; and inserting PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in M wafers in sequence before the coordinate information of the second-level pointer according to the coordinate information of the second-level pointer, wherein after the sequential insertion operation is completed, the coordinate information of the second-level pointer is updated until the coordinate information of the second-level pointer is updated to the (N + 1) th time.
And the summarizing unit is used for fetching the WRR field from the front of the pointer 2 updated for the (N + 1) th time and updating the WRR field information according to the test result summarizing data. Generally, HBR, SBR and/or PCR fields summarize bin information of test data aiming at each dut, the total amount of the test data needs to be calculated according to the PRR field, Result data of the total amount calculated according to the PRR field is summarized and packed into a TSR-SBR-HBR byte string, the TSR-SBR-HBR byte string is spliced to the position in front of the pointer 2, PCR and MRR information behind the pointer 2 is updated, and the generation of an STDF file is completed.
Referring to fig. 3 and fig. 5 in conjunction with fig. 3, fig. 3 is a schematic diagram of a testing method for generating STDF file data in the embodiment of the present invention, fig. 4 is a schematic diagram of a byte structure of an STDF file generated in the embodiment of the present invention, and fig. 5 is a schematic diagram of a byte forming process of an STDF file generated in the embodiment of the present invention.
As shown in fig. 3, the method may include the steps of:
step S1: a test module in the lower computer performs CP test before packaging and/or FT test after packaging on N chips on M wafers, and the test module sends out a test result of each chip through a first interface; wherein M and N are integers greater than or equal to 1;
step S2: the second interface in the upper computer sequentially receives the test result data of each chip sent by the first interface in real time, the processing module only comprises an initial STDF file which is read from the engineering file and written in the basic information field, and the test result data of the N chips on the M wafers are sequentially processed by the processing module and then sequentially inserted into the initial STDF file to form the STDF file and stored.
As shown in fig. 4 and 5, in an embodiment of the present invention, the step S2 may include:
step S21: before starting a test, constructing an initial STDF file frame, wherein the initial STDF file comprises four necessary fields of FAR, MIR, PCR and MRR, the FAR and MIR fields are fields for reading and writing basic information from an engineering file, the PCR and MRR fields are test result summary data, and the quantity information of PART _ CNT in the PCR and MRR fields is recorded as 0.
It is clear to those skilled in the art that the fields forming the STDF file must have four fields, namely FAR, MIR, PCR, MRR, and therefore, the first step of generating the STDF file is to generate the necessary fields forming the STDF file, when the tester starts a test, the upper computer application starts to construct a blank STDF file locally, and write four fields, namely FAR-MIR-PCR-MRR, into the blank STDF file, wherein FAR and MIR are basic information fields, and can be directly read from and written into the engineering file of the program before the test; the PCR and MRR fields are test result summary data, the quantity information such as PART _ CNT in the PCR and MRR fields is firstly recorded as 0, and dynamic adjustment is carried out when the quantity information is changed in the test process.
Step S22: building a first-level pointer indicating the initial position information of each Wafer and a second-level pointer indicating the position information of each chip in each Wafer; the first-level pointer comprises a pointer 1 and a pointer 2, wherein the pointer 1 stores the end position of the last byte of the MIR field, and the pointer 2 stores the position of the byte before the PCR field; the second level pointers comprise M sets of pointers, each set of pointers comprising N +1 pointers.
Specifically, a path pointer about the STDF file is built in the application of the processing module, and the pointer mainly records position nodes of several key fields in the STDF, because the STDF file is a binary byte stream and the pointer records data as byte positions of specific fields. For example, a new pointer (pointer 1) stores the last byte end location of the MIR field.
Step S23: when the testing device starts testing, according to the pointer 1 in the initial STDF file, inserting SDR, PMR and WCR configuration information sections related to engineering in sequence after the last node of the MIR field, and updating the coordinate information of the pointer 1 after leading in so as to lead the pointer to point to the last byte position of the WCR field.
Specifically, when the program starts to run the test, the information of fields such as SDR, PMR and/or WCR needs to be stored in the STDF. The method comprises the steps of firstly obtaining an STDF file, obtaining the position of the last node of an MIR field according to a pointer 1, sequentially inserting SDR, PMR and WCR field information behind the node, wherein the field information is a configuration information section related to engineering, and updating the coordinate information of the pointer 1 after leading in so as to enable the pointer to point to the last byte of the WCR field.
Step S24: generating PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in each of the M wafers according to the real-time test data received by the second interface; and inserting PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in M wafers in sequence before the coordinate information of the second-level pointer according to the coordinate information of the second-level pointer, wherein after the sequential insertion operation is completed, the coordinate information of the second-level pointer is updated until the (N + 1) th time of the coordinate information of the second-level pointer.
Specifically, the program runs and tests a first Wafer starting stage, a Wafer related test result data layer is constructed, fields of first Wafer related information are generated, the fields include WIR and WRR, and a newly-built pointer 2 points to a node before the PCR field starts. For the second-level pointer, the starting address of the insertion of all the chips in each wafer is indicated; for the first wafer, N +1 pointers (A) can be dynamically created during the insertion process1,A2,…AN+1) New construction of A1Pointer, indicating the start node information of the first chip of the first Wafer, pointer A1And pointing to the node behind the WIR, wherein the Wafer test is not finished, and related fields in the WRR can be set as default values in advance.
Similarly, for the second wafer, during the insertion process, N +1 pointers (B) can be created dynamically1,B2,…BN+1) New construction of B1And the pointer indicates the starting node information of the first chip of the second Wafer.
By analogy, for the Mth wafer, in the insertion process, N +1 pointers (M) can be dynamically created1,M2,…MN+1) New construction of M1And the pointer indicates the starting node information of the first chip of the Mth Wafer.
In some preferred embodiments of the present invention, in step S24, when the PIR, PTR, MPR, FTR and/or PRR field of the test result of each chip of each of the M wafers is inserted before the coordinate information of the second stage pointer, the checking of the PIR, PTR, MPR, FTR and/or PRR field of each chip is further included.
Referring to fig. 5, in a preferred embodiment of the present invention, step S24 may include:
step S241: the second level pointers comprise M sets (A, B … M), each set comprising N +1 pointers; selecting all test data of a first chip of a first wafer, summarizing the test data into a PIR-PTR-MPR-FTR-PRR field, and inserting the field into A1After the pointer, newly creating a pointer A after the insertion is finished2Point to the last byte of PRR, and update the coordinate information of pointer 2;
step S242: selecting all test data of a second chip of the first wafer, summarizing the test data into a PIR-PTR-MPR-FTR-PRR field, and inserting the field into A2After the pointer is inserted, a new pointer A3 points to the last byte of the PRR after the insertion is completed, and meanwhile, the coordinate information of the pointer 2 is updated;
step S243: and analogizing in turn, inserting all the test results of the Nth chip, and newly building AN+1The pointer points to the last byte of the PRR, namely the coordinate information of the second-level pointer is updated to the (N + 1) th time;
step S244: when all the chips of the previous wafer are inserted, the pointer B is newly established1Starting to insert all the test data of the first chip of the second wafer in a summary mode until all the test results of the Nth chip are inserted, and newly building a new BN+1The pointer points to the last byte of the PRR, namely the coordinate information of the second-level pointer is updated to the (N + 1) th time;
……
step S245: when all the chips of the M-1 wafer are inserted, newly building a pointer M1Starting to summarize and insert all test data of the first chip of the Mth wafer until all test results of the Nth chip are inserted, and newly building the MN+1The pointer points to the last byte of the PRR, i.e. the coordinate information of the second level pointer is updated to the N +1 th time.
Step S25: and (3) acquiring a WRR field from the front of the pointer 2 updated for the (N + 1) th time, updating WRR field information according to the test result summary data, calculating the total quantity according to the PRR field, packaging into a TSR-SBR-HBR byte string, splicing to the front of the pointer 2, updating PCR and MRR information behind the pointer 2, and completing the generation and storage of the STDF file.
That is, from the beginning of the first Wafer test, the tester starts to test each dut (device under test) of the current Wafer, test each test item in sequence, the lower computer throws out the test result to the upper computer, and the upper application program obtains the test data and then generates fields of PIR, PTR, MPR, FTR, and PRR according to the serial number of the corresponding Die (crystal grain or chip) and the serial number of the test item.
In summary, the testing apparatus and the testing method for rapidly generating the STDF according to the present invention save the storage modules in the upper computer and the lower computer, and also batch process the acquired CP test data before packaging and/or the FT test data after packaging of all the dies on the plurality of wafers in real time, thereby saving the time for processing the data.
The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.
Claims (6)
1. A test apparatus for fast generation of STDF data, comprising:
the lower computer is used for carrying out CP test before packaging and/or FT test after packaging on the N chips on the M wafers; the test module sends out a test result of each chip through the first interface; wherein M and N are integers greater than or equal to 1;
the upper computer comprises a second interface, a processing module and an STDF file storage module; the second interface sequentially receives the test result data of each chip sent by the first interface, and the test result data are sequentially processed by the processing module to form an STDF file and then are sent to the STDF file storage module.
2. The test apparatus for rapidly generating STDF data of claim 1, wherein the processing module comprises:
the testing device comprises a setting unit and a judging unit, wherein the setting unit is used for constructing an initial STDF file frame before the testing device starts testing, the initial STDF file comprises four necessary fields of FAR, MIR, PCR and MRR, the FAR and MIR fields are fields for reading and writing basic information from an engineering file, the PCR and MRR fields are test result summary data, and the quantity information of PART _ CNT in the PCR and MRR fields is recorded as 0;
the path pointer building unit is used for building a first-level pointer for indicating the initial position information of each Wafer and a second-level pointer for indicating the position information of each chip in each Wafer; the first-level pointer comprises a pointer 1 and a pointer 2, wherein the pointer 1 stores the end position of the last byte of the MIR field, and the pointer 2 stores the position of the byte before the PCR field; the second-level pointers comprise M groups, and each group of pointers comprises N +1 pointers;
the initialization unit is used for sequentially inserting SDR, PMR and WCR configuration information sections related to engineering after the last node of the MIR field according to the pointer 1 in the initial STDF file when the testing device starts testing, and updating the coordinate information of the pointer 1 after importing the coordinate information to enable the pointer to point to the last byte position of the WCR field;
the generating unit is used for generating PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in each of the M wafers according to the real-time test data received by the second interface; inserting PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in M wafers in sequence before the coordinate information of the second-level pointer according to the coordinate information of the second-level pointer, wherein after the sequential insertion operation is completed, the coordinate information of the second-level pointer is updated until the coordinate information of the second-level pointer is updated to the (N + 1) th time;
the summarizing unit is used for fetching a WRR field from the front of the pointer 2 updated for the (N + 1) th time, updating WRR field information according to the test result summarizing data, and calculating the total quantity according to the PRR field; and packaging the data into a TSR-SBR-HBR byte string, splicing the TSR-SBR-HBR byte string to the front of the pointer 2, and updating PCR (polymerase chain reaction) and MRR (maximum likelihood ratio) information behind the pointer 2 to finish the generation of the STDF file.
3. A test method for rapidly generating STDF data is characterized by comprising the following steps:
step S1: a test module in the lower computer performs CP test before packaging and/or FT test after packaging on N chips on M wafers, and the test module sends out a test result of each chip through a first interface; wherein M and N are integers greater than or equal to 1;
step S2: the second interface in the upper computer sequentially receives the test result data of each chip sent by the first interface in real time, the processing module only comprises an initial STDF file which is read from the engineering file and written in the basic information field, and the test result data of the N chips on the M wafers are sequentially processed by the processing module and then sequentially inserted into the initial STDF file to form the STDF file and stored.
4. The test method for rapidly generating STDF data of claim 3, wherein the step S2 includes:
step S21: before starting a test, constructing an initial STDF file frame, wherein the initial STDF file comprises four necessary fields of FAR, MIR, PCR and MRR, the FAR and MIR fields are fields for reading and writing basic information from an engineering file, the PCR and MRR fields are test result summary data, and the quantity information of PART _ CNT in the PCR and MRR fields is recorded as 0;
step S22: building a first-level pointer indicating the initial position information of each Wafer and a second-level pointer indicating the position information of each chip in each Wafer; the first-level pointer comprises a pointer 1 and a pointer 2, wherein the pointer 1 stores the end position of the last byte of the MIR field, and the pointer 2 stores the position of the byte before the PCR field; the second-level pointers comprise M groups, and each group of pointers comprises N +1 pointers;
step S23: when a test device starts a test, according to a pointer 1 in the initial STDF file, inserting SDR, PMR and WCR configuration information sections related to engineering in sequence after the last node of the MIR field, and updating the coordinate information of the pointer 1 after leading in so as to enable the pointer to point to the last byte position of the WCR field;
step S24: generating PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in each of the M wafers according to the real-time test data received by the second interface; inserting PIR, PTR, MPR, FTR and/or PRR fields of the test result of each chip in M wafers in sequence before the coordinate information of the second-level pointer according to the coordinate information of the second-level pointer, wherein after the sequential insertion operation is completed, the coordinate information of the second-level pointer is updated until the N +1 th time of the coordinate information of the second-level pointer;
step S25: and (3) acquiring a WRR field from the front of the pointer 2 updated for the (N + 1) th time, updating WRR field information according to the test result summary data, calculating the total quantity according to the PRR field, packaging into a TSR-SBR-HBR byte string, splicing to the front of the pointer 2, updating PCR and MRR information behind the pointer 2, and completing the generation and storage of the STDF file.
5. The test method for rapidly generating STDF data according to claim 4, wherein the step S24 includes:
step S241: the second level pointers comprise M sets (A, B … M), each set comprising N +1 pointers; selecting all test data of a first chip of a first wafer, summarizing the test data into a PIR-PTR-MPR-FTR-PRR field, and inserting the field into A1After the pointer, newly creating a pointer A after the insertion is finished2Point to the last byte of PRR, and update the coordinate information of pointer 2;
step S242: selecting all test data of a second chip of the first wafer, summarizing the test data into a PIR-PTR-MPR-FTR-PRR field, and inserting the field into A2After the pointer is inserted, a new pointer A3 points to the last byte of the PRR after the insertion is completed, and meanwhile, the coordinate information of the pointer 2 is updated;
step S243: and so on to the Nth coreAll test results of the slice are inserted and newly-built AN+1The pointer points to the last byte of the PRR, namely the coordinate information of the second-level pointer is updated to the (N + 1) th time;
step S244: when all the chips of the previous wafer are inserted, the pointer B is newly established1Starting to insert all the test data of the first chip of the second wafer in a summary mode until all the test results of the Nth chip are inserted, and newly building a new BN+1The pointer points to the last byte of the PRR, namely the coordinate information of the second-level pointer is updated to the (N + 1) th time;
……
step S245: when all the chips of the M-1 wafer are inserted, newly building a pointer M1Starting to summarize and insert all test data of the first chip of the Mth wafer until all test results of the Nth chip are inserted, and newly building the MN+1The pointer points to the last byte of the PRR, i.e. the coordinate information of the second level pointer is updated to the N +1 th time.
6. The testing method for rapidly generating STDF data of claim 4, wherein in the step S24, when the PIR, PTR, MPR, FTR and/or PRR field of the test result of each chip of each of the M wafers is inserted before the coordinate information of the second-level pointer, the method further comprises checking the PIR, PTR, MPR, FTR and/or PRR field of each chip.
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