CN113891569A

CN113891569A - Circuit shape-preserving etching manufacturing method based on semi-additive method

Info

Publication number: CN113891569A
Application number: CN202111245264.XA
Authority: CN
Inventors: 胡光辉; 郑沛峰; 路培培; 崔子雅; 潘湛昌; 郝志峰
Original assignee: Guangdong University of Technology
Current assignee: Guangdong University of Technology
Priority date: 2021-10-26
Filing date: 2021-10-26
Publication date: 2022-01-04

Abstract

The invention belongs to the technical field of printed circuit boards, and discloses a manufacturing method of circuit shape-preserving etching based on a semi-additive method. The method comprises the following steps: 1. chemically plating copper on the base material to form a thin copper seed layer; 2. pasting a dry film on the copper seed layer, and plating an anti-corrosion metal layer on the copper-exposed part after exposure and development; 3. after the dry film is removed, placing the film in etching solution for etching; 4. and electroplating copper on the etched sample, thickening the copper circuit and repairing the corroded side wall. The method can protect the rectangular shape of the circuit, can repair the side wall pitting caused by rapid etching, and has practical value in the aspect of manufacturing high-end circuit boards such as class carrier boards and the like.

Description

Circuit shape-preserving etching manufacturing method based on semi-additive method

Technical Field

The invention belongs to the technical field of Printed Circuit Boards (PCBs), and particularly relates to a manufacturing method of circuit shape-preserving etching based on a semi-additive method.

Background

The demand for electronic devices is a driving force for the development of electronic circuit technology, and the introduction of 5G technology has led electronic circuit and IC substrate manufacturers to demand higher densities in their designs. The widespread use of 5G, miniaturization, increased density and functionality of semiconductor packages, reduced circuit geometries, higher density, higher transmission frequencies and speeds, etc., are factors that have led to the advancement of electronic circuit technology. High reliability and excellent electrical performance in these designs are also increasingly important due to the nature of 5G applications. Therefore, the Printed Circuit Board (PCB) industry must move from the traditional extensive to the precise form, and it is predicted that the precise circuit board application will be more normalized in the next years.

In the manufacturing process of the printed circuit board, three processes of a subtractive process, an additive process and a semi-additive process are mainly adopted. The process of protecting the pattern with a resist film on a copper clad laminate and then etching away the exposed copper not protected by the resist film to obtain the desired conductive pattern is called subtractive process. This method can result in etching of the exposed copper layer down and also can result in undercutting, which can make the formation of lines difficult and has limited application in fine lines. A method of forming a wiring by selective electroless copper plating after exposure to light in a wiring pattern using an insulating substrate containing a photocatalyst is called an additive method. The additive process is suitable for manufacturing fine circuits, but the substrate has special requirements, the cost is high, the process is not mature, and the additive process cannot be applied to manufacturing fine circuits in a large scale. A method of forming a seed layer on an insulating layer using an insulating substrate, plating a resist film on the surface thereof, and then performing exposure, development, and formation of a plating resist pattern is called a semi-additive method. The method can be used for manufacturing circuit boards with fine circuits because the obtained copper layer is thin and easy to etch. At present, a semi-additive process (SAP) or a modified semi-additive process (mSAP) is generally adopted for a high density interconnect circuit board (HDI) with the line width/line spacing of less than 50 μm, including a class of carrier board (SLP) with the line width/line spacing of less than 30 μm.

There are several options for fine line circuits, a typical fine line circuit PCB product, uses copper foil technology, such as modified semi-additive process (mSAP), to produce a thin base copper foil layer by pre-etching; the ultra-thin copper foil process (SAP) faces a new challenge, namely, the technical limit of the roughness and thickness of copper. The chinese invention patent CN201310139462.7 proposes a method for laminating ultra-thin copper as a seed layer, however, since the copper foil is too thin, wrinkles and scratches are easily generated. Chinese patent CN200710087205.8 proposes a process for forming a copper seed layer by sputtering. However, the formed copper layer has insufficient adhesion and is difficult to form a wiring. Chinese patent No. CN201410375020.7 discloses a process for forming a copper thin film by sputtering, which is characterized in that the surface of copper can be roughened to improve adhesion, but the cost is too high. Chinese patent 201310221366.7 discloses a method for manufacturing a seed layer by electroless copper plating, but still faces the problems of fine line adhesion and insulation. In SAP and mSAP processes, fine line formation is critical to pattern transfer and etching, where etching copper is a fast etch, with the aim of making the etched line sidewalls vertical. In practice, however, sidewall corrosion may occur after the rapid etch. However, no matter the ultra-thin copper foil process, the sputtering process or the chemical copper deposition process, the problem of side wall corrosion is not solved.

Disclosure of Invention

In order to overcome the defects and shortcomings in the prior art, the invention mainly aims to provide a manufacturing method of line shape-preserving etching based on a semi-additive method, which has simpler steps and strong operability and can partially repair corroded side walls.

The purpose of the invention is realized by the following technical scheme:

a manufacturing method of circuit shape-preserving etching based on a semi-additive method comprises the following steps:

s1, electroless copper plating: pretreating a base material, and then placing the pretreated base material in a chemical copper plating solution for chemical copper plating to form a thin copper seed layer on the base material;

s2, film pasting: attaching a dry film on the copper seed layer formed in the step S1;

s3, plating an anti-corrosion metal layer: exposing and developing the dry film obtained in the step S2, and plating an anti-corrosion metal layer on the part where the copper is exposed;

s4, film stripping: removing the dry film remaining after the processing of step S3;

s5, etching: placing the sample subjected to the film stripping in the step S4 in an etching solution for etching;

s6, copper electroplating thickening and repairing: and electroplating copper on the sample etched in the step S5, thickening the copper circuit, and repairing the corroded side wall.

The base material of step S1 is polyimide, polyester, epoxy resin or polypropylene resin.

Step S1 the pretreatment steps include degreasing, microetching, silanization and activation in sequence.

The plating of the anticorrosive metal layer of step S3 includes: electroplating copper-nickel alloy, electroless palladium plating or electroless gold plating.

Compared with the prior art, the invention has the following advantages and effects:

the invention can protect the rectangular shape of the circuit, can repair the side wall pitting caused by rapid etching, and has practical value in the aspect of manufacturing high-end circuit boards such as class carrier boards and the like.

Drawings

FIG. 1 is a process flow diagram of the present invention;

fig. 2 is an enlarged view of step S6 in fig. 1, wherein 1 is a substrate, 2 is a copper seed layer, 3 is an anti-corrosion metal layer, and 4 is electroplated copper.

Detailed Description

The present invention will be further described with reference to the drawings and the detailed description, but the embodiments are not intended to limit the present invention in any manner. The starting reagents employed in the examples of the present invention are, unless otherwise specified, those that are conventionally purchased. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Step S1 in the following examples the pretreatment steps were oil removal, microetching, silylation, and activation in the order of example 1

A manufacturing method of circuit shape-preserving etching based on a semi-additive method is disclosed, the process flow is shown in figures 1 and 2, and the method comprises the following steps:

s1, electroless copper plating: pretreating polyimide resin, and then placing the polyimide resin in chemical copper plating solution for chemical copper plating to form a thin copper seed layer on the resin;

s3, electroplating an alloy layer: exposing and developing the dry film obtained in the step S2, and electroplating a copper-nickel alloy on the part where the copper is exposed;

Example 2

s1, electroless copper plating: after pretreatment, placing the polyester substrate in a chemical copper plating solution for chemical copper plating to form a thin copper seed layer on the substrate;

s3, electroplating an alloy layer: exposing and developing the dry film obtained in the step S2, and chemically plating palladium on the part where the copper is exposed;

s6, copper electroplating thickening and repairing: and (5) carrying out chemical copper plating on the sample etched in the step S5, thickening the copper circuit and repairing the corroded side wall.

Example 3

s1, electroless copper plating: pre-treating a polyimide resin substrate, and then placing the polyimide resin substrate in a chemical copper plating solution for chemical copper plating to form a thin copper seed layer on the resin;

s3, electroplating an alloy layer: exposing and developing the dry film obtained in the step S2, and electroplating a copper-nickel-phosphorus alloy on the part where the copper is exposed;

Example 4

s3, electroplating an alloy layer: exposing and developing the dry film in the step S2, and chemically plating gold on the exposed copper part;

s6, copper electroplating thickening and repairing: and (5) carrying out chemical copper plating on the sample subjected to the rapid etching in the step S5, thickening the copper circuit, and repairing the corroded side wall.

Step S6 in embodiments 1 to 4 can protect the rectangular shape of the circuit, and can repair the sidewall pitting caused by the rapid etching, and has practical value in the manufacture of high-end circuit boards such as similar carrier boards.

The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.

Claims

1. A manufacturing method of circuit shape-preserving etching based on a semi-additive method is characterized in that: the method comprises the following steps:

2. The method for forming a line profile etching on the basis of the semi-additive process as claimed in claim 1, wherein: the base material of step S1 is polyimide, polyester, epoxy resin or polypropylene resin.

3. The method for forming a line profile etching on the basis of the semi-additive process as claimed in claim 1, wherein: step S1 the pretreatment steps include degreasing, microetching, silanization and activation in sequence.

4. The method for forming a line profile etching on the basis of the semi-additive process as claimed in claim 1, wherein: the plating of the anticorrosive metal layer of step S3 includes: electroplating copper-nickel alloy, electroless palladium plating or electroless gold plating.