CN113871297A - Polysilicon stripping method without damaging gate oxide - Google Patents
Polysilicon stripping method without damaging gate oxide Download PDFInfo
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- CN113871297A CN113871297A CN202111129720.4A CN202111129720A CN113871297A CN 113871297 A CN113871297 A CN 113871297A CN 202111129720 A CN202111129720 A CN 202111129720A CN 113871297 A CN113871297 A CN 113871297A
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 61
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 48
- 238000000034 method Methods 0.000 title claims abstract description 15
- 238000005530 etching Methods 0.000 claims abstract description 34
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 30
- 238000005260 corrosion Methods 0.000 claims abstract description 28
- 230000007797 corrosion Effects 0.000 claims abstract description 24
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 24
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 22
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 22
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 22
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 22
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims abstract description 13
- 235000011114 ammonium hydroxide Nutrition 0.000 claims abstract description 13
- 238000012544 monitoring process Methods 0.000 claims description 13
- 239000007788 liquid Substances 0.000 claims description 10
- 239000000203 mixture Substances 0.000 claims description 9
- 238000004364 calculation method Methods 0.000 claims description 8
- 238000012360 testing method Methods 0.000 claims description 8
- 238000001035 drying Methods 0.000 claims description 7
- 238000011010 flushing procedure Methods 0.000 claims description 7
- 239000002253 acid Substances 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052710 silicon Inorganic materials 0.000 abstract description 9
- 239000010703 silicon Substances 0.000 abstract description 9
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 6
- 239000000758 substrate Substances 0.000 description 4
- 230000008021 deposition Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910003638 H2SiF6 Inorganic materials 0.000 description 1
- 229910004074 SiF6 Inorganic materials 0.000 description 1
- 229910020479 SiO2+6HF Inorganic materials 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- XLYOFNOQVPJJNP-ZSJDYOACSA-N heavy water Substances [2H]O[2H] XLYOFNOQVPJJNP-ZSJDYOACSA-N 0.000 description 1
- 229910052909 inorganic silicate Inorganic materials 0.000 description 1
- 230000009972 noncorrosive effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- ZEFWRWWINDLIIV-UHFFFAOYSA-N tetrafluorosilane;dihydrofluoride Chemical compound F.F.F[Si](F)(F)F ZEFWRWWINDLIIV-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K13/00—Etching, surface-brightening or pickling compositions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
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- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Organic Chemistry (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Weting (AREA)
Abstract
A polysilicon stripping method without damaging gate oxide. Relates to the technical field of semiconductor manufacturing, in particular to a polysilicon stripping method without damaging gate oxide. The method uses 29 percent ammonia water to remove Poly (polysilicon) and replace the original silicon etching solution (HNO)3+HF+HAc+H2O) removing the Poly layer, and removing the Poly layer by ammonia water without corroding SiO2Has extremely low rework risk, well removes the Poly layer and keeps SiO2The effect of (1). The invention has the advantages of no corrosion of SiO2Reducing the rework risk, improving the removal quality of the polysilicon layer and the like.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a polysilicon stripping method without damaging gate oxide.
Background
In the manufacturing process of a groove Schottky product (generally comprising the following steps of a, growing an oxide layer on an epitaxial layer, b, photoetching a groove, etching a gate oxide layer in the groove, d, filling the groove with polysilicon, back etching the groove and the like), the deposition of gate oxide (step c) and the deposition of Poly (polysilicon) (step d) are a time-consuming and important process, when a processing program is interrupted due to other abnormal reasons in the manufacturing process (the machine program interrupts the surface of the polysilicon to have contamination, so the corresponding layer needs to be removed), currently, the removal of Poly (polysilicon) is carried out by adopting a silicon etching solution (HNO 3+ HF + HAc + H2O), and the reaction equation is as follows:
1、3Si+18HF+4HNO3=3H2SiF6+4NO↑+8H2O
2、SiO2+6HF=H2SiF6+2H2O
HF etching SiO in silicon etching liquid2The higher the HF concentration is, the higher the SiO2 corrosion rate is, the thinner the SiO2 of the lower gate oxide layer is, the poor homogeneity of the silicon corrosion liquid corrosion Poly is, and the SiO2The silicon substrate is easy to be corroded cleanly, and the silicon substrate can be corroded continuously to damage devices, so that products are scrapped.
Disclosure of Invention
Aiming at the problems, the invention provides a non-corrosive SiO2The polysilicon stripping method has the advantages of reducing the rework risk and improving the removal quality of the polysilicon layer without damaging the gate oxide.
The technical scheme of the invention is as follows: a polysilicon stripping method without damaging gate oxide comprises the following steps:
s1, measuring the thickness of the polysilicon layer of the device to be reworked, wherein the measured thickness is T1；
S2, calculating the etching time t of the polysilicon layer according to the etching rate of the polysilicon layer1=T11.3/polysilicon etch rate;
s3 etching the polysilicon layer
Putting the device with the thickness of the polycrystalline silicon layer measured in the step S1 into a container tank filled with 29% ammonia water, and reacting t1After the time, taking out the device, and cleaning the residual acid liquor on the surface of the device;
s4, measuring the thickness of the gate oxide layer, wherein the measured thickness is T2；
S5, calculating the etching time of the gate oxide layer, wherein the etching time t of the gate oxide layer2=T2/SiO2The corrosion rate;
s6, placing the device into 20:1 BOE corrosive liquid, and corroding for t2Removing the residueAnd a residual gate oxide layer.
The polysilicon etching rate calculation in step S2 includes the following steps:
s2.1, selecting a polycrystalline silicon monitoring wafer;
s2.2, testing the actual thickness value of the polycrystalline silicon monitoring sheet in the step S2.1 to be A by using a film thickness meter;
s2.3, placing the measured polycrystalline silicon monitoring wafer into a 29% ammonia water container tank to be corroded for 1 min;
s2.4, flushing and spin-drying, and testing the thickness value of the product to be B by using a film thickness meter;
and S2.5, calculating the corrosion rate by the formula E/R = (A-B)/1 min.
SiO in step S52The corrosion rate calculation method comprises the following steps:
s5.1, taking a piece of SiO2Monitoring the film, and measuring the thickness value of the film to be A1 by using a film thickness tester;
s5.2, placing the mixture into BOE corrosive liquid with the ratio of 20:1 for corrosion for 3min, flushing and drying the mixture, and measuring the thickness value of the mixture to be B1 by using a film thickness tester;
s5.3, by calculation, SiO2The etching rate = (A1-B1)/3 min, and a SiO2 etching rate value is obtained.
The method uses 29 percent ammonia water to remove Poly (polysilicon) and replace the original silicon etching solution (HNO)3+HF+HAc+H2O) removing the Poly layer, and removing the Poly layer by ammonia water without corroding SiO2Has extremely low rework risk, well removes the Poly layer and keeps SiO2The effect of (1). The invention has the advantages of no corrosion of SiO2Reducing the rework risk, improving the removal quality of the polysilicon layer and the like.
Drawings
Figure 1 is a schematic diagram of a structure of a trench schottky product in the prior art for growing a gate oxide layer in a trench,
FIG. 2 is a schematic diagram of a structure of a trench Schottky product in a trench filled with polysilicon in the prior art;
in the figure, 1 is a substrate layer, 2 is an epitaxial layer, 3 is a gate oxide layer, and 4 is a polysilicon layer.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
As shown in fig. 1-2, the invention provides a polysilicon stripping method without damaging gate oxide, comprising the following steps:
s1, measuring the thickness of the polysilicon layer of the device to be reworked, wherein the measured thickness is T1 (unit: A);
s2, calculating the etching time t of the polysilicon layer according to the etching rate of the polysilicon layer1=T11.3 (over-etch amount)/polysilicon etch rate (unit: min);
the corrosion rate has certain fluctuation, and after the calculated corrosion time, 30% of corrosion is added, so that the completely corroded areas are completely corroded, and the value of the over-corrosion amount in the scheme is 1.3.
The method for calculating the corrosion rate of the polycrystalline silicon in the formula comprises the steps of using a 10000A polycrystalline silicon monitoring wafer, testing a previous value A by a film thickness meter, putting the wafer into a 29% ammonia water container to be corroded for 1min, flushing and drying, testing a later value B by the film thickness meter, and calculating the corrosion rate E/R = (A-B)/1 min;
s3 etching the polysilicon layer
Placing the device with the thickness of the polysilicon layer measured in the step S1 into a containing groove containing 29% ammonia water to react with the polysilicon layer1After time (the polysilicon on the surface is corroded cleanly, the color of the polysilicon is changed from light color to dark color of silicon dioxide, so that the color change can be obviously seen), taking out the polysilicon, and cleaning the residual acid liquid on the surface of the device by using pure water;
Si+4NH4OH=（NH4）4SiO4+2H2
s4, measuring the thickness of the gate oxide layer by using a film thickness tester, wherein the measured thickness is T2(unit: A);
s5, calculating the etching time of the gate oxide layer, wherein the etching time t of the gate oxide layer2=T2/SiO2Corrosion rate (unit: min);
s6, placing the device into 20:1 BOE corrosive liquid, and corroding for t2And removing the residual gate oxide layer.
The polysilicon etching rate calculation in step S2 includes the following steps:
s2.1, selecting a polycrystalline silicon monitoring wafer with the thickness of 10000A;
s2.2, testing the actual thickness value of the polycrystalline silicon monitoring sheet in the step S2.1 to be A by using a film thickness meter;
s2.3, placing the measured polycrystalline silicon monitoring wafer into a 29% ammonia water container tank to be corroded for 1 min;
s2.4, flushing and spin-drying, and testing the thickness value of the product to be B by using a film thickness meter;
and S2.5, calculating the corrosion rate by the formula E/R = (A-B)/1 min. E/R represents the corrosion rate.
SiO in step S52The corrosion rate calculation method comprises the following steps:
s5.1, taking a piece of SiO2Monitoring the film, and measuring the thickness value of the film to be A1 by using a film thickness tester;
s5.2, placing the mixture into BOE corrosive liquid with the ratio of 20:1 for corrosion for 3min, flushing and drying the mixture, and measuring the thickness value of the mixture to be B1 by using a film thickness tester;
s5.3, by calculation, SiO2The etching rate = (A1-B1)/3 min, and a SiO2 etching rate value is obtained.
The silicon etching solution can continuously etch the gate oxide after etching the polysilicon, the gate oxide can be less and less, the etching time is too long, the gate oxide can be completely etched, and the etching solution can continuously etch the silicon substrate to influence the depth and the appearance of the groove. Too short an etch time may result in an unclean etch of the polysilicon. The ammonia water corrosive liquid does not corrode the gate oxide, so that the silicon dioxide is not continuously corroded after the polysilicon is completely corroded, and the over-corrosion condition does not exist. The ammonia water has long corrosion time when removing Poly (polysilicon) and does not influence SiO2And the sufficient time of Poly (polysilicon) etching is ensured.
The disclosure of the present application also includes the following points:
(1) the drawings of the embodiments disclosed herein only relate to the structures related to the embodiments disclosed herein, and other structures can refer to general designs;
(2) in case of conflict, the embodiments and features of the embodiments disclosed in this application can be combined with each other to arrive at new embodiments;
the above embodiments are only embodiments disclosed in the present disclosure, but the scope of the disclosure is not limited thereto, and the scope of the disclosure should be determined by the scope of the claims.
Claims (3)
1. A polysilicon stripping method without damaging gate oxide is characterized by comprising the following steps:
s1, measuring the thickness of the polysilicon layer of the device to be reworked, wherein the measured thickness value is T1；
S2, calculating the etching time t of the polysilicon layer according to the etching rate of the polysilicon layer1=T11.3/polysilicon etch rate;
s3 etching the polysilicon layer
Putting the device with the thickness of the polycrystalline silicon layer measured in the step S1 into a container tank filled with 29% ammonia water, and reacting t1After the time, taking out the device, and cleaning the residual acid liquor on the surface of the device;
s4, measuring the thickness of the gate oxide layer, wherein the measured thickness is T2；
S5, calculating the corrosion time of the gate oxide layer; etching time t of gate oxide layer2=T2/SiO2The corrosion rate;
s6, placing the device into 20:1 BOE corrosive liquid, and corroding for t2And removing the residual gate oxide layer.
2. The method of claim 1, wherein the polysilicon etching rate estimation in step S2 comprises the following steps:
s2.1, selecting a polycrystalline silicon monitoring wafer;
s2.2, testing the actual thickness value of the polycrystalline silicon monitoring sheet in the step S2.1 to be A by using a film thickness meter;
s2.3, placing the measured polycrystalline silicon monitoring wafer into a 29% ammonia water container tank to be corroded for 1 min;
s2.4, flushing and spin-drying, and testing the thickness value of the product to be B by using a film thickness meter;
and S2.5, calculating the corrosion rate by the formula E/R = (A-B)/1 min.
3. The method of claim 1, wherein the SiO in step S5 is removed2The corrosion rate calculation method comprises the following steps:
s5.1, taking a piece of SiO2Monitoring the film, and measuring the thickness value of the film to be A1 by using a film thickness tester;
s5.2, placing the mixture into BOE corrosive liquid with the ratio of 20:1 for corrosion for 3min, flushing and drying the mixture, and measuring the thickness value of the mixture to be B1 by using a film thickness tester;
s5.3, by calculation, SiO2Etching rate = (A1-B1)/3 min, SiO was obtained2Corrosion rate values.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111129720.4A CN113871297A (en) | 2021-09-26 | 2021-09-26 | Polysilicon stripping method without damaging gate oxide |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111129720.4A CN113871297A (en) | 2021-09-26 | 2021-09-26 | Polysilicon stripping method without damaging gate oxide |
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| Publication Number | Publication Date |
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| CN113871297A true CN113871297A (en) | 2021-12-31 |
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|---|---|---|---|
| CN202111129720.4A Pending CN113871297A (en) | 2021-09-26 | 2021-09-26 | Polysilicon stripping method without damaging gate oxide |
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| CN (1) | CN113871297A (en) |
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2021
- 2021-09-26 CN CN202111129720.4A patent/CN113871297A/en active Pending
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