CN113811989A - 微装置的选择性释放及转移 - Google Patents

微装置的选择性释放及转移 Download PDF

Info

Publication number
CN113811989A
CN113811989A CN202080034593.7A CN202080034593A CN113811989A CN 113811989 A CN113811989 A CN 113811989A CN 202080034593 A CN202080034593 A CN 202080034593A CN 113811989 A CN113811989 A CN 113811989A
Authority
CN
China
Prior art keywords
substrate
micro devices
layer
micro
photosensitive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202080034593.7A
Other languages
English (en)
Inventor
A·D·T·维尔斯马
P·P·加维尔内尼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vuereal Inc
Original Assignee
Vuereal Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vuereal Inc filed Critical Vuereal Inc
Publication of CN113811989A publication Critical patent/CN113811989A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/20Structure, shape, material or disposition of high density interconnect preforms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H01L2221/68322Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68354Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/245Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/821Forming a build-up interconnect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/83005Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83871Visible light curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92244Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10157Shape being other than a cuboid at the active surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0025Processes relating to coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

本发明揭示一种将微装置从施体衬底选择性地转移到接收器衬底上的接触垫的方法。所述方法可包括:提供包括多个微装置的施体衬底,将所述多个微装置转移到中间衬底,接近于系统衬底将所述中间衬底上的一组选定微装置对准,在所述一组选定微装置与系统接收器之间提供光敏性层;接通所述选定微装置,从而通过所述选定微装置所发射的光来固化所述一组选定微装置与所述系统衬底之间的所述光敏性层;及将所述一组选定微装置接合到所述系统衬底上的对应接触垫。

Description

微装置的选择性释放及转移
相关申请案的交叉参考
本申请案主张2019年5月24日提出申请的美国专利申请案第62/852,555号的权益及优先权,所述美国专利申请案特此以全文引用的方式并入本文中。
背景技术及技术领域
本发明涉及将微装置集成到系统衬底中,且更具体来说,本发明涉及将选择性微装置从施体衬底转移及接合到接收器衬底的结构及方法。
通常,经常在平面衬底上成批地制作许多微装置,包含发光二极管(LED)、有机LED、传感器、固态装置、集成电路、MEMS(微机电系统)及其它电子组件。为形成可操作的系统,需要将来自至少一个施体衬底的微装置选择性地转移到接收器衬底。
已采用各种方法来将微装置从施体衬底转移到接收器衬底。在一种方法中,选择性地产生接收器三以改善微装置转移期间的选择性。可通过使用机械、热或静电技术来产生接收器力,然而这些技术呈现出问题。这些技术通常需要用于转移的复杂机械结构。在非常难以物理地完成的另一方法中,可选择性地接通局部加热以局部地提高温度。
在另一转移方法中,可使用局部环氧树脂光固化来将微装置从施体衬底光固化到接收器衬底上。然而,在控制外部光源的光点大小及消像散时会出现限制及困难。此致使在紧密接近度内的邻近微装置非所期望地固化及转移。在这些替代方法中,技术在微型化装置大小及增加衬底上的微装置密度时受限制。
因此,存在对从施体衬底高效地释放微装置(具体来说,微LED)且将其转移到接收器衬底的经改善方法及系统的需要。
发明内容
本发明的一个目标是提供将选择性微装置从施体衬底转移及接合到接收器衬底的方法及结构。
本发明的另一目标是提供转移方法,其中卡匣衬底具有在存在光的情况下将微装置释放到接收器衬底的接合材料,同时相同的光固化装置到接收器衬底的接合。
根据一个实施例,可提供一种将多个微装置集成在系统衬底上的方法。所述方法可包括:提供包括多个微装置的施体衬底,将所述多个微装置转移到中间衬底,接近于系统衬底将所述中间衬底上的一组选定微装置对准,在所述一组选定微装置与系统接收器之间提供光敏性层;通过所述选定微装置所发射的光来固化所述一组选定微装置与所述系统衬底之间的所述光敏性层;及将所述一组选定微装置接合到所述系统衬底上的对应接触垫。
在一种情形中,所述光敏性层可包括可见光可固化透明环氧树脂或光致抗蚀剂层。在另一情形中,所述光敏性层可包括黏合剂。
根据另一实施例,将所述一组选定微装置转移到所述系统衬底上的所述对应接触垫可包括:用所述光敏性层涂覆所述系统衬底的至少一部分,将所述中间衬底对准且按压到所述系统衬底使得所述选定微装置中的每一者与所述系统衬底上的所述对应接触垫对齐,接通所述一组选定微装置;及固化所述光敏性层。
根据又一实施例,在所述施体衬底上制作所述微装置。
根据一个实施例,可在所述施体衬底上的所述微装置上或上方提供侧壁反射器以朝向所述微装置往回反射光。
根据再一些实施例,可在所述施体衬底上的所述微装置上或上方保形地涂覆牺牲释放层。所述牺牲层可以是光致抗蚀剂层。
根据本发明的一个方面,光可从所述侧壁反射器反射出。
根据另一实施例,可提供用于背板衬底上的最终装置结构的透明平面化层。
根据本发明的一个方面,为施体衬底上的微装置提供受控通信能力。
根据本发明的另一方面,可提供通过局部地聚焦微装置光而进行的自发射固化。
根据本发明的一个方面,可提供一种选择性地转移至少一个微LED的方法。
根据本发明的另一方面,本发明方法通常需要用于转移的简单机械结构。
根据本发明的又一方面,与其它常规方法中的热及压力相比,本发明方法通常需要光来固化光敏性层。
鉴于参考图式(下文提供所述图式的简要描述)做出的各个实施例及/或方面的实施方式,本发明的前述内容及额外方面以及实施例对于所属领域的技术人员来说将是显而易见的。
附图说明
在阅读以下实施方式之后及在参考图式之后本发明的前述内容及其它优点即刻将变得显而易见。
图1图解说明根据本发明的所有实施例的具有微装置的施体衬底的剖视图。
图2图解说明根据本发明的实施例的对临时衬底与经集成微装置的的电路集成的剖视图。
图3图解说明根据本发明的实施例移除施体衬底的剖视图。
图4图解说明根据本发明的实施例选择性地移除牺牲层的剖视图。
图5图解说明根据本发明的实施例使用可见光可固化光致抗蚀剂/环氧树脂将微装置集成到背板的剖视图。
图6图解说明根据本发明的实施例使用临时衬底来转移其它组微装置的剖视图。
图7图解说明根据本发明的实施例的背板衬底上的透明平面化层的剖视图。
图8A图解说明根据本发明的实施例的使用金属反射器的顶部侧发射的剖视图。
图8B图解说明根据本发明的实施例的使用金属反射器的背侧发射的剖视图。
图8C图解说明根据本发明的实施例的通过分布式布拉格(Bragg)反射器进行的顶部侧发射的剖视图。
图8D图解说明根据本发明的实施例的通过分布式布拉格反射器进行的背侧发射的剖视图。
图9展示根据本发明的实施例的用以将微装置转移及接合到背板的一系列步骤。
在不同图中使用相同参考编号指示类似或相同元件。
鉴于参考图式(下文提供所述图式的简要描述)进行的各个实施例及/或方面的实施方式,本发明的前述内容及额外方面以及实施例对于所属领域的技术人员来说将是显而易见的。
具体实施方式
尽管本发明易于作出各种修改及替代形式,但在图式中以实例方式展示且将在本文中详细地描述特定实施例或实施方案。然而,应理解,本发明并不旨在限于所揭示的特定形式。而是,本发明涵盖归属于如由所附权利要求书界定的本发明精神内的所有修改、等效形式及替代方案。
在此说明书中,可互换地使用术语“系统衬底”、“接收器衬底”及“显示器衬底”。然而,所属领域的技术人员清楚的是,本文中所描述的实施例与衬底类型无关。
在此说明书中,可互换地使用术语“施体衬底”及“载体衬底”。然而,所属领域的技术人员清楚的是,本文中所描述的实施例与衬底类型无关。
在此说明书中,可互换地使用术语“临时衬底”、“中间衬底”及“卡匣衬底”。然而,所属领域的技术人员清楚的是,本文中所描述的实施例与衬底类型无关。
在此说明书中,可互换地使用术语“晶片”及“衬底”。然而,所属领域的技术人员清楚的是,本文中所描述的实施例与衬底类型无关。
另外,这些实施例例示地图解说明四个微发光装置,但本发明不限于此。微发光装置的数目可根据实际需要而改变。
图1图解说明根据本发明的实施例的具有微装置的施体衬底的剖视图。
此处,通过在蓝宝石衬底上沉积材料堆叠来制作微装置(例如,GaN LED)。微装置结构可呈以下各项中的一者的形式:圆柱体结构、台面结构、Hip芯片结构或垂直结构。
GaN LED装置102包含施体衬底100(例如蓝宝石)、形成于衬底100上的n型GaN层或缓冲层106(举例来说,无掺杂GaN)、有源层(例如,多量子阱(MQW))层及p型GaN层。透明导电层(例如Ni/Au或ITO)通常形成于p掺杂GaN层上,用于较好横向电流传导。施体衬底可以是生长衬底或载体衬底。惯常地,然后在透明导电层上形成p型金属触点112-p,例如Pd/Au、Pt或Ni/Au。由于衬底(蓝宝石)是绝缘体,因此暴露n型GaN以接触此层。此步骤通常是使用干蚀刻工艺来暴露n型GaN且然后沉积适当金属触点来完成。例如,n型金属触点112-n。
在一些实施例中,可在施体衬底上的微装置上方沉积侧壁反射器108,以朝向微装置的侧壁往回反射光。在一种情形中,反射器可由金属(例如,Ag、Al、Au)制成。在另一情形中,反射器可由分布式布拉格反射器制成。
在任一情形中,这些侧壁反射器应经优化以具有特定微LED的发射光谱的高反射率。举例来说,红色LED可具有与蓝色LED不同的反射器,此基于哪一者在所述波长(色彩)下的反射更高效。
在一个实施例中,微装置可保形涂覆有牺牲释放层110,牺牲释放层110可由光致抗蚀剂层、金属层或保形介电层组成。然而,牺牲层组成不限于以上所列举的这些材料。在一种情形中,必须关于侧壁反射器108选择性地蚀刻牺牲释放层110。
在另一实施例中,可围绕施体衬底上的微装置提供钝化层。在一种情形中,所述钝化层可以是介电层以隔离微LED侧壁。在另一情形中,所述钝化层可以是聚亚酰胺。
然后,举例来说,可通过使用光刻图案化及蚀刻来图案化介电层及侧壁反射器108以部分地暴露微LED的顶部表面。
图2图解说明根据本发明的所有实施例的临时衬底与具有经集成微装置的施体衬底的集成的剖视图。参考图2,本发明的实施例包括衬底100、微装置102及驱动电路层120。缓冲层106可沉积在衬底100与微装置102之间。缓冲层(或层)可用作脱离层,以及用于将完全集成系统与衬底100分离。在微装置102上方及周围将平面化层116显影。可能的是,平面化层116由几种不同层及材料组成。然后将开口/通孔118形成(例如蚀刻)到平面化层116中,向下到光致抗蚀剂层。在一种情形中,通孔是通过将例如金属等的导电材料或透明导电氧化物沉积到沟槽中而形成。在一个实例中,通孔是通过将金属溅镀到沟槽中而形成。可从局部区域移除光致抗蚀剂。
然后,可通过将驱动电路层120安置于开口中来将临时衬底114接合到微装置,借此可针对个别微装置图案化驱动电路层。驱动电路层120可以是薄膜晶体管(TFT)、CMOS小芯片或其它类型的集成电路。在一种情形中,临时衬底114可以是玻璃衬底或蓝宝石衬底。
图3图解说明根据本发明的实施例的施体衬底的移除的剖视图。在一个实施例中,在安装临时衬底114之后,可移除施体衬底100。可从横向功能装置移除施体衬底100。在一种情形中,可使用激光剥离来移除施体衬底。可用激光照射施体衬底以将微装置从施体衬底剥离且转移到临时衬底。在另一情形中,尤其在红色微装置的情形中,可使用化学剥离来移除施体衬底。当红色LED由GaAs施体衬底上的GaAs制成时,化学剥离可以是用于施体衬底的移除的较佳选择。然而,化学剥离可用在任何其它类型的由蓝宝石衬底上的GaN制成的例如蓝色及绿色的微装置上。
根据一个实施例,施体衬底上的微装置可具备不同锚,借此在剥离装置之后,锚将所述装置固持到施体衬底。锚也可直接地或通过其它层间接地连接到施体衬底。
在下一步骤中,可回蚀微装置的各侧上的GaN缓冲层122及钝化层。可使用ICP蚀刻将GaN及钝化层蚀刻到~1um至2um以用于光聚焦。
图4图解说明根据本发明的实施例的牺牲层的选择性移除的剖视图。在一个实施例中,可移除涂覆在微LED上方的牺牲层110。在一个实例中,微装置可由牺牲层覆盖,所述牺牲层可通过化学、光学、热或机械力而从临时衬底解除接合。解除接合方法可以是选择性或全局的。可通过溶液处理(例如,溶剂剥除或酸蚀刻)来移除所述牺牲层。移除牺牲层以使微装置的释放过程变得容易。
在一种情形中,可回蚀平面化层126或可进行等离子体蚀刻。
微装置从卡匣到接收器衬底的转移的过程可以是基于不同机制。
图5图解说明根据本发明的实施例使用可见光可固化光致抗蚀剂/环氧树脂将微装置集成到背板的剖视图。在移除牺牲层之后,接下来的步骤可以是将微装置接合到接收器衬底。参考图5,接收器衬底可具备用于耦合或连接微装置的接触垫。微装置可通过接触垫耦合或连接到接收器衬底上的驱动电路系统134。驱动电路系统可以是形成在接收器衬底上的薄膜晶体管(TFT)、CMOS小芯片或其它类型的集成电路。此处,可单独地制作接收器衬底128。可将临时衬底与接收器衬底对准使得选定微装置与对应接触垫对齐。可将临时衬底与接收器衬底移动在一起,直到选定微装置被定位成与接触垫具有经界定距离。所述经界定距离可对应于完全或部分接触但不限于此。换句话说,选定微装置实际上触及对应接触垫可未必是绝对必要的,但必须足够靠近使得下文所描述的力可被操纵。
在一个实施例中,可将光敏性层/可见光130的薄层/膜(例如,红色光可固化光致抗蚀剂或环氧树脂)选择性地或全局地施加/涂覆于接收器衬底128上方。所述层/膜不应被固化直到微LED将光发射到膜中,然后所述光使膜固化。此将致使微LED接合到背板。接合的黏合力强于将微LED固持到卡匣的力。当抬升卡匣时,锚将断裂且微LED将被转移到背板。
在一个方面中,可将临时衬底与背板/系统衬底对准且按压使得选定微装置中的每一者与系统衬底上的接触垫对齐。选定微装置可实际上触及接收器垫上的对应接触垫。可接通微装置132。可接通一组选择性微装置或全部微装置。光可从侧壁反射器反射出。由于反射器实际上挖入到可见光可固化光致抗蚀剂/环氧树脂中,因此紧密接近装置的光泄漏及固化经最小化。可见光可固化环氧树脂可经固化。在一种情形中,用光来固化环氧树脂。在另一情形中,其可用热或压力来固化。可将一组选定微装置转移到系统衬底上的对应接触垫。
可使用不同或相同中间衬底将此方法应用于相同接收器衬底多次。
在一种情形中,在转移所有装置之后,可通过显影剂溶液来移除未经固化光敏性层(不存在装置的位置)。
图6图解说明根据本发明的实施例将临时衬底用于转移其它组微装置的剖视图。将临时衬底与接收器衬底移动分开,从而使选定微装置附接到对应接触垫,如图6中所展示。
一旦将临时衬底与接收器衬底分离,则可进行进一步处理步骤。举例来说,可将临时衬底136与接收器衬底128重新对准,且可重复所述步骤以便将一不同组微装置转移到一不同组接触垫直到临时衬底是空的。
如果接收器衬底被填满,那么可将接收器衬底移动到接下来的步骤。如果接收器衬底需要进一步填充,那么可进行从一或多个额外卡匣衬底的进一步转移步骤。在新转移循环之前,如果卡匣不具有足够的装置,那么循环从第一步骤开始。如果卡匣衬底具有足够的微装置,那么在后续步骤中将卡匣衬底偏移(或移动及对准)到接收器衬底的新区域。
在一个实例中,可在第二组选定微装置与第二组接触垫之间提供第二光可固化层,所述第二组选定微装置不同于所述选定微装置且第二组接触垫不同于接收器衬底上的选定接触垫。然后,可将中间衬底136与接收器衬底128重新对准使得第二组选定微装置中的每一者与接收器衬底上的第二组接触垫对齐。可将施体衬底与接收器衬底移动在一起,直到第二组选定微装置中的每一者与接收器衬底上的第二组接触垫及第二光可固化层接触或接近。
图7图解说明根据本发明的实施例的背板衬底上的透明平面化层的剖视图。一旦将临时衬底与接收器衬底分离,则可进行进一步处理步骤。在一个方面中,可提供用于背板衬底上的最终装置结构的透明平面化层138。可将此平面化层向下蚀刻到微LED上的金属触点。可在平面化层中形成通孔以控制LED。
图8A图解说明根据本发明的实施例的使用金属反射器进行的顶部侧发射的剖视图。此处,共同顶部触点可以是经图案化电极系统140,微装置可通过平面化层中的开口/通孔142连接到背板。共同顶部电极140可由通过物理气相沉积而沉积的透明导电氧化物(例如,ITO)组成。然而,共同顶部电极不限于这些材料。金属反射器可由例如Au、Ag、Cr等反射导体组成且通过物理气相沉积而沉积。然而,金属反射器并不限于这些材料。背板可在任何给定时间控制至少一个微LED且与所述至少一个微LED通信。
图8B图解说明根据本发明的实施例的使用金属反射器进行的背侧发射的剖视图。此处,可针对个别微装置图案化驱动电路层144。其可以是无源的或针对释放经优化的。
图8C图解说明根据本发明的实施例通过分布式布拉格反射器进行的顶部侧发射的剖视图。参考图8C,替代在微装置的侧壁处使用金属反射器,可使用分布式布拉格反射器148。这些是由具有不同反射率的交替介电层制成的高反射性结构。布拉格反射器的实例由Si与Mo或TiO2与SiN的交替层组成。然而,布拉格反射器组成不限于这些材料。所述材料可使用物理气相沉积来沉积。
图8D图解说明根据本发明的实施例的通过分布式布拉格反射器进行的背侧发射的剖视图。此处,可针对个别微装置图案化驱动电路层144。其可以是无源的或针对释放经优化的。
图9展示根据本发明的实施例将微装置转移及接合到背板的方法900的流程图。在步骤902中,在施体衬底上提供多个微装置。在步骤904中,将多个微装置转移到中间衬底。然后,在步骤906中,接近于系统衬底将微装置对准。在步骤908中,在一组选定微装置与系统衬底之间提供光敏性层,然后,在步骤910中,可接通一组选定微装置,且可通过由选定微装置所发射的光固化所述一组选定微装置与系统衬底之间的光敏性层。在步骤912中,将选定微装置接合到系统衬底上的对应接触垫。
根据一个实施例,可提供一种将多个微装置集成在系统衬底上的方法。所述方法可包括:提供包括多个微装置的施体衬底,将所述多个微装置转移到中间衬底,接近于所述系统衬底将所述中间衬底上的一组选定微装置对准,在所述一组选定微装置与系统接收器之间提供光敏性层;及将所述一组选定微装置转移到所述系统衬底上的对应接触垫。
根据另一实施例,所述光敏性层可包括可见光可固化透明环氧树脂或光致抗蚀剂层或黏合剂。
根据又一实施例,将所述一组选定微装置转移到系统衬底上的对应接触垫可包括:用光敏性层涂覆系统衬底的至少一部分,将中间衬底对准且按压到系统衬底使得选定微装置中的每一者与系统衬底上的对应接触垫对齐,接通所述一组选定微装置;及固化光敏性层。通过施加光来固化光敏性层。
根据再一些实施例,所述方法可进一步包括移除中间衬底。
根据一些实施例,提供包括微装置的施体衬底的步骤包括:在施体衬底上制作微装置,在施体衬底上的微装置的侧壁上安装反射器,在微装置上或上方保形地沉积牺牲层;及在微装置上或上方提供平面化层。
根据另一实施例,所述平面化层可经图案化以在微装置的顶部上形成开口,用于连接到中间衬底。
根据又一实施例,所述牺牲层可包括以下各项中的一者:光致抗蚀剂层、金属层或保形介电层。可在接近于系统衬底将中间衬底上的微装置对准之前移除所述牺牲层。可使用蚀刻或光刻来图案化侧壁反射器以暴露微装置的顶部表面。
根据一个实施例,可在施体衬底上制作微装置,所述微装置包括以下各项中的一者:圆柱体结构、台面结构、倒装芯片结构或垂直结构。
根据另一实施例,将多个微装置转移到中间衬底的步骤可包括:提供用于将每一微装置固持到施体衬底的锚;及移除施体衬底。通过以下各项中的一者来移除施体衬底:激光剥离或化学蚀刻。
根据一些实施例,移除中间衬底可包括使所述一组选定微装置的锚断裂。中间衬底可包括经图案化驱动电路层。经图案化驱动层可包括TFT。系统衬底是以下各项中的一者:蓝宝石衬底或玻璃衬底。
根据又一实施例,所述方法可进一步包括:接近于系统衬底将中间衬底上的第二组选定微装置第二次对准,在第二组选定微装置与系统衬底之间提供第二光敏性层,将中间衬底移动到系统衬底使得第二组选定微装置中的每一者与系统衬底上的对应第二选定接触垫对齐,接通第二组选定微装置,固化第二组选定微装置与系统衬底之间的光敏性层;及将第二组选定微装置接合到系统衬底上的对应第二接触垫。
根据另一实施例,可全局地或选择性地施加光敏性层。
根据一个实施例,所述方法可进一步包括在移除中间衬底及通过显影剂溶液移除未经固化光敏性层之后,在系统衬底上方提供透明平面化层。
综上所述,提供了将微装置从施体衬底转移及接合到接收器衬底的方法及结构。
出于图解说明及描述的目的,已呈现本发明的一或多个实施例的前述说明。其并非旨在是穷尽性的或将本发明限于所揭示的精确形式。根据本文中的教示,许多修改及变化是可能的。本发明的范围并非旨在受此实施方式限制,而是由所附权利要求书限制。

Claims (21)

1.一种将多个微装置集成在系统衬底上的方法,其包括:
提供包括所述多个微装置的施体衬底;
将所述多个微装置转移到中间衬底;
接近于所述系统衬底将所述中间衬底上的一组选定微装置对准;
将所述中间衬底移动到所述系统衬底,使得所述选定微装置中的每一者与所述系统衬底上的对应接触垫对齐;
在所述一组选定微装置与所述系统衬底之间提供光敏性层;
接通所述选定微装置;
通过由所述选定微装置所发射的光来固化所述一组选定微装置与所述系统衬底之间的所述光敏性层;及
将所述一组选定微装置接合到所述系统衬底上的所述对应接触垫。
2.根据权利要求1所述的方法,其中所述光敏性层包括可见光可固化透明环氧树脂或光致抗蚀剂。
3.根据权利要求1所述的方法,其中全局地或选择性地施加所述光敏性层。
4.根据权利要求1所述的方法,其进一步包括:
通过显影剂溶液移除未经固化光敏性层。
5.根据权利要求1所述的方法,其进一步包括:移除所述中间衬底。
6.根据权利要求1所述的方法,其中所述提供包括所述微装置的所述施体衬底的步骤包括:
在所述施体衬底上制作所述微装置;
在所述施体衬底上所述微装置的侧壁上安装反射器;
在所述微装置上或上方保形地沉积牺牲层;及
在所述微装置上及上方提供平面化层。
7.根据权利要求6所述的方法,其中所述平面化层经图案化以在所述微装置的顶部上形成开口,用于连接到所述中间衬底。
8.根据权利要求6所述的方法,其中所述牺牲层包括以下各项中的一者:光致抗蚀剂层、金属层或保形介电层。
9.根据权利要求6所述的方法,其中在接近于所述系统衬底将所述中间衬底上的所述微装置对准之前移除所述牺牲层。
10.根据权利要求6所述的方法,其中使用蚀刻或光刻来图案化所述侧壁反射器以暴露所述微装置的顶部表面。
11.根据权利要求6所述的方法,其中在所述施体衬底上制作的所述微装置包括以下各项中的一者:圆柱体结构、台面结构、倒装芯片结构或垂直结构。
12.根据权利要求1所述的方法,其中所述将所述多个微装置转移到所述中间衬底的步骤包括:
提供用于将每一微装置固持到所述施体衬底的锚;及
移除所述施体衬底。
13.根据权利要求12所述的方法,其中通过以下各项中的一者移除所述施体衬底:激光剥离或化学蚀刻。
14.根据权利要求12所述的方法,其中移除所述中间衬底包括使所述一组选定微装置的所述锚断裂。
15.根据权利要求1所述的方法,其中所述中间衬底包括经图案化驱动电路层。
16.根据权利要求1所述的方法,其中所述经图案化驱动层包括TFT。
17.根据权利要求1所述的方法,其中所述系统衬底是以下各项中的一者:蓝宝石衬底或玻璃衬底。
18.根据权利要求1所述的方法,其进一步包括:
接近于所述系统衬底将所述中间衬底上的第二组选定微装置第二次对准;
在所述第二组选定微装置与所述系统衬底之间提供第二光敏性层;
将所述中间衬底移动到所述系统衬底,使得所述第二组选定微装置中的每一者与所述系统衬底上的对应第二选定接触垫对齐;
接通所述第二组选定微装置;
固化所述第二组选定微装置与所述系统衬底之间的所述光敏性层;及
将所述第二组选定微装置接合到所述系统衬底上的所述对应第二接触垫。
19.根据权利要求1所述的方法,其中全局地或选择性地施加所述光敏性层。
20.根据权利要求4所述的方法,其进一步包括:
在移除所述中间衬底之后,在所述系统衬底上方提供透明平面化层。
21.根据权利要求3所述的方法,其进一步包括:
通过显影剂溶液移除所述未经固化光敏性层。
CN202080034593.7A 2019-05-24 2020-05-25 微装置的选择性释放及转移 Pending CN113811989A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201962852555P 2019-05-24 2019-05-24
US62/852,555 2019-05-24
PCT/IB2020/054921 WO2020240395A1 (en) 2019-05-24 2020-05-25 Selective release and transfer of micro devices

Publications (1)

Publication Number Publication Date
CN113811989A true CN113811989A (zh) 2021-12-17

Family

ID=73552292

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202080034593.7A Pending CN113811989A (zh) 2019-05-24 2020-05-25 微装置的选择性释放及转移

Country Status (4)

Country Link
US (1) US20220254950A1 (zh)
CN (1) CN113811989A (zh)
TW (1) TW202114079A (zh)
WO (1) WO2020240395A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112022003910T5 (de) * 2021-08-09 2024-05-23 Vuereal Inc. Selektives freigeben von mikrovorrichtungen

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6969635B2 (en) * 2000-12-07 2005-11-29 Reflectivity, Inc. Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
US7943491B2 (en) * 2004-06-04 2011-05-17 The Board Of Trustees Of The University Of Illinois Pattern transfer printing by kinetic control of adhesion to an elastomeric stamp
US8889485B2 (en) * 2011-06-08 2014-11-18 Semprius, Inc. Methods for surface attachment of flipped active componenets
US8987765B2 (en) * 2013-06-17 2015-03-24 LuxVue Technology Corporation Reflective bank structure and method for integrating a light emitting device
US9269914B2 (en) * 2013-08-01 2016-02-23 Semiconductor Energy Laboratory Co., Ltd. Light-emitting device, electronic device, and lighting device
US9484332B2 (en) * 2015-03-18 2016-11-01 Intel Corporation Micro solar cell powered micro LED display
JP6533838B2 (ja) * 2015-11-04 2019-06-19 ゴルテック インコーポレイテッド マイクロ発光ダイオードの搬送方法、製造方法、装置及び電子機器
US20170215280A1 (en) * 2016-01-21 2017-07-27 Vuereal Inc. Selective transfer of micro devices
US20180033768A1 (en) * 2016-07-26 2018-02-01 Ananda H. Kumar Flat panel display formed by self aligned assembly
CN109690757B (zh) * 2016-10-04 2023-02-28 维耶尔公司 施体衬底中的微装置布置
CA2986503A1 (en) * 2017-11-23 2019-05-23 Vuereal Inc. Microdevice transfer setup
US11094530B2 (en) * 2019-05-14 2021-08-17 Applied Materials, Inc. In-situ curing of color conversion layer

Also Published As

Publication number Publication date
US20220254950A1 (en) 2022-08-11
WO2020240395A1 (en) 2020-12-03
TW202114079A (zh) 2021-04-01

Similar Documents

Publication Publication Date Title
EP3499570A1 (en) Electronic device and method of manufacturing the same
JP6483246B2 (ja) 微小持ち上げ・接合組立法
EP3955304B1 (en) Integrated colour led micro-display
CN111433836A (zh) Led显示面板的制造方法
CN107046004B (zh) 电子元件的转移方法及电子模块
US20210119098A1 (en) Substrate mounting method and electronic-component-mounted substrate
CN114649322B (zh) Micro LED显示器件及制备方法
KR20180080113A (ko) 디스플레이 장치 및 디스플레이 장치 형성 방법
US10269781B1 (en) Elastomeric layer fabrication for light emitting diodes
JP2002311858A (ja) 素子の転写方法及びこれを用いた素子の配列方法、画像表示装置の製造方法
US20220208738A1 (en) Optoelectronic solid state array
JP2020013954A (ja) 基板接続構造、マイクロledディスプレイ及び部品実装方法
TW202114251A (zh) 電子零件封裝構造、電子零件封裝方法及led顯示面板
US20180321558A1 (en) Display devices
US20220254950A1 (en) Selective release and transfer of micro devices
CN113451352B (zh) 芯片弱化结构及其制作方法、巨量转移方法、显示面板
US20220005774A1 (en) Microdevice cartridge structure
CN114787997A (zh) 形成多色磷光体转换led阵列
CN115939272A (zh) 微型led器件制备方法、微型led器件以及显示装置
CN111192820A (zh) 自对准竖直固态装置制造和集成方法
CN211700275U (zh) 一种led显示装置
WO2020003869A1 (ja) 基板実装方法及び電子部品実装基板
US11295972B2 (en) Layout structure between substrate, micro-LED array and micro-vacuum module for micro-LED array transfer using micro-vacuum module, and method for manufacturing micro-LED display using the same
EP3474336B1 (en) Elastomeric layer fabrication for light emitting diodes
US20230131224A1 (en) Device and a method for manufacturing the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination