CN113811091A - Through-hole metallization method of fine ceramic circuit board - Google Patents
Through-hole metallization method of fine ceramic circuit board Download PDFInfo
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- CN113811091A CN113811091A CN202111172085.8A CN202111172085A CN113811091A CN 113811091 A CN113811091 A CN 113811091A CN 202111172085 A CN202111172085 A CN 202111172085A CN 113811091 A CN113811091 A CN 113811091A
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- circuit board
- hole
- positive photoresist
- holes
- fine ceramic
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- 239000000919 ceramic Substances 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000001465 metallisation Methods 0.000 title claims description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 36
- 229910052751 metal Inorganic materials 0.000 claims abstract description 36
- 238000009713 electroplating Methods 0.000 claims abstract description 18
- 239000011248 coating agent Substances 0.000 claims abstract description 6
- 238000000576 coating method Methods 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 34
- 230000001681 protective effect Effects 0.000 claims description 7
- 230000000903 blocking effect Effects 0.000 claims description 6
- 239000002344 surface layer Substances 0.000 claims description 4
- 238000012546 transfer Methods 0.000 claims description 4
- 239000012670 alkaline solution Substances 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims description 3
- 238000001771 vacuum deposition Methods 0.000 claims description 2
- 230000008719 thickening Effects 0.000 abstract description 9
- 238000002360 preparation method Methods 0.000 abstract description 4
- 230000010354 integration Effects 0.000 abstract description 3
- 238000013461 design Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 abstract description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 10
- 229910052802 copper Inorganic materials 0.000 description 9
- 239000010949 copper Substances 0.000 description 9
- 239000000758 substrate Substances 0.000 description 8
- 238000005406 washing Methods 0.000 description 6
- 238000007747 plating Methods 0.000 description 5
- 239000007788 liquid Substances 0.000 description 3
- 239000003814 drug Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 241001391944 Commicarpus scandens Species 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003984 copper intrauterine device Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0073—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
- H05K3/0079—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the method of application or removal of the mask
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
本发明公开了一种精细陶瓷线路板的通孔金属化方法，首先在线路板的上下两面以及通孔内壁上真空镀上一层金属种子层，然后采用光刻胶在线路板的上下表面形成抗镀膜，并采用两次不同方向的曝光显影，实现了对通孔进行填孔而不加厚表面的金属层，露出通孔，实现自对准掩膜的效果，相对于干膜掩膜的方法来说，不存在对不准的问题。而且在电镀填孔的时候不会对上下两面进行加厚，一方面大大减少了价格昂贵的电镀药水的使用，节约了成本；另一方面，表面金属层越薄，采用图形转移方法所能制备的导线线宽越窄，线路越精细，从而线路板集成度越高，有利于精细化线路的制备，且可以根据需要进行后续的加厚，能够满足更复杂、集成度更高的电路设计应用要求。
The invention discloses a method for metallizing a through hole of a fine ceramic circuit board. First, a metal seed layer is vacuum-plated on the upper and lower sides of the circuit board and the inner wall of the through hole, and then photoresist is used to form the upper and lower surfaces of the circuit board. Anti-coating, and using two exposures in different directions to fill the through holes without thickening the metal layer on the surface, exposing the through holes, and realizing the effect of self-aligned mask, compared with the dry film mask. In terms of method, there is no problem of inaccuracy. Moreover, the upper and lower sides will not be thickened when the holes are filled by electroplating. On the one hand, the use of expensive electroplating solutions is greatly reduced and costs are saved; The narrower the wire width, the finer the circuit, so the higher the integration of the circuit board, which is conducive to the preparation of the refined circuit, and the subsequent thickening can be carried out as needed, which can meet the needs of more complex and more integrated circuit design applications. Require.
Description
Technical Field
The invention belongs to the technical field of circuit board manufacturing, and particularly relates to a through hole metallization method of a fine ceramic circuit board.
Background
For a circuit board with circuits on both the upper and lower surfaces, a through hole is usually drilled in the circuit board, and a metal is filled in the through hole to realize the conduction between the circuits on the upper and lower surfaces.
The existing circuit board through hole metallization technology is that a thin metal seed layer is vacuum-plated on the upper and lower surfaces of a circuit board and the inner wall of a through hole, and then the through hole is filled with metal by adopting an electroplating method. The prior art has the disadvantages that the metal layers on the upper and lower surfaces are thickened while the through holes are filled by electroplating, and a fine circuit layer is difficult to prepare when the circuit layer is prepared by a photoetching method in the later stage. If a fine circuit is to be prepared, the metal layers on the upper and lower surfaces need to be thinned, so that the waste of metal electroplating liquid medicine is caused, the metal electroplating liquid medicine is expensive, and the phase change increases the cost.
The invention patent of publication number "CN 108184312A", entitled "double-side conductive ceramic circuit board and preparation method thereof" discloses a double-side conductive ceramic circuit board and preparation method thereof, wherein after the upper and lower surfaces of a substrate and the inner wall of a through hole are metallized, a dry film with circuit patterns is firstly pasted, then the hole is filled by an electroplating method, and then the surface metal circuit is obtained by film stripping and etching. The defects that the circuit pattern is difficult to refine when the film thickness is a plurality of films, and the film stripping is difficult when the dry film is partially covered by the electroplated copper when the film thickness is a plurality of films.
The invention patent with the publication number of 'CN 110753459A', named as 'method for filling holes on power device by electroplating' discloses a method for filling holes on power device by electroplating, which comprises the steps of metallizing the upper and lower surfaces of a substrate and the inner walls of through holes, forming photosensitive films by using photosensitive materials to completely block metal layers on the upper and lower surfaces to expose the through holes, filling holes by electroplating, and washing off the photosensitive films, thereby achieving the purpose of metallizing the through holes but not thickening the metal layers on the surfaces. But it does not describe how to achieve that the photosensitive material completely blocks the metal layers on the upper and lower surfaces to expose the through hole.
Disclosure of Invention
In view of the above-mentioned disadvantages, an object of the present invention is to provide a method for metallizing a through hole of a fine ceramic circuit board without thickening the upper and lower surfaces thereof during hole filling by electroplating.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
a method of via metallization for fine ceramic wiring boards comprising the steps of:
(1) a through hole penetrating the circuit board is formed in advance on the circuit board, and the aperture of the through hole is 50-200 um; the circuit board is preferably a ceramic circuit board; plating metal seed layers with the thickness of 0.1-2um on the upper surface and the lower surface of the circuit board and the inner wall of the through hole by adopting a vacuum deposition method;
(2) coating positive photoresist on the upper surface of the circuit board, exposing from bottom to top, exposing the positive photoresist at the through hole position through ultraviolet light, developing the positive photoresist on the upper surface except the through hole position without exposure due to the blocking of the metal seed layer, and washing the positive photoresist at the through hole position on the upper surface;
(3) coating a positive photoresist on the lower surface of the circuit board, exposing from top to bottom, exposing the positive photoresist at the through hole position through ultraviolet light, wherein the positive photoresist on the lower surface except the through hole position cannot be exposed due to the blocking of a metal seed layer, attaching a protective film on the upper surface of the circuit board to protect the positive photoresist on the upper surface from being developed, developing, washing the positive photoresist at the through hole position on the lower surface, and removing the protective film;
(4) electroplating the circuit board to fill the hole, wherein the upper and lower surfaces of the circuit board are protected by the positive photoresist and can not be plated with metal;
(5) washing off positive photoresist on the upper surface and the lower surface of the circuit board by using an organic solution or an alkaline solution;
(6) thickening the metal seed layers on the upper surface and the lower surface of the circuit board by adopting electroplating to form metal surface layers; the thickness of the metal surface layer is preferably less than 50 um;
(7) and manufacturing refined circuits on the upper and lower surfaces of the circuit board by adopting a pattern transfer method.
The invention has the beneficial effects that: the method for metallizing the through hole of the fine ceramic circuit board comprises the steps of firstly plating a thin metal seed layer on the upper surface and the lower surface of the circuit board and the inner wall of the through hole in a vacuum manner, then forming anti-plating films on the upper surface and the lower surface of the circuit board by adopting photoresist, and carrying out exposure development twice in different directions, so that the through hole is filled without thickening the metal layer on the surface, the through hole is exposed, the effect of self-aligning a mask is realized, and the problem of inaccuracy is avoided compared with a dry film mask method. The upper surface and the lower surface cannot be thickened during hole filling in electroplating, so that the use of electroplating liquid with high price is greatly reduced, and the cost is saved; on the other hand, the thinner the surface metal layer is, the narrower the wire width of the lead which can be prepared by adopting the pattern transfer method is, the finer the circuit is, so that the higher the integration level of the circuit board is, the preparation of the fine circuit is facilitated, the subsequent thickening can be carried out according to the requirement, and the application requirement of the more complex circuit design with higher integration level can be met.
The invention is further described with reference to the following figures and examples.
Drawings
FIG. 1 is a schematic diagram of the steps of the present invention.
Detailed Description
Example (b): the through hole metallization method of the fine ceramic circuit board is characterized by comprising the following steps:
(1) taking the ceramic circuit board 1 as a circuit board, and performing laser drilling on the ceramic substrate 1 to form a through hole 2, wherein the aperture of the through hole 2 is between 50 and 200 um;
(2) plating a layer of thin copper as a metal seed layer 3 on the upper surface and the lower surface of the ceramic circuit board 1 and the inner wall of the through hole by using a vacuum sputtering method, wherein the thickness of the metal seed layer 3 is between 0.1 and 2 um;
(3) coating a layer of positive photoresist 4 on the upper surface of the ceramic circuit board 1;
(4) exposing from bottom to top, wherein ultraviolet light can expose the positive photoresist at the through hole position through the through hole 2, the positive photoresist 4 on the upper surface except the through hole position can not be exposed and developed due to the blocking of the metal seed layer 3, and the positive photoresist at the through hole position on the upper surface is washed off;
(5) coating a layer of positive photoresist 5 on the lower surface of the ceramic circuit board 1, exposing from top to bottom, exposing the positive photoresist at the position of the through hole through the through hole 2 by ultraviolet light, and not exposing the positive photoresist on the lower surface except the position of the through hole 2 due to the blocking of the metal seed layer 3; meanwhile, because the positive photoresist on the upper surface of the ceramic circuit board 1 is exposed during the second exposure, a protective film 6 is pasted on the positive photoresist on the upper surface to protect the positive photoresist 4 on the upper surface from being developed;
(6) developing, namely washing off the positive photoresist 5 at the through hole position of the lower surface, wherein the positive photoresist 4 on the upper surface cannot be washed off due to the protection of the protective film 6;
(7) removing the protective film 6 on the upper surface positive photoresist 4;
(8) electroplating and hole filling are carried out on the ceramic substrate 1 until the through hole 2 is filled with copper 7, and the upper surface and the lower surface of the ceramic substrate 1 cannot be plated with copper due to the protection of the positive photoresists 4 and 5;
(9) washing off positive photoresists 4 and 5 on the upper and lower surfaces of the ceramic substrate 1 by using an organic solution or an alkaline solution;
(10) thickening the copper seed layer 3 on the upper and lower surfaces of the ceramic substrate 1 by adopting an electroplating copper plating method to form a surface copper layer 8, wherein the thickness of the surface copper layer 8 is below 50 um; after thickening, the circuit layer is not easy to break due to abrasion, and the thinner the copper layer on the surface is, the higher the possibility of breaking is;
(11) and fine circuits are manufactured on the upper surface and the lower surface of the ceramic substrate 1 by adopting a pattern transfer method, and the minimum width of the copper wire is determined by the thickness of the surface copper layer.
Variations and modifications to the above-described embodiments may occur to those skilled in the art, which fall within the scope and spirit of the above description. Therefore, the present invention is not limited to the specific embodiments disclosed and described above, and some modifications and variations of the present invention should fall within the scope of the claims of the present invention. In addition, although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being defined by the following claims and equivalents thereof.
Claims (8)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111172085.8A CN113811091A (en) | 2021-10-08 | 2021-10-08 | Through-hole metallization method of fine ceramic circuit board |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111172085.8A CN113811091A (en) | 2021-10-08 | 2021-10-08 | Through-hole metallization method of fine ceramic circuit board |
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| Publication Number | Publication Date |
|---|---|
| CN113811091A true CN113811091A (en) | 2021-12-17 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111172085.8A Pending CN113811091A (en) | 2021-10-08 | 2021-10-08 | Through-hole metallization method of fine ceramic circuit board |
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| Country | Link |
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| CN (1) | CN113811091A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070034519A1 (en) * | 2005-08-11 | 2007-02-15 | Hitachi Cable, Ltd. | Method for fabricating a multilayer wiring board, multilayer wiring board, and electronic device using the same |
| JP2009238957A (en) * | 2008-03-26 | 2009-10-15 | Panasonic Electric Works Co Ltd | Via forming method on board |
| CN103345119A (en) * | 2013-07-04 | 2013-10-09 | 苏州华博电子科技有限公司 | Ground hole-containing ceramic thin film circuit photoetching method |
| CN103489789A (en) * | 2012-06-13 | 2014-01-01 | 刘毅楠 | Ceramic substrate dual surface photolithography technique and structure |
| CN106191862A (en) * | 2016-07-25 | 2016-12-07 | 中国电子科技集团公司第四十研究所 | A kind of method making solid metal hole on substrate |
-
2021
- 2021-10-08 CN CN202111172085.8A patent/CN113811091A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070034519A1 (en) * | 2005-08-11 | 2007-02-15 | Hitachi Cable, Ltd. | Method for fabricating a multilayer wiring board, multilayer wiring board, and electronic device using the same |
| JP2009238957A (en) * | 2008-03-26 | 2009-10-15 | Panasonic Electric Works Co Ltd | Via forming method on board |
| CN103489789A (en) * | 2012-06-13 | 2014-01-01 | 刘毅楠 | Ceramic substrate dual surface photolithography technique and structure |
| CN103345119A (en) * | 2013-07-04 | 2013-10-09 | 苏州华博电子科技有限公司 | Ground hole-containing ceramic thin film circuit photoetching method |
| CN106191862A (en) * | 2016-07-25 | 2016-12-07 | 中国电子科技集团公司第四十研究所 | A kind of method making solid metal hole on substrate |
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Inventor after: Wang Xinqiang Inventor after: Wang Houjin Inventor after: Luo Wei Inventor after: Wang Weiyun Inventor after: Li Yongde Inventor after: Yuan Ye Inventor after: Kang Junjie Inventor after: Tang Bo Inventor before: Wang Xinqiang Inventor before: Wang Houjin Inventor before: Luo Wei Inventor before: Wang Weiyun Inventor before: Li Yongde Inventor before: Yuan Ye Inventor before: Kang Junjie Inventor before: Tang Bo Inventor before: Wan Wenting |
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Effective date of registration: 20220421 Address after: Building A1, innovation city, Songshanhu University, Dongguan, Guangdong 523000 Applicant after: Material Laboratory of Songshan Lake Address before: 523000 Room 302, building 12, No. 1, Xuefu Road, Songshanhu Park, Dongguan City, Guangdong Province Applicant before: Zhongzi semiconductor technology (Dongguan) Co.,Ltd. |
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| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20211217 |