CN113709984B - Circuit board manufacturing method for plating hole, bonding pad plating resistance and resist pattern by laser processing - Google Patents
Circuit board manufacturing method for plating hole, bonding pad plating resistance and resist pattern by laser processing Download PDFInfo
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- CN113709984B CN113709984B CN202111001594.4A CN202111001594A CN113709984B CN 113709984 B CN113709984 B CN 113709984B CN 202111001594 A CN202111001594 A CN 202111001594A CN 113709984 B CN113709984 B CN 113709984B
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- 238000007747 plating Methods 0.000 title claims abstract description 91
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 64
- 238000012545 processing Methods 0.000 title claims description 41
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 154
- 238000009713 electroplating Methods 0.000 claims abstract description 144
- 239000010949 copper Substances 0.000 claims abstract description 133
- 229910052802 copper Inorganic materials 0.000 claims abstract description 131
- 230000000873 masking effect Effects 0.000 claims abstract description 110
- 229910000679 solder Inorganic materials 0.000 claims abstract description 68
- 239000000463 material Substances 0.000 claims abstract description 65
- 229910052751 metal Inorganic materials 0.000 claims abstract description 57
- 239000002184 metal Substances 0.000 claims abstract description 57
- 238000000576 coating method Methods 0.000 claims abstract description 49
- 239000011248 coating agent Substances 0.000 claims abstract description 45
- 238000000151 deposition Methods 0.000 claims abstract description 32
- 238000005260 corrosion Methods 0.000 claims abstract description 26
- 230000007797 corrosion Effects 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims abstract description 23
- 238000004140 cleaning Methods 0.000 claims abstract description 8
- 238000005553 drilling Methods 0.000 claims abstract description 7
- 238000011282 treatment Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 126
- 230000008569 process Effects 0.000 claims description 55
- 238000007689 inspection Methods 0.000 claims description 19
- 230000001965 increasing effect Effects 0.000 claims description 16
- 239000007788 liquid Substances 0.000 claims description 15
- 230000003287 optical effect Effects 0.000 claims description 14
- 239000011368 organic material Substances 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 238000001259 photo etching Methods 0.000 claims description 12
- 238000005476 soldering Methods 0.000 claims description 11
- 238000003486 chemical etching Methods 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 6
- 238000013461 design Methods 0.000 claims description 6
- 150000002739 metals Chemical class 0.000 claims description 6
- 238000010420 art technique Methods 0.000 claims description 4
- 238000007639 printing Methods 0.000 claims description 4
- 238000007650 screen-printing Methods 0.000 claims description 4
- 239000007921 spray Substances 0.000 claims description 4
- 230000008719 thickening Effects 0.000 claims description 4
- 230000002411 adverse Effects 0.000 claims description 3
- 238000001962 electrophoresis Methods 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims description 3
- 238000007740 vapor deposition Methods 0.000 claims description 3
- 230000009969 flowable effect Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000000203 mixture Substances 0.000 claims 1
- 238000003466 welding Methods 0.000 abstract description 17
- 239000010410 layer Substances 0.000 description 114
- 239000011889 copper foil Substances 0.000 description 23
- 238000005516 engineering process Methods 0.000 description 19
- 238000001465 metallisation Methods 0.000 description 18
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 229920006254 polymer film Polymers 0.000 description 10
- 239000000853 adhesive Substances 0.000 description 9
- 230000001070 adhesive effect Effects 0.000 description 9
- 230000008021 deposition Effects 0.000 description 9
- 229920000642 polymer Polymers 0.000 description 9
- 230000008901 benefit Effects 0.000 description 8
- 239000002585 base Substances 0.000 description 7
- 239000003814 drug Substances 0.000 description 7
- 238000010030 laminating Methods 0.000 description 7
- 238000007772 electroless plating Methods 0.000 description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 6
- 230000002829 reductive effect Effects 0.000 description 6
- 238000007731 hot pressing Methods 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 230000001680 brushing effect Effects 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 4
- 238000007726 management method Methods 0.000 description 4
- 239000000178 monomer Substances 0.000 description 4
- 229920000052 poly(p-xylylene) Polymers 0.000 description 4
- 239000011148 porous material Substances 0.000 description 4
- 238000001179 sorption measurement Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- 230000002441 reversible effect Effects 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 206010034960 Photophobia Diseases 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 208000013469 light sensitivity Diseases 0.000 description 2
- 230000008520 organization Effects 0.000 description 2
- 238000010422 painting Methods 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229920006267 polyester film Polymers 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000003672 processing method Methods 0.000 description 2
- 229920002379 silicone rubber Polymers 0.000 description 2
- 239000004945 silicone rubber Substances 0.000 description 2
- 210000001519 tissue Anatomy 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 210000000988 bone and bone Anatomy 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 239000013070 direct material Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000007590 electrostatic spraying Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000006479 redox reaction Methods 0.000 description 1
- 238000006722 reduction reaction Methods 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000002893 slag Substances 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229910001174 tin-lead alloy Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/288—Removal of non-metallic coatings, e.g. for repairing
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention relates to a circuit board manufacturing method for plating holes, plating resistance and corrosion resistance patterns by using laser, which comprises the steps of drilling holes, depositing a thin metal layer on the holes and the plate surface, pasting a non-photosensitive masking film, removing the masking layer covering the hole wall by laser to expose the hole wall, only electroplating a conductive layer in the thickened holes, removing the masking layer on the area of the bonding pad by laser, exposing the copper surface of the bonding pad, electroplating a metal corrosion resistance on the hole wall and the bonding pad, manufacturing corrosion resistance patterns by using laser, etching a guidance pattern, coating a non-photosensitive solder resist on the non-circuit area, manufacturing a solder resistance pattern by using laser on an assembly site, and cleaning and weldability treatment on the surface of a welding area; the invention can optimize and shorten the manufacturing flow of the circuit board on the whole, uses the non-photosensitive material as the plating-resistant material, only plates the conductive layer in the thickened hole, only plates the corrosion-resistant and solderable metal on the hole wall and the bonding pad, and uses the laser to manufacture the patterns of the plated hole, the hole and the bonding pad, and resists the pattern. Is suitable for manufacturing various circuit boards in large batch and small batch.
Description
Technical Field
The invention relates to a circuit board manufacturing method for processing plating holes, bonding pads plating resistance and resist patterns by laser, which uses a non-photosensitive material as a masking film to directly and selectively remove, only plates holes and bonding pads, and belongs to the technical field of circuit board manufacturing.
Background
The invention uses the laser direct material removing technology to manufacture the circuit board, can only electroplate holes and bonding pads, and directly manufacture the anti-corrosion pattern without pattern transfer process.
The manufacturing flow is as follows: depositing an initial conductive layer on a manufactured product of a double-sided and multi-layer circuit board with drilling, chemically plating or electroplating thin copper, pasting an electroplating-resistant masking film, manufacturing patterns of electroplating hole walls, removing the electroplating-resistant masking film layer on a hole area by laser, windowing by liquid medicine, electroplating, depositing a copper thickened hole wall on the hole wall, removing the electroplating-resistant masking film layer on a bonding pad area by laser, exposing copper on the surface of the bonding pad, electroplating and depositing a weldable corrosion-resistant metal layer on the hole wall and the bonding pad, removing the electroplating-resistant masking film layer on a non-circuit area by laser, manufacturing a corrosion-resistant pattern, etching, manufacturing a conductive pattern, coating and curing a welding-resistant material on the non-circuit area, adding solder on a connecting disc, performing element mounting, inserting, and performing remelting welding or wave soldering.
The invention can be used for replacing various techniques for manufacturing the hole-making metal printed circuit board by reducing, and the initial raw material is a conductive metal foil material, including various rigid copper-clad plates, flexible copper-clad plates or rigid-flex combined plates. The invention uses the laser processing technology and the same non-photosensitive material mask as the pattern of the electroplated hole wall and the solder mask pattern respectively, can control the copper thickness of the hole wall, can better meet the electrical requirements of electronic products on the circuit board, is suitable for small-batch and multi-variety production of the circuit board, and is also suitable for batch manufacturing of the circuit board.
Electronic products are ubiquitous in the world today. One of the most important components is a circuit board, which is an electrical connection channel among components and determines respective electrical parameters and electrical logic relations; meanwhile, the device is a mounting and fixing carrier of each component and is a framework of a product.
Spatially, the electrical connections on the circuit board can be divided into two groups: a connection in the horizontal direction, i.e. what is commonly referred to as a conductive pattern, is located above the plane of the layers for achieving a connection in the X, Y direction; the connection in the vertical direction is realized by a metallized hole, and the Z direction passes through the insulating layer and the conductive layer for realizing the electrical interconnection between the conductive pattern layers. The conventional circuit board manufacturing technology, which is to manufacture conductive patterns in the horizontal direction, is mainly based on a subtractive method, namely: removing the redundant copper foil on the copper foil-clad plate, and taking the remained copper foil as a conductive pattern to be used as a part with electric connection functions such as a wire, a bonding pad and the like; the electrical interconnection between the layers in the vertical direction is manufactured mainly by an additive method, namely: and adding conductive materials on the hole walls in the holes, and electrically interconnecting the holes by using the conductive hole walls to penetrate through the metal layers in the horizontal direction.
As an important link on the electric connection link, the thicknesses of the conducting pattern in the X, Y direction and the conducting layer on the hole wall in the Z direction can be controlled on the circuit board respectively, so that the whole electric channel can meet the electric requirement of a product, and particularly, the thickness of the conducting layer on the hole wall can be controlled independently and cannot be made into a weak link on the connection link. However, in the general circuit board technology, hole wall copper thickness control and circuit copper thickness control interfere with each other, and a trade-off has to be made between the hole wall copper thickness control and the circuit copper thickness control, which is an important difficulty affecting the electrical performance and the reliability of the circuit board.
Hole metallization is typically performed by depositing a thin layer of conductive material on the walls of the insulating walls of the holes by electroless plating, or by other means, and plating the conductive metal to the desired thickness by electroplating to provide reliable layer-to-layer electrical interconnection index for the holes through the metal layer. Based on different hole metallization techniques, different process routes are derived, including hole masking, pattern plating etching, and the like. The two process routes have advantages and disadvantages, and the technical scheme and key technology are briefly described as follows:
The electroplating etching method, known as reverse plating method, is a classical process method for manufacturing printed boards. After the process of cutting material, starting from drilling and hole metallization, forming initial conductive layer on the hole wall by using chemical plating or direct electroplating method, continuously depositing metal copper on the hole wall and plate surface by using electroplating method to a certain thickness, then making pattern transfer, using a layer of organic material thin layer called plating-resisting agent to mask the copper foil of non-circuit portion, and exposing the surface of circuit portion including wire, pad and hole wall, etc. Thus, the surface of the metal copper to be removed is masked, and the metal copper is not contacted with the liquid medicine in the electroplating process, so that the metal deposition is not continued; the parts to be preserved, including the wire, the bonding pad and the surface of the hole wall are exposed, and are contacted with the liquid medicine during electroplating, or copper is electroplated continuously, or the anti-etching metal such as tin, tin-lead alloy, nickel, gold and the like is electroplated directly. And then removing the masking layer of the organic material to expose the copper foil of the non-circuit part, enabling the copper foil to react with the etchant in the etching process, dissolving the copper foil into the liquid medicine after oxidation to disappear from the board surface, and masking the surfaces of the circuit parts such as the wire, the bonding pad, the hole wall and the like by the metal resist without contacting the etchant, and keeping the copper foil on the board to form the required conductive pattern. Finally, a solder resist pattern is fabricated on the non-solder area of the circuit board, and a solderable material is applied to the solder area.
The reverse plating process is a classical method for manufacturing a circuit board, is mature and stable, has multiple working procedure steps and complex operation, and has the advantage of being capable of carrying out electroplating treatment on a circuit part and a non-circuit part in a distinguishing way. After the holes are metallized to form an initial conductive layer, copper is deposited on the hole wall at one time by an electroplating method until the required final thickness is reached, and meanwhile, the method of increasing the thickness of the copper conductive layer on the rest part of the plate surface is called a full-plate electroplating etching method; after hole metallization, a thin layer of copper is firstly electroplated on the hole wall and the plate surface, the copper thickness is controlled to be just tolerant to the subsequent process, after pattern transfer, the electroplating copper is carried out to the required final thickness, namely, only the conductive pattern part is plated with thicker copper, and the non-conductive pattern part is plated with thinner copper, which is called a pattern electroplating etching method.
The hole masking method is another common circuit board manufacturing process route. The process after cutting starts from drilling and hole metallization, an initial conductive layer is formed on the hole wall by using an electroless plating or direct plating method, and metallic copper is continuously deposited on the hole wall and the plate surface to the final required thickness by using an electroplating method. Then, pattern transfer is performed, and a thin layer of organic material, called resist, is used to mask the circuit portion, including the wire, pad, and hole, and the copper foil of the non-circuit portion is exposed by pasting a photosensitive film, exposing, and developing. In the subsequent etching process, the exposed non-circuit part of the copper foil surface is contacted with the etchant to generate oxidation reaction, the dissolved liquid medicine disappears from the plate surface, and the surfaces of the circuit parts such as wires, bonding pads, hole walls and the like are shielded by the resist and are not contacted with the etchant, so that the exposed non-circuit part is reserved on the plate to form a required conductive pattern. As with the reverse plating method, a solder resist pattern is finally also fabricated on the non-soldered area of the circuit board, and a solderable material is applied to the soldered area. The hole masking process is characterized in that the whole plate is plated with thickened copper, which is relatively simple, but is more unfavorable for the production of fine circuit structures because thicker copper foil needs to be etched when manufacturing the conductive pattern.
In the above process route, the process of fabricating the Z-connection by hole metallization can be divided into two stages: and manufacturing an initial conductive layer on the insulated hole wall and electroplating and thickening the conductive layer on the hole wall.
The technique of fabricating the initial conductive layer can be classified into electroless copper plating and direct electroplating. Electroless copper plating utilizes an autocatalytic redox reaction to reduce copper (Cu ++) ions in the electroless copper plating solution to Cu on the pore walls, which in turn act as catalysts for other copper ions in the solution, allowing the copper reduction reaction to continue on the new copper nucleation surfaces, ultimately forming a thin metallic copper layer on the insulated pore walls. The direct electroplating technology is to coat conductive carbon, palladium or polymer directly on the hole wall to form continuous thin layer.
The initial conductive layer is very thin in technical realization and electrical performance, which is insufficient to meet the requirements of electronic products on the conductive performance and mechanical performance of the Z-direction link section, and metal copper with better performance is further required to be continuously added on the hole wall through electroplating.
Comparing X, Y plane with Z-direction conductive layer, it can be seen that neither full board electroplating nor pattern electroplating really solves the problem that the thickness of Z-direction conductive layer of circuit board connecting link is consistent with that of X, Y conductive layer, and in the process of electroplating thickening initial conductive layer, the thickness difference between the hole wall conductive layer forming Z-direction link and the board conductive layer forming X, Y link can be enlarged. Because, on X, Y plane, the conductive layer is based on the inherent conductive copper foil on the substrate, the above-mentioned electroplating copper thickening hole wall conductive layer technology, on the inherent copper foil of the board surface, increases the thickness of the conductive layer synchronously with the hole wall, and, due to the factor of the step by step of the power line, the thickness of the board surface deposition layer will be greater than the hole wall deposition layer due to the depth capability and the limitation of the uniform plating capability of the electroplating process. However, current and future electronic products are increasingly requiring electrical connection performance of circuit boards, and in particular, improving the performance of Z-links, and thus, there is a need to develop a technique capable of selectively electroplating thickened holes.
The inventor with the application number of CN201410190917.2 discloses a method for selectively electroplating conductive holes on a circuit board, which is suitable for a metallization process of directly electroplating holes by a high-polymer conductive film method. The technical scheme is that the material which is resistant to electroplating and polymer conductive film deposition and can be peeled off, namely the polyester film coated with the silicone rubber adhesive is used for masking all areas of the board surface, and the surface of the hole wall is exposed after drilling. Because the materials have the properties of resisting the pretreatment required by depositing the polymer conductive film and resisting the deposition of the polymer conductive film, in the subsequent direct electroplating process of the polymer conductive film, the polymer conductive film is only added on the hole wall, and when in electroplating, an electroplating power supply supplies current to the hole wall by taking the copper foil on the plate surface as a conductive link channel, so that the electroplating processing of depositing copper on the hole wall is realized. The problem is that the hole metallization process of direct electroplating by a high polymer conductive film method needs to use a solution with the concentration of permanganate of 100g/L or more to treat for 70 seconds at the temperature of 90 ℃, and destructive oxidization is generated on the strippable glue or the adhesive for bonding the polyester film, so that the bonding force between a masking material with originally small adhesive force with a base material and a copper-clad foil is reduced, and the phenomena of bone separation, layering, seam formation and opening appear, which can cause poor effect of the masking plate surface, and the problem that the thickness of the copper foil of the copper-clad plate surface is different due to the effects of infiltration, overflow, soaking and the like of the solution after the hole wall is thickened by electroplating. In addition, the polymer conductive film method direct plating hole metallization process has limited application range, is not suitable for a multilayer circuit board, comprehensively considers factors such as quality, cost and the like, and further needs to solve the problems of metallization and hole wall electroplating only faced by the traditional electroless copper plating hole metallization technology, the black hole direct plating hole metallization technology and the palladium film method direct plating hole metallization technology. Because these techniques require acid, alkali or organic solvent treatments prior to pore metallization, it is apparent that the above-described solutions using peelable gel materials are not sufficiently strong to be applied to mainstream pore metallization techniques and that more suitable materials and methods must be found.
Disclosure of Invention
Aiming at the defect that the prior art cannot only electroplate thickened holes and circuits, the invention develops a novel manufacturing method; the technical scheme of the invention is as follows:
A method for manufacturing circuit board with plated hole, anti-plating of bonding pad and resist pattern by laser processing includes drilling holes and depositing thin metal layer on hole and plate surface, sticking non-photosensitive masking film, removing masking layer covering hole wall by laser to expose hole wall, electroplating to thicken conductive layer in hole, removing masking layer on bonding pad region by laser to expose copper surface of bonding pad, electroplating metal resist on hole wall and bonding pad, etching guide pattern by laser to coat non-photosensitive solder resist on non-circuit region, manufacturing solder resist pattern by laser on assembly site, and cleaning and solderability treatment on surface of bonding area; the method comprises the following steps:
(1) Depositing an initial conductive layer on a manufactured product of the double-sided and multi-layer circuit board with the drilled holes, and electroplating copper to a thickness which can withstand subsequent procedures;
(2) Attaching a non-photosensitive organic film to the plate surface to serve as an electroplating-resistant masking film;
(3) Removing masking materials covering the hole wall area by using laser to manufacture an electroplating resisting pattern, and removing an electroplating resisting masking film layer on the surface of a clamping point of an electroplating clamp by using laser to expose the copper surface of the contact area of the electroplating clamp;
(4) Electroplating, namely depositing a copper thickened conductive layer on the hole wall to a thickness required by final inspection;
(5) Removing the masking material covered on the bonding pad area by laser to expose the copper surface of the bonding pad area;
(6) Electroplating, namely depositing corrosion-resistant and solderable metals on the hole wall and the bonding pad;
(7) Removing the organic film material on the non-circuit area by using laser to expose the non-circuit copper, so as to obtain an etching-resistant masking pattern;
(8) Removing copper on the non-circuit area by chemical etching to obtain a conductive pattern;
(9) Coating and curing the non-photosensitive solder resist on the non-circuit area at one time;
(10) And adding solder to the connecting disc, carrying out element mounting and inserting, and carrying out reflow soldering and or wave soldering.
The non-photosensitive organic film in the step (2) consists of a plurality of layers with different forms and components, wherein the layers contacted with the circuit board have viscosity and fluidity.
The non-photosensitive organic film in the step (2) has plating resistance, etching resistance and welding resistance, and the plating-resistant masking film covered on the circuit area does not need to be removed to be used as the welding-resistant film of the circuit area.
The step (2) comprises the steps of depositing a non-photosensitive organic film forming substance on the surface and the hole wall of the plate by using electrophoresis, vacuum coating and vapor deposition technologies; including the application of liquid photosensitive materials and dry photosensitive films using prior art techniques.
The coating method in the step (9) comprises spray printing and screen printing; the coating thickness reaches the level of the masking film on the circuit after the coating is solidified or meets the design requirement.
And (8) removing all the electroplating-resistant masking films remained on the plate surface by using laser after the conductive patterns are prepared.
Step (9) also includes the step of applying prior art and material full-plate coating and curing the photosensitive and non-photosensitive solder resist once after removing all of the plating resist masking film remaining on the plate surface with a laser.
The step (8) also comprises the step of continuing the circuit board manufacturing process by applying the prior art and materials after removing all the electroplating-resistant masking film remained on the board surface by using laser.
And (9) coating the whole surface of the solder mask and curing the photosensitive and non-photosensitive solder resist once, and removing the organic material on the conductor of the welding area by using laser to manufacture a solder resist pattern.
The concrete explanation is as follows:
the invention relates to a circuit board manufacturing method for processing plating holes, plating resistance and corrosion resistance patterns by laser, wherein a non-photosensitive material is used as a masking film, the exposed holes of the masking film are removed by laser photoetching, and only the thickened holes are plated; removing the material of the shielding bonding pad by laser photoetching to leak out the copper surface of the bonding pad, and electroplating corrosion-resistant metal on the hole wall and the bonding pad; includes forming a resist pattern with a laser; includes applying a non-photosensitive solder resist only to the non-circuit area; the method can achieve the aims of shortening the manufacturing flow, improving the quality and efficiency, reducing the cost and being environment-friendly.
Step (1), depositing an initial conductive layer on a manufactured product of a double-sided and multi-layer circuit board with drilled holes, and electroplating copper to a thickness which can withstand subsequent procedures;
The purpose of the thin copper on the initial conductive layer is to increase the reliability of the process, and the thickness of the thin copper can reach the lower limit of ensuring the reliability of the process, for example, after the conventional electroless copper deposition or after the blackening by a carbon film method, the thin copper with the thickness of 1-5 μm is electroplated.
Step (2) attaching a non-photosensitive organic film to the plate surface to serve as an electroplating-resistant masking film;
In the prior art, a photo-induced dry film is generally adopted as an electroplating-resistant mask, the photo-induced dry film is of a three-layer structure, a photosensitive adhesive coating is arranged between a carrier film and a protective film and is composed of an adhesive, a photopolymerization monomer and the like, the pattern forming process is complex, and the photo-induced dry film is subjected to photo-painting plate making, film pasting, exposure and development procedures; in addition, the price is high, the strength is low, the thickness is large, the resolution is limited and the masking effect is poor, wherein the thickness is generally more than 20 mu m. The masking film of the invention does not need to have light sensitivity, and the general precoating pressure-sensitive coating film and heat-sensitive coating film can meet the requirements, and the hot-press coating and the laser direct removal form patterns, so the flow is simple; and the resolution is high, the price is low, the strength is high, the masking capability is good, the mask can be removed step by step, and the mask is subjected to multiple electroplating processes. For example, a thermosensitive PI, PVC, PC, PET, PP film with a thickness of 20 μm can be thermally pressed as an anti-plating mask, and parylene can be used as an anti-plating mask.
The non-photosensitive organic film in the step (2) consists of a plurality of layers with different forms and components, wherein the layers contacted with the circuit board have viscosity and fluidity. The non-photosensitive organic film has plating resistance, etching resistance and welding resistance, and the electroplating-resistant masking film covered on the circuit area does not need to be removed to be used as the welding-resistant film of the circuit area.
Step (2) comprises the steps of depositing a non-photosensitive organic film forming substance on the surface and the hole wall of the board by using electrophoresis, vacuum coating and vapor deposition technologies; including the application of liquid photosensitive materials and dry photosensitive films using prior art techniques.
Removing masking materials covering the hole wall area by using laser to manufacture an electroplating resisting pattern, removing an electroplating resisting masking film layer on the surface of a clamping point of an electroplating clamp by using the laser, and exposing the copper surface of the contact area of the electroplating clamp;
And removing the electroplating-resistant masking film layer on the hole area by laser, and windowing the liquid medicine inlet hole. For example, a pulsed IR laser with a wavelength of 1064nm is used to remove masking films covered on the hole walls by circular cutting, dicing or photo etching point by point, with the hole inner diameter as the outer contour, and the hole walls are exposed. In order to solve the problems of too small total area, uneven power line steps, difficult control of current density and the like when the hole wall is electroplated, the dead copper area without electric functions of a non-circuit part or the area with the conductive layer needing to be removed and not negatively affecting the subsequent removing process or the area with the copper thickness not affecting the functions of the non-circuit part or the electroplating-resistant hole masking film on the area with the copper thickness positively affecting the functions is increased, the area of the conductive area is increased, the power lines are dispersed, and the pattern which is favorable for the balanced electroplating process of the hole wall is formed.
The patterning of the plated hole walls with laser also includes removing dead copper areas of no electrical function that are not routed and spaced more than 30 μm from the routing, preferably more than 50 μm from the routing, or areas where the conductive layer needs to be removed and does not adversely affect the subsequent removal process, or areas where the copper thickness does not affect its function, or plating resist masking films on areas where increasing the copper thickness positively affects the function, to form a balanced plating pattern that is advantageous for plating the hole walls.
Electroplating, namely depositing a copper thickened conductive layer on the hole wall to a thickness required by final inspection;
The control point for this step is the plating time. At this time, all areas except the hole wall and the electroplating balance weight are covered by a mask which is an insulating material and is contacted with electroplating liquid, but copper is not deposited on the surface, so that copper can be deposited on the hole wall and the balance weight in the electroplating process, the electroplating time is enough, a copper deposition layer with enough thickness can be obtained on the hole wall, and the purpose of selectively controlling the copper thickness of the hole wall is achieved.
And (5) removing the masking material covered on the pad area by using laser to expose the copper surface of the pad area.
Electroplating, wherein corrosion-resistant and solderable metals are deposited on the hole wall and the bonding pad;
the plated metal needs to have the corrosion resistance required in the step (8), and also has a function of protecting the corresponding area during transportation and storage of the circuit board and increasing the solderability of the land during assembly of the circuit board.
The invention uses non-photosensitive plating-resistant material, has good masking capability, can withstand longer electroplating time, and can withstand more severe plating solution and operation conditions. In addition, the technology of the invention can deposit metal only on the hole wall and the surface of the electroplating balance block because the other areas of the plate surface are masked by the high polymer film, the plating area is relatively small, and the materials are saved. Therefore, the variety of metals which are selectively both corrosion resistant and protective and are solderable is greater, such as nickel and gold.
Removing the organic film material on the non-circuit area by using laser to expose the non-circuit copper, so as to obtain an etching-resistant masking pattern;
When the plating-resistant masking film on the non-line area is removed by laser, when the ratio of the perimeter of the area to be removed to the diameter of the focused laser beam is smaller, preferably smaller than 10, removing the masking film on the surface of the substrate and the conductive metal copper below the masking film by using a point-by-point and line-by-line photoetching method by using the focused laser beam; when the ratio of the perimeter of the area to be removed to the diameter of the focused laser beam is larger, preferably larger than 15, firstly, using the focused laser beam to remove the masking film on the surface of the substrate along the inner side of the envelope of the area to be removed and taking the envelope as a boundary by point-to-point photoetching, until a closed heat insulation channel is formed around the part which is not removed on the area, and then using the laser beam with the minimum optical power density required for removing the metal copper but the larger diameter to heat the area which is not removed, so that the electroplating-resistant masking film on the area and the conductive metal copper below the area are simultaneously separated from the surface of the substrate to be removed.
When the plating resist masking film on the non-line area is removed by laser, the optical power density of the focused laser is kept to be larger than the minimum power density required for removing the organic material, preferably larger than 1.2 times of the minimum optical power density required for removing the organic material and lower than or close to the minimum optical power density required for removing the metal layer covered under the laser, and the diameter of the focused laser beam is changed according to the shape and the size of the removed area so as to reduce or remove the lap joint of the laser processing area and improve the processing efficiency. The laser can be used for removing the electroplating-resistant masking film on the non-circuit area by using lasers with the same wavelength and pulse width and lasers with different wavelengths and pulse widths, and the laser can be completed under the parameters of different spot diameters, different focal depths, different optical power densities and the like.
Step (8) chemical etching to remove copper on the non-circuit area to obtain a conductive pattern;
Step (8) includes removing all of the plating resist masking film remaining on the board surface with a laser after the conductive pattern is formed.
In the invention, the copper foil layer to be removed is masked by the polymer film in the processes of electroless plating and electroplating of the hole wall, copper metal deposition is avoided, and the copper foil is still coated as a raw material, and compared with the prior art, the copper foil layer is not increased in thickness and is easier to etch and remove. In this step, although the conventional chemical etching technique is adopted, the copper foil layer to be removed is thinner than that of the conventional technique, so that the time is shorter, the side corrosion phenomenon is reduced, and the quality of the side wall of the manufactured conductive pattern is better.
After the conductive pattern is manufactured, the manufactured circuit board can be subjected to electric on-off inspection. The most important function of the circuit board is to provide electrical connection. Whether each network meets the design requirement or not is judged through electric on-off inspection, and the method is one of important links in the production of modern circuit boards. Conventional circuit board technology, on-off inspection is typically performed after the formation of the solder resist pattern and the solderability coating of the lands and vias is completed, for example, after electroless plating of nickel, gold, hot air leveling, or immersion of tin. The on-off inspection is carried out after the solder resist pattern and the weldability are coated, and the method has the advantages that the surface of the bonding pad of the test point is protected by the weldability metal, the inspection is suitable for long time period, and the organization management is convenient; the disadvantage is that if the circuit board has on-off problems, the problems mostly occur in the middle of the manufacturing process, because the problems are found late, the problem is repaired or the cost for the circuit board to be wasted is high. In the present invention, the electrical on-off check is arranged after step (8) and before step (9). The electrical on-off inspection is performed before the manufacture of the solder resist, and the defects are that the time period suitable for inspection is short and the window for tissue management is small; the method has the advantages that the manufacturing process problem can be timely found, and the cost of the repairing or waste problem board is low.
The step (8) also comprises the step of continuing the circuit board manufacturing process by applying the prior art and materials after removing all the electroplating-resistant masking film remained on the board surface by using laser.
Step (9) coating and curing the non-photosensitive solder resist on the non-circuit area once;
In the prior art, liquid photosensitive ink is generally adopted as a solder resist, the solder resist contains an adhesive and a photopolymerization monomer, the process of forming patterns is very complex, and the processes of coating, prebaking, exposing, developing, solidifying and the like are required; moreover, the cost is high, the resolution is not high, and the coating quality between the fine pitch connection pads is difficult to ensure. The solder resist of the invention does not need to have photosensitive performance, can meet the requirements of common precoating pressure-sensitive coating films and heat-sensitive coating films, has low price and high resolution, and can be used for manufacturing fine pattern structures. In addition, the invention adopts hot-pressing coating, does not need additional curing process, and has simple flow when the solder resist pattern is prepared by laser on site before the element is assembled. For example, a thermosensitive PI, PVC, PC, PET, PP film having a thickness of 20 μm to 200 μm is thermally pressed as a solder resist, and parylene may be used as a solder resist.
The coating method in the step (9) comprises spray printing and screen printing; the coating thickness reaches the level of the masking film on the circuit after the coating is solidified or meets the design requirement.
Step (9) also includes applying prior art and material full-panel coatings and curing both photosensitive and non-photosensitive soldermasks once after removing all of the plating resist masking film remaining on the panel surface with the laser.
Step (9) also includes removing the organic material on the bond pad conductors with a laser after full-face coating and one-time curing of the photosensitive and non-photosensitive soldermask to produce a solder mask pattern.
And (10) adding solder to the connecting disc, carrying out element mounting and inserting, and carrying out reflow soldering and or wave soldering.
By implementing the invention, the manufacturing flow of the circuit board can be optimized and shortened as a whole, the quality and efficiency are improved, the cost is reduced, and the environment is friendly. The non-photosensitive material is used as electroplating resisting material, only the conductive layer in the thickened hole is electroplated, only the hole wall and the bonding pad are electroplated with corrosion resisting and weldable metal, and the laser is used for manufacturing electroplating holes, holes and bonding pad patterns, and the corrosion resisting pattern has the advantages of less steps and low cost, and can manufacture finer circuit boards. The invention is suitable for mass production of various circuit boards, and is also suitable for manufacturing circuit board samples and small batches and multiple varieties.
The invention has the advantages and effects that:
1. The invention can selectively plate holes, has easy control of plating thickness, can plate thickened holes, can solve the problem of thinner plating thickness of the hole wall, and can solve the problem of inconsistent plating thickness of the hole wall and copper plating thickness of a circuit.
2. The invention uses the laser direct removing method to manufacture the electroplated hole wall pattern, can use the non-photosensitive material as the electroplating-resistant material, reduces the cost, has good electroplating-resistant performance, and can manufacture thicker hole wall conductive layers.
3. The invention realizes that only holes are electroplated, the thickness of the conductive layer of the non-circuit part is not increased, the invention is suitable for manufacturing the conductive pattern by directly removing the copper foil of the non-circuit part by using laser, the electroplating-resistant material is not required to be removed, the steps are fewer, and the finer conductive pattern can be manufactured.
4. Only the non-photosensitive solder resist is coated on the non-circuit area, the masking film on the circuit is not required to be removed, and the material is dual-purpose, so that the material is saved.
5. The non-photosensitive solder resist can be coated on the non-circuit area by using a spray printing and screen printing method, the space of the circuit testing surface is filled, an air gap is not reserved, and the space is flush with the circuit part, so that the planning and design of the electrical performance of the circuit board are facilitated.
6. This method is particularly suitable for removing solder resist in the assembly site because the hole walls and pads have been coated with a resist and solderable metal.
Drawings
Fig. 1: example 1 process flow diagram;
fig. 2: example 2 process flow diagram;
wherein: 1. insulating substrate 2, copper-clad plate copper layer 3, initial conductive layer 4, electroplating thin copper 5, electroplating-resistant masking film 6, hole electroplated layer 7, corrosion-resistant and solderable metal 8, solder resist material layer 9, solder 10, element
In the attached drawings, each letter A\B\C\D\E\F\G\H is a corresponding partial enlarged schematic diagram of each step.
Detailed Description
The invention will be further described with reference to examples. The following examples are illustrative, not limiting, and are not intended to limit the scope of the invention.
Example 1
A copper-clad plate is commonly used in the electronic industry as a base material for manufacturing a circuit board, and comprises an insulating substrate 1 and a copper layer 2 of the copper-clad plate.
In this embodiment, a double-sided printed circuit board is taken as an example, and the specific processing steps are as follows:
(1) The circuit board base material copper-clad plate comprises an insulating base plate 1 and a copper-clad plate copper layer 2, the copper-clad plate is drilled, an initial conductive layer 3 is deposited on a manufactured product of the double-sided circuit board with the drilled holes, copper is electroplated until the thickness can withstand subsequent processes, and an electroplated thin copper 4 is formed;
The purpose of forming thin copper on the initial conductive layer is to increase the reliability of the process, and the thickness of the thin copper reaches the lower limit of ensuring the reliability of the process.
Specifically, brushing the double-sided board with the drilled holes, removing burrs of the holes, and cleaning the board. Then normal black hole, electroplated copper, electroplating parameters: 10ASF for 30min, the thickness of the coating was about 5um.
(2) A non-photosensitive polymer film was attached to the plate surface as an anti-plating masking film 5.
In the prior art, a photo-induced dry film is generally adopted as an electroplating-resistant mask, the photo-induced dry film is of a three-layer structure, a photosensitive adhesive coating is arranged between a carrier film and a protective film and is composed of an adhesive, a photopolymerization monomer and the like, the pattern forming process is complex, and the photo-induced dry film is subjected to photo-painting plate making, film pasting, exposure and development procedures; in addition, the price is high, the strength is low, the thickness is large, the resolution is limited and the masking effect is poor, wherein the thickness is generally more than 20 mu m. The masking film of the invention does not need to have light sensitivity, and the general precoating pressure-sensitive coating film and heat-sensitive coating film can meet the requirements, and the hot-press coating and the laser direct removal form patterns, so the flow is simple; and the resolution is high, the price is low, the strength is high, the masking capability is good, the mask can be removed step by step, and the mask is subjected to multiple electroplating processes. For example, a thermosensitive PI, PVC, PC, PET, PP film with a thickness of 20 μm can be thermally pressed as an anti-plating mask, and parylene can be used as an anti-plating mask.
Specifically, brushing the two sides plated with the thin copper, roughening and cleaning the surfaces of the two sides, and enhancing the binding force of the copper surface and the polymer film to be bonded. And then laminating a high polymer film RPET with electroplating resistance on the double-sided copper-clad plate by a laminator in a hot pressing way, wherein the thickness of the film is about 10um, and the laminating parameters are as follows: the pressure is 15kg/cm 2, the temperature is 95 ℃ and the speed is 100mm/min.
(3) Removing masking materials covering the hole wall area by using laser, preparing an electroplating resisting pattern, removing an electroplating resisting masking film layer on the surface of a clamping point of an electroplating clamp by using laser, and exposing the copper surface of the contact area of the electroplating clamp.
And removing the electroplating-resistant masking film layer on the hole area by laser, and windowing the liquid medicine inlet hole. For example, a pulsed IR laser with a wavelength of 1064nm is used to remove masking films covered on the hole walls by circular cutting, dicing or photo etching point by point, with the hole inner diameter as the outer contour, and the hole walls are exposed. In order to solve the problems of too small total area, uneven power line steps, difficult control of current density and the like when the hole wall is electroplated, the dead copper area without electric functions of a non-circuit part or the area with the conductive layer needing to be removed and not negatively affecting the subsequent removing process or the area with the copper thickness not affecting the functions of the non-circuit part or the electroplating-resistant hole masking film on the area with the copper thickness positively affecting the functions is increased, the area of the conductive area is increased, the power lines are dispersed, and the pattern which is favorable for the balanced electroplating process of the hole wall is formed.
The patterning of the plated hole walls with laser also includes removing dead copper areas of no electrical function that are not routed and spaced more than 30 μm from the routing, preferably more than 50 μm from the routing, or areas where the conductive layer needs to be removed and does not adversely affect the subsequent removal process, or areas where the copper thickness does not affect its function, or plating resist masking films on areas where increasing the copper thickness positively affects the function, to form a balanced plating pattern that is advantageous for plating the hole walls.
Specifically, in the embodiment, a 20W ultraviolet nanosecond laser machine is adopted to remove the RPET film on the hole wall area, the clamping point of the electroplating clamp and the electroplating balance weight, a circuit board is placed on a laser equipment adsorption table, engineering data of laser processing is imported, the circuit board is accurately aligned with the processing data, and laser photoetching is carried out to remove the RPET film. After the top surface is processed, the circuit board is turned over, and the bottom surface film of the copper-clad plate is removed by the same method. The processing parameters are as follows:
power/W | Frequency/kHz | Pulse width/ns | Processing speed/mm/s | Number of processing times |
5.5 | 150 | 20 | 800 | 1 |
(4) Electroplating, namely depositing a copper thickened conductive layer on the hole wall to a thickness required by final inspection to form a hole electroplated layer 6;
The control point for this step is the plating time. At this time, all areas except the hole wall and the electroplating balance weight are covered by a mask which is an insulating material and is contacted with electroplating liquid, but copper is not deposited on the surface, so that copper can be deposited on the hole wall and the balance weight in the electroplating process, the electroplating time is enough, a copper deposition layer with enough thickness can be obtained on the hole wall, and the purpose of selectively controlling the copper thickness of the hole wall is achieved.
Specifically, because the plating area is smaller, the step adopts a small current density for plating, and the plating parameters are as follows: 10asf for 120min, the thickness of the coating was about 25um.
(5) The laser removes masking material overlying the pad region exposing the copper surface of the pad region.
The processing method and the processing parameters are the same as those in the step (3).
(6) A metal having corrosion resistance and solderability is electroplated on the hole wall and the bonding pad to form a metal 7 having corrosion resistance and solderability.
The plated metal needs to have the corrosion resistance required in the step (8), and also has a function of protecting the corresponding area during transportation and storage of the circuit board and increasing the solderability of the land during assembly of the circuit board.
The invention uses non-photosensitive plating-resistant material, has good masking capability, can withstand longer electroplating time, and can withstand more severe plating solution and operation conditions. In addition, the technology of the invention can deposit metal only on the hole wall and the surface of the electroplating balance block because the other areas of the plate surface are masked by the high polymer film, the plating area is relatively small, and the materials are saved. Therefore, the variety of metals which are selectively both corrosion resistant and protective and are solderable is greater, such as nickel and gold.
Specifically, tin-lead is electroplated on the hole wall and the bonding pad according to the electroplating area and the plating thickness requirement to serve as a solderability metal protection layer. Parameters of electroplated tin-lead: 1.2ASD 30min, coating thickness about 10um.
(7) Removing the organic film material on the non-circuit area by using laser to expose the non-circuit copper, so as to obtain an etching-resistant masking pattern;
When the plating-resistant masking film on the non-line area is removed by laser, when the ratio of the perimeter of the area to be removed to the diameter of the focused laser beam is smaller, preferably smaller than 10, removing the masking film on the surface of the substrate and the conductive metal copper below the masking film by using a point-by-point and line-by-line photoetching method by using the focused laser beam; when the ratio of the perimeter of the area to be removed to the diameter of the focused laser beam is larger, preferably larger than 15, firstly, using the focused laser beam to remove the masking film on the surface of the substrate along the inner side of the envelope of the area to be removed and taking the envelope as a boundary by point-to-point photoetching, until a closed heat insulation channel is formed around the part which is not removed on the area, and then using the laser beam with the minimum optical power density required for removing the metal copper but the larger diameter to heat the area which is not removed, so that the electroplating-resistant masking film on the area and the conductive metal copper below the area are simultaneously separated from the surface of the substrate to be removed.
When the plating resist masking film on the non-line area is removed by laser, the optical power density of the focused laser is kept to be larger than the minimum power density required for removing the organic material, preferably larger than 1.2 times of the minimum optical power density required for removing the organic material and lower than or close to the minimum optical power density required for removing the metal layer covered under the laser, and the diameter of the focused laser beam is changed according to the shape and the size of the removed area so as to reduce or remove the lap joint of the laser processing area and improve the processing efficiency. The laser can be used for removing the electroplating-resistant masking film on the non-circuit area by using lasers with the same wavelength and pulse width and lasers with different wavelengths and pulse widths, and the laser can be completed under the parameters of different spot diameters, different focal depths, different optical power densities and the like.
Specifically, in the embodiment, a 20W ultraviolet nanosecond laser is adopted to remove the RPET film on the non-circuit area, a circuit board is placed on a laser equipment adsorption table, engineering data of laser processing is imported, the circuit board and the processing data are accurately aligned, and laser light etching is carried out to remove the RPET film. After the top surface is processed, the circuit board is turned over, and the bottom surface film of the copper-clad plate is removed by the same method. The processing parameters are as follows:
power/W | Frequency/kHz | Pulse width/ns | Processing speed/mm/s | Number of processing times |
5.5 | 150 | 20 | 800 | 1 |
(8) And chemically etching to remove copper on the non-circuit area to obtain the conductive pattern.
In the invention, the copper foil layer to be removed is masked by the polymer film in the processes of electroless plating and electroplating of the hole wall, copper metal deposition is avoided, and the copper foil is still coated as a raw material, and compared with the prior art, the copper foil layer is not increased in thickness and is easier to etch and remove. In this step, although the conventional chemical etching technique is adopted, the copper foil layer to be removed is thinner than that of the conventional technique, so that the time is shorter, the side corrosion phenomenon is reduced, and the quality of the side wall of the manufactured conductive pattern is better.
After the conductive pattern is manufactured, the manufactured circuit board can be subjected to electric on-off inspection. The most important function of the circuit board is to provide electrical connection. Whether each network meets the design requirement or not is judged through electric on-off inspection, and the method is one of important links in the production of modern circuit boards. Conventional circuit board technology, on-off inspection is typically performed after the formation of the solder resist pattern and the solderability coating of the lands and vias is completed, for example, after electroless plating of nickel, gold, hot air leveling, or immersion of tin. The on-off inspection is carried out after the solder resist pattern and the weldability are coated, and the method has the advantages that the surface of the bonding pad of the test point is protected by the weldability metal, the inspection is suitable for long time period, and the organization management is convenient; the disadvantage is that if the circuit board has on-off problems, the problems mostly occur in the middle of the manufacturing process, because the problems are found late, the problem is repaired or the cost for the circuit board to be wasted is high. In the present invention, the electrical on-off check is arranged after step (8) and before step (9). The electrical on-off inspection is performed before the manufacture of the solder resist, and the defects are that the time period suitable for inspection is short and the window for tissue management is small; the method has the advantages that the manufacturing process problem can be timely found, and the cost of the repairing or waste problem board is low.
Specifically, the copper layer in the non-circuit area is etched by using the traditional chemical etching process, and the conductive layer in the non-circuit area is covered by the electroplating-resistant masking film, so that the copper thickness in the area is not increased during electroplating, the etching difficulty is greatly reduced, and finer circuits can be obtained.
(9) Coating and curing the non-photosensitive solder resist on the non-circuit area at one time to form a solder resist material layer 8;
In the prior art, liquid photosensitive ink is generally adopted as a solder resist, the solder resist contains an adhesive and a photopolymerization monomer, the process of forming patterns is very complex, and the processes of coating, prebaking, exposing, developing, solidifying and the like are required; moreover, the cost is high, the resolution is not high, and the coating quality between the fine pitch connection pads is difficult to ensure. The solder resist of the invention does not need to have photosensitive performance, can meet the requirements of common precoating pressure-sensitive coating films and heat-sensitive coating films, has low price and high resolution, and can be used for manufacturing fine pattern structures. In addition, the invention adopts hot-pressing coating, does not need additional curing process, and has simple flow when the solder resist pattern is prepared by laser on site before the element is assembled. For example, a thermosensitive PI, PVC, PC, PET, PP film having a thickness of 20 μm to 200 μm is thermally pressed as a solder resist, and parylene may be used as a solder resist.
Specifically, the model KSM-386 thermosetting ink of the company of the new photosensitive material of Guangxi, suzhou is sprayed on the non-circuit area of the double-sided board by using an electrostatic spraying process, and the curing conditions are that: and the thickness of the solder resist film is about 20um at 150 ℃ for 30 min.
(10) Solder 10 is added to the lands, and component 11 mounting and mounting are performed, followed by reflow soldering and selective wave soldering.
Example 2
A copper-clad plate is commonly used in the electronic industry as a base material for manufacturing a circuit board, and comprises an insulating substrate 1 and a copper layer 2 of the copper-clad plate.
In this embodiment, taking a four-layer circuit board with an inner layer circuit manufactured as an example, the specific processing steps are as follows:
(1) The circuit board base material copper-clad plate comprises an insulating base plate 1 and a copper-clad plate copper layer 2, the copper-clad plate is drilled, an initial conducting layer 3 is deposited on a manufactured product of a four-layer circuit board with the drilled holes, copper electroplating is carried out until the thickness can withstand subsequent processes, and the electroplated thin copper 4 is formed.
The purpose of forming thin copper on the initial conductive layer is to increase the reliability of the process, and the thickness of the thin copper reaches the lower limit of ensuring the reliability of the process.
Specifically, brushing the circuit board with the drilled holes, removing burrs of the holes, and cleaning the board surface. Then removing the glue slag, and then carrying out copper deposition electroplating, wherein the electroplating parameters are as follows: 10asf 35min, coating thickness about 5um.
(2) A non-photosensitive polymer film was attached to the plate surface as an anti-plating masking film 5.
Specifically, brushing a four-layer circuit board plated with thin copper, drying, and then hot-pressing and laminating an anti-plating high polymer film RPP, wherein the thickness of the film is about 10um, and the laminating parameters are as follows: the pressure is 15kg/cm 2, the temperature is 95 ℃ and the speed is 100mm/min.
(3) Removing masking materials covering the hole wall area by using laser, preparing an electroplating resisting pattern, removing an electroplating resisting masking film layer on the surface of a clamping point of an electroplating clamp by using laser, and exposing the copper surface of the contact area of the electroplating clamp.
Specifically, in the embodiment, a 20W ultraviolet nanosecond laser machine is adopted to remove RPP films on a hole wall area, an electroplating clamp clamping point and an electroplating balance weight, a circuit board is placed on a laser equipment adsorption table, engineering data of laser processing is imported, the circuit board and the processing data are accurately aligned, and the RPP films are removed by laser photoetching. After the top surface is processed, the circuit board is turned over, and the bottom surface film is removed by the same method. The processing parameters are as follows:
power/W | Frequency/kHz | Pulse width/ns | Processing speed/mm/s | Number of processing times |
6.5 | 200 | 20 | 600 | 1 |
(4) Electroplating, namely depositing a copper thickened conductive layer on the hole wall to a thickness required by final inspection to form a hole electroplated layer 6;
The control point for this step is the plating time. At this time, all areas except the hole wall and the electroplating balance weight are covered by a mask which is an insulating material and is contacted with electroplating liquid, but copper is not deposited on the surface, so that copper can be deposited on the hole wall and the balance weight in the electroplating process, the electroplating time is enough, a copper deposition layer with enough thickness can be obtained on the hole wall, and the purpose of selectively controlling the copper thickness of the hole wall is achieved.
Specifically, because the plating area is smaller, the step adopts a small current density for plating, and the plating parameters are as follows: 10asf for 120min, the thickness of the coating was about 25um.
(5) The laser removes masking material overlying the pad region exposing the copper surface of the pad region.
The processing method and the processing parameters are the same as those in the step (3).
(6) A metal having corrosion resistance and solderability is electroplated on the hole wall and the bonding pad to form a solderable metal 7.
The plated metal needs to have the corrosion resistance required in the step (8), and also has a function of protecting the corresponding area during transportation and storage of the circuit board and increasing the solderability of the land during assembly of the circuit board.
The invention uses non-photosensitive plating-resistant material, has good masking capability, can withstand longer electroplating time, and can withstand more severe plating solution and operation conditions. In addition, the technology of the invention can deposit metal only on the hole wall and the surface of the electroplating balance block because the other areas of the plate surface are masked by the high polymer film, the plating area is relatively small, and the materials are saved. Therefore, the variety of metals which are selectively both corrosion resistant and protective and are solderable is greater, such as nickel and gold.
Specifically, tin-lead is electroplated on the hole wall and the bonding pad according to the electroplating area and the plating thickness requirement to serve as a solderability metal protection layer. Parameters of electroplated tin-lead: 1.2ASD 40min, coating thickness about 10um.
(7) Removing the organic film material on the non-circuit area by laser to expose the non-circuit copper, thereby obtaining the etching-resistant masking pattern
And (3) removing the RPP anti-electroplating masking film on the non-circuit area of the four-layer circuit board by using laser, wherein the removing method and the parameters are the same as those in the step (3).
(8) And chemically etching to remove copper on the non-circuit area to obtain the conductive pattern.
The copper layer in the non-circuit area is etched by using the traditional chemical etching process, and the conductive layer in the non-circuit area is covered by the electroplating-resistant masking film, so that the copper thickness in the area is not increased during electroplating, the etching difficulty is greatly reduced, and finer circuits can be obtained.
(9) The whole plate is coated and cured with non-photosensitive solder resist once to form a solder resist material layer 8;
In this embodiment, PI films are laminated on the four-layer circuit board as solder resists. Specifically, before laminating the PI film, removing all the rest electroplating-resistant masking film on the plate surface by using laser, wherein the removing method and parameters are the same as those in the step (3), then laminating the laminated circuit board and the PI film by using a laminating machine, wherein the PI film is Kapton HN film produced by DuPont, the thickness is 25um, and a silicone rubber pad is used as a hot-pressing pad during lamination. The RPP masking film is required to be completely removed by a laser before lamination. According to the material characteristics, the hot press stage and parameters are as follows:
Further, removing the organic material on the conductor of the welding area by using laser at the assembly site, manufacturing a solder resist pattern, and cleaning and weldability treatment is carried out on the surface of the welding area;
The step can be completed in one step in the same equipment, or can be performed in two steps on different equipment, namely, the first step: manufacturing a solder resist pattern, and generating a welding area: removing the solder resist coating on the welding area by using a laser to selectively photoresist, and manufacturing a solder resist pattern to generate the welding area; and secondly, cleaning and solderability treatment is carried out on the surface of the welding area, the residual solder resist on the surface of the welding area is removed by using another laser, the metal surface layer of the welding area is slightly photoetched, the metal oxide is removed, the fresh metal surface is exposed, and solderability which is easy to be infiltrated by molten solder is produced.
Specifically, the embodiment adopts a 20W ultraviolet nanosecond laser machine to manufacture a solder resist pattern, a circuit board is placed on a laser equipment adsorption table, engineering data of laser processing is imported, the circuit board and the processing data are accurately aligned, and the PI molding solder resist pattern is formed by laser ablation. After the top surface is processed, the circuit board is turned over, and the bottom surface solder resist pattern is manufactured by the same method. The processing parameters are as follows:
power/W | Frequency/kHz | Pulse width/ns | Processing speed/mm/s | Number of processing times |
6 | 200 | 20 | 600 | 1 |
The welding area is cleaned and weldable by adopting a purple crust second laser, and the processing parameters are as follows:
power/W | Frequency/kHz | Pulse width/ps | Processing speed/mm/s | Number of processing times |
10 | 1000 | 12 | 2000 | 1 |
(10) Solder 10 is added to the lands, mounting and insertion of the component 11 are performed, and then reflow soldering and selective wave soldering are performed.
The technical scheme disclosed and proposed by the invention can be realized by a person skilled in the art by appropriately changing the condition route and other links in consideration of the content of the present invention, although the method and the preparation technology of the invention have been described by the preferred embodiment examples, the related person can obviously modify or recombine the method and the technical route described herein to realize the final preparation technology without departing from the content, spirit and scope of the invention. It is expressly intended that all such similar substitutes and modifications apparent to those skilled in the art are deemed to be included within the spirit, scope and content of the invention.
Claims (10)
1. A circuit board manufacturing method for plating holes, bonding pads plating resistance and resist patterns by laser processing is characterized in that: drilling holes, depositing a thin metal layer on the holes and the plate surface, attaching a non-photosensitive masking film, removing the masking layer covering the hole wall by laser to expose the hole wall, electroplating and thickening the conductive layer in the holes, removing the masking layer on the area of the bonding pad by laser to expose the copper surface of the bonding pad, electroplating a metal resist on the hole wall and the bonding pad, preparing a resist pattern by laser, etching a conductive pattern, coating a non-photosensitive solder resist on the non-circuit area, preparing a solder resist pattern by laser on an assembly site, and cleaning and weldability treatment on the surface of the bonding area; the method comprises the following steps:
(1) Depositing an initial conductive layer on a manufactured product of the double-sided and multi-layer circuit board with the drilled holes, and electroplating copper to a thickness which can withstand subsequent procedures;
(2) Attaching a non-photosensitive organic film to the plate surface to serve as an electroplating-resistant masking film;
(3) Removing masking materials covering the hole wall area by using laser to manufacture an electroplating resisting pattern, and removing an electroplating resisting masking film layer on the surface of a clamping point of an electroplating clamp by using laser to expose the copper surface of the contact area of the electroplating clamp;
(4) Electroplating, namely depositing a copper thickened conductive layer on the hole wall to a thickness required by final inspection;
(5) Removing the masking material covered on the bonding pad area by laser to expose the copper surface of the bonding pad area;
(6) Electroplating, namely depositing corrosion-resistant and solderable metals on the hole wall and the bonding pad;
(7) Removing the organic film material on the non-circuit area by using laser to expose the non-circuit copper, so as to obtain an etching-resistant masking pattern;
When the ratio of the perimeter of the area to be removed to the diameter of the focused laser beam is smaller than 10, removing the masking film on the surface of the substrate and the conductive metal copper below the masking film by using a point-by-point and line-by-line photoetching method by using the focused laser beam; when the ratio of the perimeter of the area to be removed to the diameter of the focused laser beam is larger than 15, firstly removing the masking film on the surface of the substrate by using focused laser beams along the inner side of the envelope of the area to be removed and taking the envelope as a boundary by point-to-point photoetching until a closed heat insulation channel is formed around the part which is not removed on the area, and then heating the area which is not removed by using the laser beam with the diameter larger than the minimum optical power density required by removing the metal copper, so that the electroplating-resistant masking film on the area and the conductive metal copper below the area are simultaneously separated from the surface of the substrate to be removed;
When the plating-resistant masking film on the non-line area is removed by laser, the optical power density of the focused laser is kept to be larger than the minimum power density required by removing the organic material and is 1.2 times larger than the minimum optical power density required by removing the organic material and is lower than or close to the minimum optical power density required by removing the metal layer covered under the laser, and the diameter of the focused laser beam is changed according to the shape and the size of the removed area so as to reduce or remove the lap joint of the laser processing area and improve the processing efficiency;
(8) Removing copper on the non-circuit area by chemical etching to obtain a conductive pattern;
(9) Coating and curing the non-photosensitive solder resist on the non-circuit area at one time;
(10) And adding solder to the connecting disc, carrying out element mounting and inserting, and carrying out reflow soldering or wave soldering.
2. The method of claim 1, wherein the non-photosensitive organic film of step (2) is comprised of several layers of different morphology and composition, wherein the layers in contact with the circuit board are tacky and flowable.
3. The method of claim 1, wherein the non-photosensitive organic film of step (2) has plating resist/resist properties, etch resist properties, and solder resist/resist properties, and the plating resist masking film covering the wiring region does not need to be removed as a solder resist film for the wiring region.
4. The method of claim 1, wherein step (2) comprises depositing a non-photosensitive organic film-forming material onto the plate surface and the hole wall using electrophoresis, vacuum plating, vapor deposition techniques; including the application of liquid photosensitive materials and dry photosensitive films using prior art techniques.
5. The method of claim 1 wherein step (3) removes masking material covering the area of the walls of the hole with a laser to create an anti-plating pattern, removes the anti-plating masking film layer from the surface of the clamping points of the plating jig with a laser to expose the copper surface in the area in contact with the plating jig, wherein the pattern of the walls of the hole with a laser also includes areas where the non-wiring is removed and spaced more than 30 μm from the wiring, or where the conductive layer is to be removed and does not adversely affect the subsequent removal process, or where the copper thickness does not affect its function, or where the copper thickness is increased to provide an anti-plating masking film on areas where the function is positively affected, to create a balanced plating pattern that is advantageous for plating the walls of the hole.
6. The method of claim 1, wherein the coating method of step (9) comprises spray printing, screen printing; the coating thickness reaches the level of the masking film on the circuit after the coating is solidified or meets the design requirement.
7. The method of claim 1, wherein step (8) includes removing all of the plating resist masking film remaining on the board surface with a laser after the conductive pattern is formed.
8. The method of claim 1 or 6, wherein step (9) comprises removing all of the plating resist masking film remaining on the board surface with a laser, applying prior art and material full board coating and curing the photosensitive and non-photosensitive soldermask at one time.
9. The method of claim 7, wherein step (8) includes continuing the circuit board manufacturing process using prior art techniques and materials after removing all of the plating-resistant masking film remaining on the board surface with the laser.
10. The method according to claim 8, characterized in that: step (9) includes forming a solder resist pattern by removing the organic material from the land conductors with a laser after full-face coating and curing the photosensitive and non-photosensitive solder resists at one time.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005076678A1 (en) * | 2004-02-09 | 2005-08-18 | Lpkf Laser & Elektronika D.O.O. | Method for the partial removal of a conductive layer |
CN103052271A (en) * | 2012-12-17 | 2013-04-17 | 天津市德中技术发展有限公司 | Method for producing resistance soldering pattern and capable of conducting solderability treatment on surface of welding area |
CN113056117A (en) * | 2021-03-15 | 2021-06-29 | 德中(天津)技术发展股份有限公司 | Method for metalizing and electroplating hole wall only |
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TW201216801A (en) * | 2010-10-01 | 2012-04-16 | Hung-Ming Lin | Manufacturing method of circuit board |
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-
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005076678A1 (en) * | 2004-02-09 | 2005-08-18 | Lpkf Laser & Elektronika D.O.O. | Method for the partial removal of a conductive layer |
CN103052271A (en) * | 2012-12-17 | 2013-04-17 | 天津市德中技术发展有限公司 | Method for producing resistance soldering pattern and capable of conducting solderability treatment on surface of welding area |
CN113056117A (en) * | 2021-03-15 | 2021-06-29 | 德中(天津)技术发展股份有限公司 | Method for metalizing and electroplating hole wall only |
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