CN113707211B - Flash memory READ RETRY error correction method and device - Google Patents
Flash memory READ RETRY error correction method and device Download PDFInfo
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- CN113707211B CN113707211B CN202110825587.XA CN202110825587A CN113707211B CN 113707211 B CN113707211 B CN 113707211B CN 202110825587 A CN202110825587 A CN 202110825587A CN 113707211 B CN113707211 B CN 113707211B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
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Abstract
The embodiment of the invention provides a method and a device for correcting error of a flash memory READ RETRY, which are applied to the technical field of electronics. The method realizes that the Table value which can be successfully read is recorded through the historical data, and the Table value which can be read back by the data is preferentially selected to carry out the Retry when the Retry occurs, so that the efficiency of READ RETRY is improved.
Description
Technical Field
The present invention relates to the field of electronic technologies, and in particular, to a method and an apparatus for error correction of flash memory READ RETRY.
Background
Due to environmental factors, the number of read/write erasures, and the length of the storage time, electrons may be accelerated to pass through the insulating layer and return to the channel, resulting in fewer electrons on the floating gate. At this time, the Read operation is performed, and error correction failure of the ECC tends to occur. The ECC error correction failure needs to be READ RETRY (read retry). READ RETRY is a performance directly reflected in the overall product performance.
In the currently mainstream operating system, READ RETRY is performed mainly using the Retry Table sequence provided by the nand or nor media factory. Whereas the Retry Table sequence provided by the original plant is already optimized by READ RETRY which is a factor of the current media. However, there are various factors for READ RETRY to occur, say: environmental factors, the number of times of reading, writing and erasing, and the storage time. This may result in different thresholds being required. While ECC check fails due to different factors, then the thresholds it needs tend to be different. Larger sequential selection of the Retry tables one by one would waste time.
Disclosure of Invention
The embodiment of the invention provides a method and a device for correcting error of a flash memory READ RETRY, which are used for solving the problem that in the currently mainstream operating system, the error checking is carried out READ RETRY mainly by using the Retry Table sequence provided by the nand or nor medium original factory, and the ECC check failure caused by different factors is often different in required threshold value. The problem that the larger Retry Table sequentially selects to Retry one by one wastes time includes:
a method of error correction of a flash memory READ RETRY, the method comprising:
Judging whether the current state of flash memory block is READ RETRY or not;
Performing READ RETRY operations according to a pre-stored corresponding Retry Table sequence of the last current state of the Block when the Retry occurs in the current state of the flash Block;
And carrying out READ RETRY according to a default Retry Table sequence stored in advance when the Retry does not occur in the current state in the flash block.
Optionally, a Retry Table0 sequence, a Retry Table1 sequence, and a Retry Table2 sequence are stored in advance, where the state corresponding to the Retry Table0 sequence is Read times and P/E values are higher, the state corresponding to the Retry Table1 sequence is higher in temperature during writing and reading, and the state corresponding to the Retry Table2 sequence is longer in storage time.
Optionally, when the current state of the flash Block exceeds Retry, performing READ RETRY operations according to a pre-stored corresponding Retry Table sequence of the last current state of the Block, including:
And modifying the threshold value of the medium judgment data of 0 or 1 according to the corresponding Retry Table sequence of the current state, and performing READ RETRY operations.
Optionally, after the modifying the threshold value of the medium judgment data to be "0" or "1" according to the corresponding Retry Table sequence of the current state and performing READ RETRY operations, the method further includes:
judging READ RETRY whether the operation is successful or not;
When READ RETRY operation is successful, the threshold is taken as a start value of READ RETRY, and the process exits READ RETRY.
An apparatus for error correction of a flash memory READ RETRY, the apparatus comprising:
The state generation judging module is used for judging whether the current state of the flash memory block exceeds READ RETRY;
The corresponding sequence operation module is used for carrying out READ RETRY operations according to the corresponding Retry Table sequence of the last current state of the Block stored in advance when the Retry occurs in the current state of the flash Block;
and a default sequence operation module, configured to perform READ RETRY according to a default Retry Table sequence stored in advance when the current state does not have Retry in the flash block.
Optionally, a Retry Table0 sequence, a Retry Table1 sequence, and a Retry Table2 sequence are stored in advance, where the state corresponding to the Retry Table0 sequence is Read times and P/E values are higher, the state corresponding to the Retry Table1 sequence is higher in temperature during writing and reading, and the state corresponding to the Retry Table2 sequence is longer in storage time.
Optionally, the corresponding sequential operation module includes:
And the threshold value modification sub-module is used for modifying the threshold value of the medium judgment data of 0 or 1 according to the corresponding Retry Table sequence of the current state, and carrying out READ RETRY operations.
Optionally, the apparatus further comprises:
the success judging module is used for judging whether READ RETRY operations are successful or not;
And the flow exit module is used for taking the threshold value as a start value of READ RETRY when READ RETRY operation is successful, and exiting READ RETRY flow.
An apparatus comprising at least one processor and a memory for communication connection with the at least one processor; the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of error correction of the flash memory READ RETRY as described above.
A computer-readable storage medium storing computer-executable instructions for causing a computer to perform a method of error correction of a flash memory READ RETRY as described above.
The invention has the following advantages:
In the invention, by judging whether the current state of the flash Block is READ RETRY or not, when the current state of the flash Block is retried, READ RETRY operation is carried out according to the pre-stored corresponding Retry Table sequence of the last current state of the Block, and when the current state of the flash Block is not retried, READ RETRY is carried out according to the pre-stored default Retry Table sequence. The method realizes that the Table value which can be successfully read is recorded through the historical data, and the Table value which can be read back by the data is preferentially selected to carry out the Retry when the Retry occurs, so that the efficiency of READ RETRY is improved.
Drawings
In order to more clearly illustrate the technical solutions of the present invention, the drawings that are needed in the description of the present invention will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
FIG. 1 is a flow chart showing the steps of a method for error correction of flash memory READ RETRY according to the present invention;
fig. 2 shows a schematic structure of an error correction device for flash memory READ RETRY according to the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, there is shown a flow chart of steps of a method for error correction of a flash memory READ RETRY according to the present invention, the method including the steps of:
step 101, judging whether the current state of flash memory block is READ RETRY;
102, when a Retry occurs in the current state of the flash Block, performing READ RETRY operations according to a pre-stored corresponding Retry Table sequence of the last current state of the Block;
Recording the Retry Table in a bidirectional table_list, and performing READ RETRY according to different Retry Table sequences to obtain the difference of the positions of the reference values of the selection start in the table_list.
In an embodiment of the present application, a Retry Table0 sequence, a Retry Table1 sequence, and a Retry Table2 sequence are stored in advance, where the state corresponding to the Retry Table0 sequence is that the Read number and the P/E value are higher, the state corresponding to the Retry Table1 sequence is that the temperature is higher when writing and reading, and the state corresponding to the Retry Table2 sequence is that the storage time is longer.
Modifying the Retry Table sequence is to modify the start positions of Table0, table1 and Table2 on the table_list. Under the application scene of ECC error correction failure, the current state and the historical state of the medium are effectively utilized to select the Retry Table sequence, so that the READ RETEY tasks are efficiently completed.
When the Program is executed on the medium, the status is recorded, such as P/E value, ambient temperature, write time (the earlier the write order is, the earlier the Block has been recorded with all the written data by the linked list), etc. The Program state of the Block is recorded by adding linked List blocklist information. The temperature information is the value of the read master register; the writing time is embodied in a mode of blocklist sequence, and the earlier the writing time is, the earlier the writing time is; the P/E value is the number of times of Program and Erase.
When READ RETRY is needed, the Retry Table sequence can be modified by referencing the state of the Block. After the flow of READ RETRY is entered, it is first determined whether READ RETRY has occurred in the current state of the Block. If not, carrying out READ RETRY according to a default sequence, and recording and updating the optimal Retry Table sequence of the current state after success; if so, performing READ RETRY operations according to the optimal Retry Table sequence of the current state of the Block last time. Such as: if the acquired information
In a specific implementation, step 102 includes:
And modifying the threshold value of the medium judgment data of 0 or 1 according to the corresponding Retry Table sequence of the current state, and performing READ RETRY operations.
READ RETRY after success, the currently used Table value is taken as the start value of the Table.
Step 103, when the current state of the flash block does not generate Retry, performing READ RETRY according to a default Retry Table sequence stored in advance.
In an embodiment of the present application, after the modifying the threshold value of the medium judgment data to be "0" or "1" according to the corresponding Retry Table sequence of the current state and performing READ RETRY operations, the method further includes:
judging READ RETRY whether the operation is successful or not;
When READ RETRY operation is successful, the threshold is taken as a start value of READ RETRY, and the process exits READ RETRY.
In summary, by determining whether the current state of the flash Block has been READ RETRY, when the current state of the flash Block has been retried, READ RETRY operations are performed according to the pre-stored corresponding Retry Table sequence of the last current state of the Block, and when the current state of the flash Block has not been retried, READ RETRY is performed according to the pre-stored default Retry Table sequence. The method realizes that the Table value which can be successfully read is recorded through the historical data, and the Table value which can be read back by the data is preferentially selected to carry out the Retry when the Retry occurs, so that the efficiency of READ RETRY is improved.
It should be noted that, for simplicity of description, the method embodiments are shown as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the application.
Referring to fig. 2, a schematic structural diagram of an apparatus for error correction of a flash memory READ RETRY according to an embodiment of the present application is shown, where the apparatus includes the following structures:
A state occurrence judging module 201, configured to judge whether a current state has been READ RETRY when the flash block occurs;
A corresponding sequence operation module 202, configured to perform READ RETRY operations according to a pre-stored corresponding Retry Table sequence of the last current state of the Block when the Retry occurs in the current state of the flash Block;
and a default sequence operation module 203, configured to perform READ RETRY according to a default Retry Table sequence stored in advance when the current state does not have Retry in the flash block.
In an embodiment of the present application, a Retry Table0 sequence, a Retry Table1 sequence, and a Retry Table2 sequence are stored in advance, where the state corresponding to the Retry Table0 sequence is that the Read number and the P/E value are higher, the state corresponding to the Retry Table1 sequence is that the temperature is higher when writing and reading, and the state corresponding to the Retry Table2 sequence is that the storage time is longer.
In an embodiment of the present application, the corresponding sequential operation module includes:
And the threshold value modification sub-module is used for modifying the threshold value of the medium judgment data of 0 or 1 according to the corresponding Retry Table sequence of the current state, and carrying out READ RETRY operations.
In an embodiment of the present application, the apparatus further includes:
the success judging module is used for judging whether READ RETRY operations are successful or not;
And the flow exit module is used for taking the threshold value as a start value of READ RETRY when READ RETRY operation is successful, and exiting READ RETRY flow.
In summary, by determining whether the current state of the flash Block has been READ RETRY, when the current state of the flash Block has been retried, READ RETRY operations are performed according to the pre-stored corresponding Retry Table sequence of the last current state of the Block, and when the current state of the flash Block has not been retried, READ RETRY is performed according to the pre-stored default Retry Table sequence. The method realizes that the Table value which can be successfully read is recorded through the historical data, and the Table value which can be read back by the data is preferentially selected to carry out the Retry when the Retry occurs, so that the efficiency of READ RETRY is improved.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
The embodiment of the invention also provides a device which comprises at least one processor and a memory for communication connection with the at least one processor; the memory stores instructions executable by the at least one processor to enable the at least one processor to perform a method of error correction of the flash memory READ RETRY as described above.
The memory, as a non-transitory computer readable storage medium, may be used to store non-transitory software programs as well as non-transitory computer executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk memory, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory remotely located relative to the control processor, which may be connected to the power transmission circuit cross-over smart identification device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
Embodiments of the present invention also provide a computer-readable storage medium storing computer-executable instructions that are executed by one or more control processors, for example, by the control processors, to cause the one or more control processors to perform a method of correcting errors in a flash memory READ RETRY in the above-described method embodiments, for example, to perform the above-described method steps S101 to S103 in fig. 1.
The above described apparatus embodiments are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
While the preferred embodiment of the present application has been described in detail, the present application is not limited to the above embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the present application, and these equivalent modifications and substitutions are intended to be included in the scope of the present application as defined in the appended claims.
Claims (7)
1. A method for error correction of a flash memory READ RETRY, the method comprising:
Judging whether the current state of flash memory block is READ RETRY or not;
Performing READ RETRY operations according to a pre-stored corresponding Retry Table sequence of the last current state of the block when the Retry occurs in the current state of the flash block, wherein the corresponding Retry Table of the last current state of the block refers to a Table value which can read data back when the Retry occurs in the current state; the method comprises the steps that a Retry Table0 sequence, a Retry Table1 sequence and a Retry Table2 sequence are stored in advance, states corresponding to the Retry Table0 sequence are Read times and P/E values are high, states corresponding to the Retry Table1 sequence are high in temperature during writing and reading, and states corresponding to the Retry Table2 sequence are long in storage time;
And carrying out READ RETRY according to a default Retry Table sequence stored in advance when the Retry does not occur in the current state in the flash block.
2. The method for error correction of flash memory READ RETRY according to claim 1, wherein when the current state of the flash block has retried, performing READ RETRY operations according to a pre-stored corresponding Retry Table sequence of the last current state of the block, including:
And modifying the threshold value of the medium judgment data of 0 or 1 according to the corresponding Retry Table sequence of the current state, and performing READ RETRY operations.
3. The method for error correction of flash memory READ RETRY according to claim 2, wherein said modifying the threshold value of the medium judgment data to be "0" or "1" according to the corresponding Retry Table sequence of the current state, and after performing READ RETRY operation, further comprises:
judging READ RETRY whether the operation is successful or not;
When READ RETRY operation is successful, the threshold is taken as a start value of READ RETRY, and the process exits READ RETRY.
4. An apparatus for error correction of a flash memory READ RETRY, the apparatus comprising:
The state generation judging module is used for judging whether the current state of the flash memory block exceeds READ RETRY;
The corresponding sequence operation module is used for carrying out READ RETRY operations according to the pre-stored corresponding Retry Table sequence of the current state of the block when the current state of the flash block exceeds Retry, wherein the corresponding Retry Table of the current state of the block refers to a Table value which can read data back when the current state exceeds Retry; the method comprises the steps that a Retry Table0 sequence, a Retry Table1 sequence and a Retry Table2 sequence are stored in advance, states corresponding to the Retry Table0 sequence are Read times and P/E values are high, states corresponding to the Retry Table1 sequence are high in temperature during writing and reading, and states corresponding to the Retry Table2 sequence are long in storage time;
And a default sequence operation module, configured to perform READ RETRY according to a default Retry Table sequence stored in advance when the current state does not have Retry in the flash block.
5. The apparatus for error correction of flash memory READ RETRY as in claim 4, wherein said corresponding sequential operations module comprises:
And the threshold value modification sub-module is used for modifying the threshold value of the medium judgment data of 0 or 1 according to the corresponding Retry Table sequence of the current state, and carrying out READ RETRY operations.
6. The apparatus for error correction of flash memory READ RETRY, further comprising:
the success judging module is used for judging whether READ RETRY operations are successful or not;
And the flow exit module is used for taking the threshold value as a start value of READ RETRY when READ RETRY operation is successful, and exiting READ RETRY flow.
7. A computer-readable storage medium storing computer-executable instructions for causing a computer to perform the method of error correction of a flash memory READ RETRY as claimed in any one of claims 1 to 3.
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Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5808825A (en) * | 1996-03-15 | 1998-09-15 | Kabushiki Kaisha Toshiba | Read error recovery method and apparatus for use in disk storage system |
JP2006260769A (en) * | 2006-05-29 | 2006-09-28 | Fujitsu Ltd | Optical storage device and recording/playback method for optical recording medium |
CN106843771A (en) * | 2017-01-26 | 2017-06-13 | 合肥兆芯电子有限公司 | Memory reads method, memorizer control circuit unit and memory storage apparatus again |
CN108241549A (en) * | 2016-12-27 | 2018-07-03 | 北京京存技术有限公司 | NAND data Read Retry error correction methods and NAND controller based on ECC |
CN110502185A (en) * | 2018-05-17 | 2019-11-26 | 慧荣科技股份有限公司 | Read page data method again |
CN111104044A (en) * | 2018-10-25 | 2020-05-05 | 上海宝存信息科技有限公司 | Data storage device and adaptive data reading method thereof |
CN111581010A (en) * | 2020-04-30 | 2020-08-25 | 江苏芯盛智能科技有限公司 | Read operation processing method, device and equipment and readable storage medium |
CN111863107A (en) * | 2019-04-28 | 2020-10-30 | 武汉海康存储技术有限公司 | Flash memory error correction method and device |
CN112181714A (en) * | 2020-10-30 | 2021-01-05 | 深圳安捷丽新技术有限公司 | Error correction method and device for solid state disk, storage equipment and storage medium |
CN112631515A (en) * | 2020-12-17 | 2021-04-09 | 珠海妙存科技有限公司 | Self-adaptive flash memory data re-reading method, device and medium |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10102920B2 (en) * | 2016-08-15 | 2018-10-16 | Sandisk Technologies Llc | Memory system with a weighted read retry table |
-
2021
- 2021-07-21 CN CN202110825587.XA patent/CN113707211B/en active Active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5808825A (en) * | 1996-03-15 | 1998-09-15 | Kabushiki Kaisha Toshiba | Read error recovery method and apparatus for use in disk storage system |
JP2006260769A (en) * | 2006-05-29 | 2006-09-28 | Fujitsu Ltd | Optical storage device and recording/playback method for optical recording medium |
CN108241549A (en) * | 2016-12-27 | 2018-07-03 | 北京京存技术有限公司 | NAND data Read Retry error correction methods and NAND controller based on ECC |
CN106843771A (en) * | 2017-01-26 | 2017-06-13 | 合肥兆芯电子有限公司 | Memory reads method, memorizer control circuit unit and memory storage apparatus again |
CN110502185A (en) * | 2018-05-17 | 2019-11-26 | 慧荣科技股份有限公司 | Read page data method again |
CN111104044A (en) * | 2018-10-25 | 2020-05-05 | 上海宝存信息科技有限公司 | Data storage device and adaptive data reading method thereof |
CN111863107A (en) * | 2019-04-28 | 2020-10-30 | 武汉海康存储技术有限公司 | Flash memory error correction method and device |
CN111581010A (en) * | 2020-04-30 | 2020-08-25 | 江苏芯盛智能科技有限公司 | Read operation processing method, device and equipment and readable storage medium |
CN112181714A (en) * | 2020-10-30 | 2021-01-05 | 深圳安捷丽新技术有限公司 | Error correction method and device for solid state disk, storage equipment and storage medium |
CN112631515A (en) * | 2020-12-17 | 2021-04-09 | 珠海妙存科技有限公司 | Self-adaptive flash memory data re-reading method, device and medium |
Non-Patent Citations (1)
Title |
---|
Reducing solid-state drive read latency by optimizing read-retry;Jisung Park等;ACM;20210430;702–716 * |
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