CN112466378A - Solid state disk operation error correction method and device and related components - Google Patents
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- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
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Abstract
The application discloses a solid state disk operation error correction method which comprises the steps of selecting a plurality of data block samples from a plurality of NAND flash memory particles; performing a screening operation on each data block sample; constructing an optimal voltage offset table through the optimal voltage offset data corresponding to all dimensions of all data block samples; and when the solid state disk runs, selecting corresponding optimal voltage offset data from the optimal voltage offset table according to the dimension of the data block of the solid state disk for error correction. The error correction method and the error correction device can improve the error correction efficiency, reduce the probability of entering an error correction process when the solid state disk operates, and improve the stability of the operation of the solid state disk. The application also discloses a solid state disk operation error correction device, electronic equipment and a computer readable storage medium, which have the beneficial effects.
Description
Technical Field
The present disclosure relates to the field of storage systems, and in particular, to a method and an apparatus for error correction in operation of a solid state disk, and a related component.
Background
With the development and wide application of technologies such as internet, cloud computing, internet of things and the like and the high-speed development of information technology, higher requirements are put forward on the performance of a storage system. Solid state disks are widely used because of their fast read/write speed and low energy consumption. However, under the influence of the physical and electrical characteristics of the NAND, when data is written, electrons are moved into the NAND cell, and as time goes on, the electrons in the NAND cell escape, and the read interference has opposite influence, and as the number of times of erasing and writing increases, the influence of the electronic offset is further increased, specifically, bit inversion is adopted, when the number of bit inversions exceeds the hardware error correction capability, an error correction means is additionally introduced to ensure the accuracy of the data, the currently common error correction means is to perform error correction directly through an error correction table provided by a NAND manufacturer, when error correction is performed, an attempt is performed from a first group of data in the error correction table, and the error correction may be performed several times to succeed in error correction, which is time-consuming, and causes a large read delay and reduces the performance of the hard disk.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The application aims to provide a solid state disk operation error correction method, a solid state disk operation error correction device, an electronic device and a computer readable storage medium, which can improve error correction efficiency, effectively reduce the probability of entering an extra error correction process when the solid state disk operates, and improve the operation stability of the solid state disk.
In order to solve the technical problem, the present application provides a method for error correction in operation of a solid state disk, including:
selecting a plurality of data block samples from a plurality of NAND flash memory particles;
performing a screening operation on each of the data block samples, the screening operation comprising: determining the dimensionality of the data block sample, correcting the data block sample by using the voltage offset data of the original error correction table, and taking a plurality of voltage offset data with error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimensionality;
constructing an optimal voltage offset table through the optimal voltage offset data corresponding to all the dimensions of all the data block samples;
and when the solid state disk operates, selecting corresponding optimal voltage offset data from the optimal voltage offset table according to the dimensionality of the data block of the solid state disk for error correction.
Preferably, the dimensions include erase times, data retention time, and read disturb.
Preferably, the screening operation further comprises:
judging whether the difference value of two optimal voltage offset data of the data block sample in adjacent dimensions is smaller than a preset value or not;
and if so, selecting any optimal voltage offset data as the optimal voltage offset data for constructing the optimal voltage offset table.
Preferably, the process of correcting the error of the data block sample by using the voltage offset data of the original error correction table includes:
the data block samples are error corrected using the voltage offset data of the plurality of sets of original error correction tables.
Preferably, the step of using the plurality of voltage offset data with error correction bit error rates meeting the preset condition as the optimal voltage offset data of the data block sample in the dimension specifically includes:
and taking the plurality of voltage offset data which are successfully decoded and have error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimension.
Preferably, after a plurality of data block samples are selected from the plurality of NAND flash memory particles, the method for running error correction on a solid state disk further includes:
dividing all the data block samples into a screening sample group and a verification sample group;
correspondingly, the process of performing the filtering operation on each data block sample specifically includes:
performing a screening operation on the data block samples in the screening sample set;
after the optimal voltage offset table is constructed by the optimal voltage offset data corresponding to all the dimensions of all the data block samples, the method for running error correction of the solid state disk further comprises the following steps:
and verifying the optimal voltage offset table through the verification sample group, and executing corresponding operation according to a verification result.
In order to solve the above technical problem, the present application further provides a solid state disk operation error correction device, including:
a selecting module for selecting a plurality of data block samples from a plurality of NAND flash memory particles;
a screening module configured to perform a screening operation on each of the data block samples, the screening operation including: determining the dimensionality of the data block sample, correcting the data block sample by using the voltage offset data of the original error correction table, and taking a plurality of voltage offset data with error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimensionality;
the construction module is used for constructing an optimal voltage offset table through the optimal voltage offset data corresponding to all the dimensions of all the data block samples;
and the error correction module is used for selecting corresponding optimal voltage offset data from the optimal voltage offset table for error correction according to the dimensionality of the data block of the solid state disk when the solid state disk operates.
Preferably, the dimensions include erase times, data retention time, and read disturb.
In order to solve the above technical problem, the present application further provides an electronic device, including:
a memory for storing a computer program;
a processor, configured to implement the steps of the error correction method for solid state disk operation according to any one of the above items when executing the computer program.
In order to solve the above technical problem, the present application further provides a computer-readable storage medium, where a computer program is stored, and the computer program, when executed by a processor, implements the steps of the error correction method for solid state disk operation according to any one of the above items.
The application provides an error correction method for operation of a solid state disk, wherein optimal voltage offset data of each data block of NAND flash memory particles in different dimensions are screened, an optimal voltage offset table is constructed through the screened optimal voltage offset data, the size of the optimal voltage offset table is reduced, the current dimension of the data block of the solid state disk is determined during actual operation of the solid state disk, the optimal voltage offset data corresponding to the current dimension is selected from the optimal voltage offset table for error correction, the voltage offset data do not need to be selected from the error correction table one by one for trying, the error correction efficiency is improved, the probability of entering an extra error correction process during operation of the solid state disk is effectively reduced, and the operation stability of the solid state disk is improved. The application also provides a solid state disk operation error correction device, electronic equipment and a computer readable storage medium, and the device, the electronic equipment and the computer readable storage medium have the same beneficial effects as the solid state disk operation error correction method.
Drawings
In order to more clearly illustrate the embodiments of the present application, the drawings needed for the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a flowchart illustrating steps of a method for error correction in operation of a solid state disk according to the present application;
fig. 2 is a schematic structural diagram of an error correction device for operation of a solid state disk provided in the present application.
Detailed Description
The core of the application is to provide the error correction method and device for the operation of the solid state disk, the electronic equipment and the computer readable storage medium, which can improve the error correction efficiency, effectively reduce the probability of entering an additional error correction process when the solid state disk operates and improve the stability of the operation of the solid state disk.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a flowchart illustrating steps of a method for error correction in operation of a solid state disk provided in the present application, where the method for error correction in operation of a solid state disk includes:
s101: selecting a plurality of data block samples from a plurality of NAND flash memory particles;
specifically, the purpose of this step is to determine the sample size, first select a plurality of solid state disks, and select a plurality of data blocks from the NAND flash memory granules corresponding to each solid state disk as samples, that is, the data block samples in this step.
S102: performing a screening operation on each data block sample, the screening operation comprising: determining the dimensionality of the data block sample, correcting the data block sample by using the voltage offset data of the original error correction table, and taking a plurality of voltage offset data with error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimensionality;
s103: constructing an optimal voltage offset table through the optimal voltage offset values corresponding to all dimensions of all data block samples;
before executing the step, the operation of determining the acquisition parameters is further included, and due to the influence of the electronic offset of the NAND flash memory grain, the operation needs to be considered based on three dimensions of the erasing times (PE), the data Retention Time (RT) and the read disturb (RDD), so that the range of the three dimensions and the step size of acquiring the data are determined firstly. Specifically, the upper limit of the erase-write times PE is 7000 (enterprise-level NAND standard), and data can be collected according to 1000 steps, that is, (7000/1000) is 7 times in total; the upper limit of the data retention time is 3 months (enterprise-level NAND standard), and data can be collected by using 2 weeks as a step length, that is, 6 times in total (3 months/2 weeks); the number of times of influence of the read disturbance may be acquired in 1000 steps, that is, (3000/1000) is 3 times. Then, according to the acquisition parameters, a screening operation is performed on each data block sample, wherein the screening operation comprises the following steps:
determining the dimension (PE _ m, RT _ n, RDD _ l) of the data block sample, where m is 1, 2, …, i, n is 1, 2, …, j, l is 1, 2, …, k;
correcting the data block sample by using the voltage offset data of the original error correction table, and recording whether each voltage offset data is successfully decoded and the error correction error rate of each voltage offset data, wherein the original error correction table is a plurality of groups of error correction tables (about 50-70 groups) provided by a NAND manufacturer;
the multiple voltage offset data with the error correction code rate meeting the preset condition are used as the optimal voltage offset data of the data block sample in the dimension, and specifically, three groups of values with the lowest error correction code rate can be used as the optimal voltage offset data corresponding to the current dimension. The steps are repeated until all dimensions (PE _ i, RT _ j and RDD _ k) are covered, an optimal voltage offset table is constructed through the optimal voltage offset data corresponding to all dimensions of all data block samples, and the optimal voltage offset table constructed in the method is smaller than an original error correction table and high in decoding success rate.
S104: and when the solid state disk runs, selecting corresponding optimal voltage offset data from the optimal voltage offset table according to the dimension of the data block of the solid state disk for error correction.
Specifically, in the operation stage of the solid state disk, which stage of PE, RT, and RDD each data block is located in needs to be recorded, that is, the dimension of the data block is determined, and when a read application is issued, the corresponding voltage offset data in the optimal voltage offset table is directly selected. It can be understood that the optimal voltage offset data acquisition efficiency is improved by positioning in the optimal voltage offset table through the dimension, and the voltage offset data does not need to be selected one by one from an error correction table provided by a manufacturer to try, so that the error correction efficiency is improved.
It can be seen that, in this embodiment, the optimal voltage offset data of each data block of the NAND flash memory particles in different dimensions are screened, an optimal voltage offset table is constructed through the screened optimal voltage offset data, the size of the optimal voltage offset table is reduced, when the solid state disk actually operates, the current dimension of the data block of the solid state disk is determined, the optimal voltage offset data corresponding to the current dimension is selected from the optimal voltage offset table for error correction, the voltage offset data does not need to be selected from the error correction table one by one for trying, the error correction efficiency is improved, the probability of entering an additional error correction process when the solid state disk operates is effectively reduced, and the operation stability of the solid state disk is improved.
On the basis of the above-described embodiment:
as a preferred embodiment, the screening operation further comprises:
judging whether the difference value of two optimal voltage offset data of the data block sample in adjacent dimensions is smaller than a preset value or not;
and if so, selecting any optimal voltage offset data as the optimal voltage offset data for constructing the optimal voltage offset table.
Specifically, in order to further simplify the obtained optimal voltage offset table, it is necessary to compare differences of voltage offset data of adjacent dimensions, for example, (PE ═ 1000, RT ═ n, and RDD ═ l), (PE ═ 2000, RTn, and RDD ═ l), and if the difference is small, the two dimensions may be merged, that is, the two dimensions share one set of optimal voltage offset data, and when the optimal voltage offset table is constructed, it is sufficient to construct any one set of optimal voltage offset data corresponding to the two dimensions.
As a preferred embodiment, after selecting a plurality of data block samples from a plurality of NAND flash memory grains, the method for error correction in operation of a solid state disk further includes:
dividing all data block samples into a screening sample group and a verification sample group;
correspondingly, the process of performing the screening operation on each data block sample specifically includes:
performing a screening operation on the data block samples in the screening sample group;
after constructing an optimal voltage offset table by the optimal voltage offset data corresponding to all dimensions of all data block samples, the method for operating and correcting the error of the solid state disk further comprises the following steps:
and verifying the optimal voltage offset table through the verification sample group, and executing corresponding operation according to a verification result.
Specifically, all the acquired data block samples are divided into two groups, one group is a screening sample group, the other group is a verification sample group, optimal voltage offset data are screened through the data block samples in the screening sample group, an optimal voltage offset table is constructed through the optimal voltage offset data, then the optimal voltage offset table is verified through the verification sample group, and error correction code rates are recorded.
In summary, the method for pre-screening the optimal voltage offset data is adopted, so that the probability of entering an error correction process during the operation of the solid state disk can be effectively reduced, and through a large number of tests, 99.9% of data can be successfully decoded when being read for the first time, the influence of the error correction process on the performance is avoided, and the SSD performance is ensured to be more stable.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a solid state disk operation error correction apparatus provided in the present application, where the solid state disk operation error correction apparatus includes:
the selection module 1 is used for selecting a plurality of data block samples from a plurality of NAND flash memory particles;
a screening module 2, configured to perform a screening operation on each data block sample, where the screening operation includes: determining the dimensionality of the data block sample, correcting the data block sample by using the voltage offset data of the original error correction table, and taking a plurality of voltage offset data with error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimensionality;
the construction module 3 is used for constructing an optimal voltage offset table through the optimal voltage offset data corresponding to all dimensions of all data block samples;
and the error correction module 4 is used for selecting corresponding optimal voltage offset data from the optimal voltage offset table for error correction according to the dimension of the data block of the solid state disk when the solid state disk runs.
It can be seen that, in this embodiment, the optimal voltage offset data of each data block of the NAND flash memory particles in different dimensions are screened, an optimal voltage offset table is constructed through the screened optimal voltage offset data, the size of the optimal voltage offset table is reduced, when the solid state disk actually operates, the current dimension of the data block of the solid state disk is determined, the optimal voltage offset data corresponding to the current dimension is selected from the optimal voltage offset table for error correction, the voltage offset data does not need to be selected from the error correction table one by one for trying, the error correction efficiency is improved, the probability of entering an additional error correction process when the solid state disk operates is effectively reduced, and the operation stability of the solid state disk is improved.
As a preferred embodiment, the dimensions include erase times, data retention time, and read disturb.
As a preferred embodiment, the screening operation further comprises:
judging whether the difference value of two optimal voltage offset data of the data block sample in adjacent dimensions is smaller than a preset value or not;
and if so, selecting any optimal voltage offset data as the optimal voltage offset data for constructing the optimal voltage offset table.
As a preferred embodiment, the process of correcting the error of the data block sample by using the voltage offset data of the original error correction table comprises:
the data block samples are error corrected using the voltage offset data of the plurality of sets of original error correction tables.
As a preferred embodiment, the process of using a plurality of voltage offset data with error correction error rates satisfying a preset condition as the optimal voltage offset data of the data block sample in the dimension specifically includes:
and taking the plurality of voltage offset data which are successfully decoded and have error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimension.
As a preferred embodiment, the apparatus for error correction of operation of a solid state disk further includes:
the dividing module is used for dividing all data block samples into a screening sample group and a verification sample group;
correspondingly, the process of performing the screening operation on each data block sample specifically includes:
performing a screening operation on the data block samples in the screening sample group;
the solid state disk operation error correction device further comprises:
and the verification module is used for verifying the optimal voltage offset table through the verification sample group and executing corresponding operation according to a verification result.
In another aspect, the present application further provides an electronic device, including:
a memory for storing a computer program;
a processor, configured to implement the steps of the error correction method for solid state disk operation as described in any of the above embodiments when executing the computer program.
For an introduction of an electronic device provided in the present application, please refer to the above embodiments, which are not described herein again.
The electronic equipment provided by the application has the same beneficial effects as the solid state disk operation error correction method.
In another aspect, the present application further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of the error correction method for solid state disk operation as described in any one of the above embodiments.
For the introduction of a computer-readable storage medium provided in the present application, please refer to the above embodiments, which are not described herein again.
The computer-readable storage medium provided by the application has the same beneficial effects as the solid state disk operation error correction method.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A method for error correction of solid state disk operation is characterized by comprising the following steps:
selecting a plurality of data block samples from a plurality of NAND flash memory particles;
performing a screening operation on each of the data block samples, the screening operation comprising: determining the dimensionality of the data block sample, correcting the data block sample by using the voltage offset data of the original error correction table, and taking a plurality of voltage offset data with error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimensionality;
constructing an optimal voltage offset table through the optimal voltage offset data corresponding to all the dimensions of all the data block samples;
and when the solid state disk operates, selecting corresponding optimal voltage offset data from the optimal voltage offset table according to the dimensionality of the data block of the solid state disk for error correction.
2. The method of claim 1, wherein the dimensions include erase times, data retention time, and read disturb.
3. The method of claim 1, wherein the screening operation further comprises:
judging whether the difference value of two optimal voltage offset data of the data block sample in adjacent dimensions is smaller than a preset value or not;
and if so, selecting any optimal voltage offset data as the optimal voltage offset data for constructing the optimal voltage offset table.
4. The method for error correction in operation of a solid state disk according to claim 1, wherein the step of correcting the error of the data block sample by using the voltage offset data of the original error correction table comprises:
the data block samples are error corrected using the voltage offset data of the plurality of sets of original error correction tables.
5. The method according to claim 1, wherein the step of using the voltage offset data with the error correction error rate meeting the preset condition as the optimal voltage offset data of the data block sample in the dimension specifically comprises:
and taking the plurality of voltage offset data which are successfully decoded and have error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimension.
6. The method of any one of claims 1 to 5, wherein after the selecting the plurality of data block samples from the plurality of NAND flash memory particles, the method further comprises:
dividing all the data block samples into a screening sample group and a verification sample group;
correspondingly, the process of performing the filtering operation on each data block sample specifically includes:
performing a screening operation on the data block samples in the screening sample set;
after the optimal voltage offset table is constructed by the optimal voltage offset data corresponding to all the dimensions of all the data block samples, the method for running error correction of the solid state disk further comprises the following steps:
and verifying the optimal voltage offset table through the verification sample group, and executing corresponding operation according to a verification result.
7. An error correction device for operation of a solid state disk, comprising:
a selecting module for selecting a plurality of data block samples from a plurality of NAND flash memory particles;
a screening module configured to perform a screening operation on each of the data block samples, the screening operation including: determining the dimensionality of the data block sample, correcting the data block sample by using the voltage offset data of the original error correction table, and taking a plurality of voltage offset data with error correction error rates meeting preset conditions as the optimal voltage offset data of the data block sample in the dimensionality;
the construction module is used for constructing an optimal voltage offset table through the optimal voltage offset data corresponding to all the dimensions of all the data block samples;
and the error correction module is used for selecting corresponding optimal voltage offset data from the optimal voltage offset table for error correction according to the dimensionality of the data block of the solid state disk when the solid state disk operates.
8. The solid state disk operation error correction device of claim 7, wherein the dimensions include erase times, data retention time, and read disturb.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor, configured to implement the steps of the method for error correction of solid state disk operation according to any one of claims 1 to 6 when executing the computer program.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a computer program, which when executed by a processor implements the steps of the solid state disk operation error correction method according to any one of claims 1 to 6.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113470727A (en) * | 2021-06-04 | 2021-10-01 | 山东英信计算机技术有限公司 | Processing method, device, equipment and medium for uncorrectable data of solid state disk |
| CN113470728A (en) * | 2021-06-29 | 2021-10-01 | 成都佰维存储科技有限公司 | Error correction capability test method and device, readable storage medium and electronic equipment |
| CN113625947A (en) * | 2021-06-28 | 2021-11-09 | 苏州浪潮智能科技有限公司 | Data error correction method, device and equipment and computer readable storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110689914A (en) * | 2019-09-06 | 2020-01-14 | 苏州浪潮智能科技有限公司 | Solid state disk reading error correction method, device, equipment and storage medium |
| CN111124278A (en) * | 2019-11-21 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Method, device and medium for improving reading performance of solid state disk |
| CN111880736A (en) * | 2020-07-28 | 2020-11-03 | 苏州浪潮智能科技有限公司 | Solid state disk access method, device, equipment and medium |
-
2020
- 2020-11-12 CN CN202011263939.9A patent/CN112466378A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110689914A (en) * | 2019-09-06 | 2020-01-14 | 苏州浪潮智能科技有限公司 | Solid state disk reading error correction method, device, equipment and storage medium |
| CN111124278A (en) * | 2019-11-21 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Method, device and medium for improving reading performance of solid state disk |
| CN111880736A (en) * | 2020-07-28 | 2020-11-03 | 苏州浪潮智能科技有限公司 | Solid state disk access method, device, equipment and medium |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113470727A (en) * | 2021-06-04 | 2021-10-01 | 山东英信计算机技术有限公司 | Processing method, device, equipment and medium for uncorrectable data of solid state disk |
| CN113625947A (en) * | 2021-06-28 | 2021-11-09 | 苏州浪潮智能科技有限公司 | Data error correction method, device and equipment and computer readable storage medium |
| CN113625947B (en) * | 2021-06-28 | 2023-08-25 | 苏州浪潮智能科技有限公司 | Data error correction method, device, equipment and computer readable storage medium |
| CN113470728A (en) * | 2021-06-29 | 2021-10-01 | 成都佰维存储科技有限公司 | Error correction capability test method and device, readable storage medium and electronic equipment |
| CN113470728B (en) * | 2021-06-29 | 2023-11-21 | 成都佰维存储科技有限公司 | Error correction capability test method and device, readable storage medium and electronic equipment |
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Application publication date: 20210309 |