CN113419682B - Data processing method and device and computer flash memory equipment - Google Patents

Data processing method and device and computer flash memory equipment Download PDF

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CN113419682B
CN113419682B CN202110733388.6A CN202110733388A CN113419682B CN 113419682 B CN113419682 B CN 113419682B CN 202110733388 A CN202110733388 A CN 202110733388A CN 113419682 B CN113419682 B CN 113419682B
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reading
read
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storage block
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CN113419682A (en
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詹纯娟
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Hunan Goke Microelectronics Co Ltd
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Hunan Goke Microelectronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0619Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/0644Management of space entities, e.g. partitions, extents, pools
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0647Migration mechanisms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

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Abstract

The embodiment of the invention discloses a data processing method, a data processing device and computer flash memory equipment, wherein the method comprises the following steps: acquiring the current reading times, the uncompleted reading times, the reading times of the predicted current command and a dynamic reading time threshold of the memory block; if the sum of the current reading times and the unfinished reading times of the frequent memory blocks is smaller than the dynamic reading time threshold value, and the sum of the current reading times, the unfinished reading times and the reading times of the predicted current command is larger than the dynamic reading time threshold value, after the current reading command is finished, data of the frequent memory blocks are moved to other memory blocks; therefore, data can be accurately moved, and the performance reduction of the flash memory device and even the data loss caused by reading interference are avoided.

Description

Data processing method and device and computer flash memory equipment
Technical Field
The present invention relates to the field of data storage, and in particular, to a data processing method and apparatus, and a computer flash memory device.
Background
The solid state disk is a hard disk made of a solid state electronic storage chip array, has the advantages of strong performance, small volume, no noise and the like compared with the traditional mechanical hard disk, and is widely applied to the fields of military affairs, vehicle-mounted, industrial control, video monitoring, network interruption and the like. At present, the bit error rate is often improved due to the abrasion of a flash memory in the service life of the solid state disk, and then reading interference occurs.
Before sending error over limit or error checking caused by reading interference, moving effective data so as to avoid performance reduction and data loss. In the prior art, a fixed threshold is set, and when the reading technology of a super block reaches the threshold, the operation of moving data is triggered. However, since the computer flash memory device becomes more and more unstable at the end of its lifetime, if a fixed threshold is used to determine whether to process the read interference, the data cannot be accurately moved, resulting in performance degradation and even data loss.
Disclosure of Invention
In order to overcome the problem that a fixed threshold is used to determine whether read interference needs to be processed, and data cannot be accurately moved, which results in performance degradation and even data loss in the prior art, an object of the present application is to provide a data processing method applied to a computer flash memory device, where the computer flash memory device includes a plurality of memory blocks, the method including the following steps:
determining the number of unfinished reading times of the first storage block according to the current reading command;
determining the reading times of the predicted next command of the first memory block according to all the reading commands before the current reading command;
determining a dynamic reading frequency threshold value of the first storage block according to the remaining erasable frequency and the available capacity of the first storage block;
if the sum of the current reading times and the unfinished reading times of the first storage block is smaller than the dynamic reading time threshold, and the sum of the current reading times, the unfinished reading times and the reading times of the predicted next command is larger than the dynamic reading time threshold, after the current reading command is finished, the data of the first storage block is moved to other storage blocks.
In an optional implementation manner, the step of determining the number of outstanding reads of the first memory block according to the current read command is preceded by:
and acquiring the current reading times of the storage block, and determining the storage block with the current reading times larger than a preset frequent reading time threshold as a first storage block.
In an optional implementation manner, the step of determining the number of outstanding reads of the first memory block according to the current read command includes:
acquiring the number of reading times required for executing the current reading command according to the current reading command;
and calculating the number of unfinished reading times according to the required reading times and the current reading times corresponding to the current reading command.
In an alternative implementation manner, the step of determining the predicted read times of the next command of the first memory block according to all read commands before the current read command includes:
according to all read commands before the current read command, acquiring the average read times, the read mode and a pre-read mechanism required by the first memory block to execute the read command once, wherein the read mode comprises sequential read and random read;
and calculating the reading times of the predicted next command according to the required average reading times, the reading mode and the pre-reading mechanism.
In an optional implementation manner, the step of determining a dynamic read time threshold of the first memory block according to the number of times of erasing and the available capacity of the first memory block includes:
acquiring the remaining erasable times and the available capacity of the first storage block;
acquiring a maximum reading time threshold corresponding to the first storage block according to the storage grain type of the first storage block;
and calculating the dynamic reading time threshold according to the maximum reading time threshold, the residual erasable times and the available capacity.
Another object of the present application is to provide a data processing apparatus applied to a computer flash memory device, the computer flash memory device including a plurality of memory blocks, the apparatus including:
the unfinished reading number determining module is used for determining the unfinished reading number of the first storage block according to the current reading command;
a read frequency determining module for predicting a next command, configured to determine, according to all read commands before the current read command, a read frequency of the predicted next command of the first memory block;
a reading frequency threshold value determining module, configured to determine a dynamic reading frequency threshold value of the first storage block according to the remaining erasable frequency and the available capacity of the first storage block;
and a moving module, configured to move the data of the first storage block to another storage block after the current read command is completed, if the sum of the current read time and the unfinished read time of the first storage block is smaller than the dynamic read time threshold, and the sum of the current read time, the unfinished read time, and the predicted read time of the current command is larger than the dynamic read time threshold.
In an optional implementation manner, the incomplete reading number determining module is configured to:
acquiring the number of reading times required for executing the current reading command according to the current reading command;
and calculating the number of unfinished reading times according to the required reading times and the current reading times corresponding to the current reading command.
In an alternative implementation, the module for determining the number of reads of the predicted next command is configured to:
according to all read commands before the current read command, acquiring the average read times, the read mode and the pre-read mechanism required by the frequent memory block to execute the read command once, wherein the read mode comprises sequential read and random read;
and calculating the reading times of the predicted next command according to the required average reading times, the reading mode and the pre-reading mechanism.
In an optional implementation manner, the reading number threshold determining module is configured to:
acquiring the residual erasable times and the available capacity of the first storage block;
acquiring a maximum reading time threshold corresponding to the first storage block according to the storage grain type of the first storage block;
and calculating the dynamic reading time threshold according to the maximum reading time threshold, the residual erasable times and the available capacity.
It is another object of the present application to provide a computer flash memory device comprising a processor and a memory, said memory having stored thereon a computer program, which when executed by said processor, implements the steps of the data processing method provided herein.
Another object of the present application is to provide a readable storage medium, in which a computer program is stored, which when executed implements the steps of the data processing method provided by the present application.
Compared with the prior art, the method has the following beneficial effects:
the embodiment of the invention provides a data processing method, which comprises the following steps: acquiring the current reading times, the uncompleted reading times, the reading times of the predicted current command and a dynamic reading time threshold of the memory block; if the sum of the current reading times and the unfinished reading times of the frequent memory blocks is smaller than the dynamic reading time threshold value, and the sum of the current reading times, the unfinished reading times and the reading times of the predicted current command is larger than the dynamic reading time threshold value, after the current reading command is finished, data of the frequent memory blocks are moved to other memory blocks; therefore, data can be accurately moved, and the performance reduction of the flash memory device and even the data loss caused by reading interference are avoided.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings required to be used in the embodiments will be briefly described below, and it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope of the present invention. For a person skilled in the art, it is possible to derive other relevant figures from these figures without inventive effort. Like components are numbered similarly in the various figures.
Fig. 1 is a flowchart of a data processing method provided in an embodiment of the present application;
fig. 2 is a block diagram of a data processing apparatus according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined or explained in subsequent figures.
In the description of the present application, it is noted that the terms "first", "second", "third", and the like are used merely for distinguishing between descriptions and are not intended to indicate or imply relative importance.
In the description of the present application, it is also to be noted that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of the present invention belong. The terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning that is consistent with their contextual meaning in the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in various embodiments of the present invention.
With respect to flash memory devices, since extra electrons enter the flash memory device to cause the transistor threshold voltage to shift to the right, since the transistor threshold voltage is changed by theft, if the internal logic of the flash memory device still loads the control electrode according to the previous reference voltage and then judges the data, the erroneous judgment will inevitably occur. The speed at which the threshold voltage is shifted to the right, i.e., the extent to which read disturb affects the data. On one hand, the method is related to the number of times of reading data on the flash memory block, and the more the number of times of reading is, the more right shift is, the larger the influence is; on the other hand, the number of times of erasing and writing of the flash memory block is also related, the more the number of times of erasing and writing is, the poorer the insulation effect is, the easier the electrons enter the transistor is, and the larger the influence of reading interference is.
In order to solve the above problem, please refer to fig. 1, an embodiment of the present application provides a data processing method applied to a computer flash memory device, where the computer flash memory device includes a plurality of memory blocks, and before the steps of the method, the method includes the following steps:
and acquiring the current reading times of the storage block, and determining the storage block with the current reading times larger than a preset frequent reading time threshold as a first storage block.
In this embodiment, based on the principle of wear leveling, in the reading process of the flash memory device, all blocks are divided into a plurality of block groups, and each block group is replaced by another block group to bear the next or next round of erasing after bearing one or more times of erasing, so as to ensure the maximum service life of the entire flash memory device. Therefore, it is necessary to determine the block group undergoing erasure as the frequent block, i.e. the first block, so as to deal with the read disturb of the frequent block. Because the current reading times of the frequent memory blocks are necessarily larger than that of other memory blocks, and bad blocks and the like are considered, the frequent memory blocks are screened by setting a frequent reading time threshold.
The method specifically comprises the following steps:
s10: and determining the number of unfinished reading times of the first storage block according to the current reading command.
In this embodiment, the number of unfinished reads refers to the number of reads that the frequent memory block needs to perform to complete the current read command after performing a part of the number of reads according to the current read command. The number of outstanding reads is a condition for determining whether data needs to be moved to avoid read disturb, and is also a condition for determining when to move data. The number of outstanding reads of the frequent memory block is determined by the following steps:
s101: and acquiring the number of times of reading required by executing the current reading command according to the current reading command.
In this embodiment, the number of reads that need to be executed to execute the current read command is obtained by obtaining the current read command. For example, a user initiates a command for opening a word file in a computer, determines a storage block a storing data of the word file according to a logical block address in a current read command, and determines the number of times of reading required to be performed on the storage block a to be 10 ten thousand times according to the length of the current read command.
S102: and calculating the number of unfinished reading times according to the required reading times and the current reading times corresponding to the current reading command.
In this embodiment, the current reading times corresponding to the current read command, that is, the reading times that have been completed to execute the current read command, may be obtained. For example, if it is determined that the current read count corresponding to the current read command is 8 ten thousand times on the memory block a according to the current read command, the number of outstanding reads on the memory block a can be 2 ten thousand times according to the number of 10 ten thousand times that are required to be executed.
S20: and determining the reading times of the predicted next command of the first memory block according to all the reading commands before the current reading command.
In this embodiment, all read commands before the current read command executed on the memory block a are obtained, and the number of reads occurring on the memory block a next time is predicted according to all read commands. The method comprises the following specific steps:
s201: and acquiring the average reading times, the reading mode and a pre-reading mechanism required by the first memory block to execute the reading command once according to all the reading commands before the current reading command, wherein the reading mode comprises sequential reading and random reading.
In this embodiment, the read command generally includes a logical block address, a read command length, a read mode and a read-ahead mechanism, the logical block address determines the memory block to be read, and the read command length determines the amount of read data, thereby affecting the read times.
The pre-reading mechanism includes pre-reading, which is a technology for accelerating the starting speed of a program process, and mainly reads the main content of a common program when an operating system is started and loaded, and a large amount of time is consumed for reading the data of the program when the program is started, so that the required reading times can be influenced by the pre-reading.
The reading mode comprises sequential reading and random reading, the random reading and the sequential reading are two input modes of the memory, the random reading occupies a large space, but has high speed and is convenient for data processing, the sequential reading speed is low, the space is small, the data processing is complex, and the required reading times can be influenced by the reading mode.
By analyzing all read commands executed on the frequent memory block, the average number of reads required on the frequent memory block can be calculated, and the read mode and the pre-read mechanism on the frequent memory block can be predicted.
S202: and calculating the reading times of the predicted next command according to the required average reading times, the reading mode and the pre-reading mechanism.
In this embodiment, after the required average read times, read mode and read-ahead mechanism are obtained, based on the influence of the read mode and read-ahead mechanism on the read times, the read times of the next occurrence on the frequent storage blocks, that is, the read times of the next command, can be predicted.
S30: and determining a dynamic reading time threshold of the first storage block according to the remaining erasable times and the available capacity of the first storage block.
In this embodiment, the lifetime of the flash memory device is mainly determined by the number of times of erasing and the capacity, and the step of specifically determining the threshold of the number of times of dynamic reading of the frequent memory block is as follows:
s301: and acquiring the remaining erasable times and the available capacity of the first storage block.
In this embodiment, the remaining number of times of erasing refers to the number of times that the frequent memory block can be read, written and erased, and the remaining number of times of erasing is determined by subtracting the current number of times of reading from the total number of times of erasing; the available capacity refers to the total amount of data stored in the frequent memory blocks. The remaining erasable times and available capacity of the frequent memory block can be obtained by sending a test read command to the frequent memory block, so that the lifetime of the frequent memory block can be obtained.
S302: acquiring a maximum reading time threshold corresponding to the first storage block according to the storage particles of the first storage block;
in this embodiment, the type of the memory Cell of the frequent memory block determines the threshold of the number of times of reading the frequent memory block to avoid the read disturb, such as SLC (Single-Level Cell) Cell, using two charges, positive and negative, one floating gate storing information of one bit, about 10 ten thousand erase life, MLC (Multi-Level Cell) Cell, using charges with different potentials, one floating gate storing information of 2 bits, about 5000-. The reading number threshold of the flash memory device can be obtained from the description text of the storage granules when the flash memory device is shipped, and in the prior art, the reading number threshold is often fixed as the reading number threshold for avoiding reading interference, but in the present embodiment, the reading number threshold is used as the maximum reading number threshold.
S303: and calculating the dynamic reading time threshold according to the maximum reading time threshold, the residual erasable times and the capacity.
In this embodiment, the lifetime of the current frequent storage block can be calculated according to the remaining erasable times and capacity, and then the dynamic read time threshold can be calculated by combining the maximum read time threshold. For example, the service life of the frequent memory block when shipped from the factory is 10 years, the maximum read time threshold is 100 ten thousand times, the service life of the current frequent memory block is 5 years, the dynamic read time threshold is 50 ten thousand times, and if the service life of the current frequent memory block is 1 year, the dynamic read time threshold is 10 ten thousand times. Or a dynamic read time threshold is configured in advance, for example, when the early life stage of the frequent memory block, that is, the life of the frequent memory block, is 7 to 10 years, a first dynamic read time threshold is configured, when the middle life stage of the frequent memory block, that is, the life of the frequent memory block, is 3 to 7 years, a second dynamic read time threshold is configured, and when the late life stage of the frequent memory block, that is, the life of the frequent memory block, is 0 to 3 years, a third dynamic read time threshold is configured.
S40: if the sum of the current reading times and the unfinished reading times of the first storage block is smaller than the dynamic reading time threshold, and the sum of the current reading times, the unfinished reading times and the reading times of the predicted next command is larger than the dynamic reading time threshold, after the current reading command is finished, the data of the first storage block is moved to other storage blocks.
In this embodiment, the sum of the current read count and the number of unfinished reads of the frequent memory block is smaller than the dynamic read count threshold, and when the sum of the current read count, the number of unfinished reads, and the predicted read count of the sub-command is larger than the dynamic read count threshold, it indicates that read interference may occur when the frequent memory block executes the next read command, so that after the current read command is executed, and before the next read command is executed, data of the frequent memory block is moved to other memory blocks, thereby avoiding the influence of read interference. Meanwhile, other memory blocks receiving data can also be subjected to read interference judgment, and if the other memory blocks also have read interference, the data cannot be moved to the memory block. Optionally, a moving read time threshold may be set, for example, 1 ten thousand, and when data needs to be moved, the other storage blocks preferentially select the storage block whose current read time is smaller than the moving read time threshold.
According to the data processing method provided by the embodiment of the application, the method comprises the following steps: acquiring the current reading times, the uncompleted reading times, the reading times of the predicted current command and a dynamic reading time threshold of the memory block; if the sum of the current reading times and the unfinished reading times of the frequent memory blocks is smaller than the dynamic reading time threshold value, and the sum of the current reading times, the unfinished reading times and the reading times of the predicted current command is larger than the dynamic reading time threshold value, after the current reading command is finished, data of the frequent memory blocks are moved to other memory blocks; therefore, the data can be accurately moved, and the performance reduction of the flash memory device and even the data loss caused by reading interference are avoided.
Corresponding to the above method embodiments, please refer to fig. 2, an embodiment of the present application provides a data processing apparatus 1000, which is applied to a computer flash memory device, where the computer flash memory device includes a plurality of memory blocks, and the apparatus includes:
the incomplete read count determining module 1001 is configured to determine the incomplete read count of the first memory block according to the current read command.
The predicted read frequency determining module 1002 is configured to determine, according to all read commands before the current read command, the read frequency of the predicted next command of the frequent memory block.
A reading frequency threshold determining module 1003, configured to determine a dynamic reading frequency threshold of the first storage block according to the erasable frequency and the available capacity of the first storage block.
A moving module 1004, configured to, if the sum of the current read count and the unfinished read count of the first storage block is smaller than the dynamic read count threshold, and the sum of the current read count, the unfinished read count, and the predicted read count of the current command is greater than the dynamic read count threshold, move the data of the first storage block to another storage block after the current read command is finished.
Optionally, the incomplete reading number determining module 1001 is specifically configured to: acquiring the number of reading times required for executing the current reading command according to the current reading command; and calculating the number of unfinished reading times according to the required reading times and the current reading times corresponding to the current reading command.
Optionally, the predicted reading number determining module 1002 is specifically configured to: according to all read commands before the current read command, acquiring the average read times, the read mode and a pre-read mechanism required by the first memory block to execute the read command once, wherein the read mode comprises sequential read and random read; and calculating the reading times of the predicted next command according to the required average reading times, the main reading mode and the pre-reading mechanism.
Optionally, the reading time threshold determining module 1003 is specifically configured to: sending a reading command to the first storage block to acquire the remaining erasable times and the available capacity of the first storage block; acquiring a maximum reading time threshold corresponding to the first storage block according to the storage particles of the first storage block; and calculating the dynamic reading time threshold according to the maximum reading time threshold, the residual erasable times and the available capacity.
The data processing apparatus provided in the embodiment of the present application can implement each process of the data processing method in the method embodiment of fig. 1, and can achieve the same technical effect, and is not described here again to avoid repetition.
The embodiment also provides a computer flash memory device, which includes a processor and a memory, where the memory stores a computer program, and the computer program, when executed by the processor, implements the steps of the data processing method provided in the embodiment of the present application.
The present embodiment also provides a readable storage medium, in which a computer program is stored, and when the computer program is executed, the steps of the data processing method provided in the embodiment of the present application are implemented.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The apparatus embodiments described above are merely illustrative and, for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, each functional module or unit in each embodiment of the present invention may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention or a part of the technical solution that contributes to the prior art in essence can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a smart phone, a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention.

Claims (10)

1. A data processing method applied to a computer flash memory device, wherein the computer flash memory device comprises a plurality of memory blocks, the method comprising the steps of:
determining the number of unfinished reading times of a first memory block according to a current reading command, wherein the number of unfinished reading times represents the number of reading times which are required to be executed for completing the current reading command after the first memory block executes part of the reading times according to the current reading command;
determining the reading times of the predicted next command of the first memory block according to all the reading commands before the current reading command;
determining a dynamic reading frequency threshold value of the first storage block according to the remaining erasable frequency and the available capacity of the first storage block;
and if the sum of the current reading times and the unfinished reading times of the first storage block is smaller than the dynamic reading time threshold value, and the sum of the current reading times, the unfinished reading times and the reading times of the predicted next command is larger than the dynamic reading time threshold value, after the current reading command is finished, moving the data of the first storage block to other storage blocks.
2. The method of claim 1, wherein the step of determining the number of outstanding reads of the first memory block according to the current read command is preceded by the steps of:
and acquiring the current reading times of the storage block, and determining the storage block with the current reading times larger than a preset frequent reading time threshold as a first storage block.
3. The method of claim 1, wherein the step of determining the number of outstanding reads of the first block of memory according to the current read command comprises:
acquiring the number of reading times required for executing the current reading command according to the current reading command;
and calculating the number of unfinished reading times according to the required reading times and the current reading times corresponding to the current reading command.
4. The method of claim 1, wherein the step of determining the predicted next read command number for the first memory block based on all read commands prior to the current read command comprises:
according to all read commands before the current read command, acquiring the average read times, the read mode and a pre-read mechanism required by the first memory block to execute the read command once, wherein the read mode comprises sequential read and random read;
and calculating the reading times of the predicted next command according to the required average reading times, the reading mode and the pre-reading mechanism.
5. The method of claim 1, wherein the step of determining the threshold of the number of dynamic reads of the first memory block according to the number of erasability and the available capacity of the first memory block comprises:
acquiring the remaining erasable times and the available capacity of the first storage block;
acquiring a maximum reading time threshold corresponding to the first storage block according to the storage grain type of the first storage block;
and calculating the dynamic reading time threshold according to the maximum reading time threshold, the residual erasable times and the available capacity.
6. A data processing apparatus for use in a computer flash memory device, the computer flash memory device comprising a plurality of memory blocks, the apparatus comprising:
an unfinished reading number determining module, configured to determine, according to a current read command, unfinished reading number of a first storage block, where the unfinished reading number indicates a reading number that needs to be executed for completing the current read command after the first storage block executes a partial reading number according to the current read command;
a read frequency determining module for predicting a next command, configured to determine, according to all read commands before the current read command, a read frequency of the predicted next command of the first memory block;
a reading frequency threshold value determining module, configured to determine a dynamic reading frequency threshold value of the first storage block according to the remaining erasable frequency and the available capacity of the first storage block;
and the moving module is used for moving the data of the first storage block to other storage blocks after the current read command is finished if the sum of the current read times and the unfinished read times of the first storage block is smaller than the dynamic read times threshold and the sum of the current read times, the unfinished read times and the read times of the predicted next command is larger than the dynamic read times threshold.
7. The apparatus of claim 6, wherein the incomplete read number determination module is configured to:
acquiring the number of reading times required by executing the current reading command according to the current reading command;
and calculating the number of unfinished reading times according to the required reading times and the current reading times corresponding to the current reading command.
8. The apparatus of claim 6, wherein the predicted number of reads for the next command determination module is configured to:
according to all read commands before the current read command, acquiring the average read times, the read mode and the pre-read mechanism required by the frequent memory block to execute the read command once, wherein the read mode comprises sequential read and random read;
and calculating the reading times of the predicted next command according to the required average reading times, the reading mode and the pre-reading mechanism.
9. The apparatus of claim 6, wherein the threshold number of reads module is configured to:
acquiring the remaining erasable times and the available capacity of the first storage block;
acquiring a maximum reading time threshold corresponding to the first storage block according to the storage grain type of the first storage block;
and calculating the dynamic reading time threshold according to the maximum reading time threshold, the residual erasable times and the available capacity.
10. A readable storage medium, characterized in that a computer program is stored in the readable storage medium, which computer program, when executed, carries out the steps of the data processing method according to any one of claims 1 to 5.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257830A (en) * 2012-02-17 2013-08-21 联想(北京)有限公司 Storage cell accessing method and storage cell
CN108052279A (en) * 2017-11-23 2018-05-18 深圳市江波龙电子有限公司 A kind of method, apparatus, equipment and storage medium for promoting flash memory performance
CN109634527A (en) * 2018-12-12 2019-04-16 华中科技大学 A kind of interior service life of flash memory prediction technique realized of SSD
CN111324304A (en) * 2020-02-14 2020-06-23 西安奥卡云数据科技有限公司 Data protection method and device based on SSD hard disk life prediction

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9423970B2 (en) * 2013-12-30 2016-08-23 Sandisk Technologies Llc Method and system for predicting block failure in a non-volatile memory
US9329797B2 (en) * 2013-12-30 2016-05-03 Sandisk Technologies Inc. Method and system for adjusting block erase or program parameters based on a predicted erase life

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257830A (en) * 2012-02-17 2013-08-21 联想(北京)有限公司 Storage cell accessing method and storage cell
CN108052279A (en) * 2017-11-23 2018-05-18 深圳市江波龙电子有限公司 A kind of method, apparatus, equipment and storage medium for promoting flash memory performance
CN109634527A (en) * 2018-12-12 2019-04-16 华中科技大学 A kind of interior service life of flash memory prediction technique realized of SSD
CN111324304A (en) * 2020-02-14 2020-06-23 西安奥卡云数据科技有限公司 Data protection method and device based on SSD hard disk life prediction

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