CN115509466B - Data management method and device, electronic equipment and storage medium - Google Patents
Data management method and device, electronic equipment and storage medium Download PDFInfo
- Publication number
- CN115509466B CN115509466B CN202211461907.9A CN202211461907A CN115509466B CN 115509466 B CN115509466 B CN 115509466B CN 202211461907 A CN202211461907 A CN 202211461907A CN 115509466 B CN115509466 B CN 115509466B
- Authority
- CN
- China
- Prior art keywords
- memory
- data
- target
- block
- target page
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 100
- 238000013523 data management Methods 0.000 title claims abstract description 42
- 238000010438 heat treatment Methods 0.000 claims description 20
- 238000012216 screening Methods 0.000 claims description 16
- 238000007726 management method Methods 0.000 claims description 15
- 238000005516 engineering process Methods 0.000 claims description 14
- 238000004590 computer program Methods 0.000 claims description 10
- 230000002159 abnormal effect Effects 0.000 claims description 4
- 238000013500 data storage Methods 0.000 abstract description 2
- 230000001360 synchronised effect Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 6
- 206010033799 Paralysis Diseases 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000003993 interaction Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application discloses a data management method, a data management device, an electronic device and a storage medium, and relates to the technical field of data storage, wherein the method comprises the following steps: determining a first memory block and a second memory block in a memory; dividing the first storage block into a first part and a second part according to a preset dividing mode, and dividing the second storage block into a third part and a fourth part; recording target data to a first target page and a second target page in the first part, and a third target page and a fourth target page in the fourth part; wherein an offset of the first target page in the first portion is the same as an offset of the third target page in the fourth portion, and an offset of the second target page in the first portion is the same as an offset of the fourth target page in the fourth portion. Therefore, the data recording method and the data recording device improve the accuracy of data recording.
Description
Technical Field
The present application relates to the field of data storage technologies, and in particular, to a data management method and apparatus, an electronic device, and a computer-readable storage medium.
Background
NAND Flash is widely applied to various storage occasions at present, and an ideal Flash memory should meet the characteristics of small size, high operation speed, low programming voltage, strong anti-erasing capability, long retention time and the like.
The NAND Flash is composed of blocks, each of which is a minimum unit of erasing and writing, and each of which is a minimum unit of writing, and during use, there are various kinds of recording information including bad block information, load balancing information, garbage collection information, etc., so that recording of such information is important, and a plurality of effective blocks are generally selected from the entire NAND as management blocks to record information.
Admittedly, the management block is also subject to errors, which is generally not allowed to happen because the NAND uses abnormally due to the management information recording error, the information cannot be recovered, and the serious person is scrapped, which all represent that the robustness of the NAND is deteriorated. Therefore, how to effectively use the block recording information to avoid the occurrence of errors with a high possibility is a very important research content.
The double-block synchronous recording method is a commonly used recording method at present: the method is characterized in that two valid blocks (blocks) are selected from a NAND bad block table to record information, the recording method is synchronously writing downwards in sequence from page0, and after all pages (pages) of the whole block are fully written, crase erasing action is executed, and then the next round of recording is carried out. This approach generally avoids UNC (a fault in hard disk detection) for a single block and allows timely synchronous recovery of valid information from another block.
As described above, when UNC occurs in a block, information can be recovered by using another block through an information synchronization method. However, pages with different blocks and the same sequence number are easy to simultaneously generate UNC, so that the probability that UNC simultaneously occurs in two pages is high in the recording process. In addition. The double-block recording process is full, erasing and writing actions need to be carried out at the same time, and if power failure occurs at the moment, information is completely lost.
Therefore, how to improve the accuracy of data recording is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
The application aims to provide a data management method, a data management device, an electronic device and a computer readable storage medium, and accuracy of data recording is improved.
In order to achieve the above object, the present application provides a data management method, including:
determining a first memory block and a second memory block in a memory;
dividing the first storage block into a first part and a second part according to a preset dividing mode, and dividing the second storage block into a third part and a fourth part;
recording target data to a first target page and a second target page in the first part and a third target page and a fourth target page in the fourth part; wherein the offset of the first target page in the first portion is the same as the offset of the third target page in the fourth portion, and the offset of the second target page in the first portion is the same as the offset of the fourth target page in the fourth portion.
Wherein the determining a first memory block and a second memory block in the memory comprises:
the first memory block and the second memory block are identified in the memory using a high temperature technology screening method.
Wherein the determining a first memory block and a second memory block in a memory using a high temperature technology screening method comprises:
writing the same target content to all memory blocks in the memory;
reading the contents of all the storage blocks, and determining a first error rate of each storage block by comparing the read contents with the target contents;
heating the memory, reading the contents of all the memory blocks, and determining a second error rate of each memory block by comparing the read contents with the target contents;
and determining two memory blocks with the smallest difference between the first error rate and the second error rate as a first memory block and a second memory block.
Wherein the determining a first memory block and a second memory block in a memory using a high temperature technology screening method comprises:
writing the same target content to all memory blocks in the memory;
heating the memory, reading the contents of all the memory blocks, and determining the error rate of each memory block by comparing the read contents with the target contents;
and determining the two memory blocks with the lowest error rate as a first memory block and a second memory block.
Wherein the recording of the target data to the first target page and the second target page in the first portion, and the third target page and the fourth target page in the fourth portion includes:
recording target data to a first target page and a second target page in the first part according to the page sequence in the first part, and recording target data to a third target page and a fourth target page in the fourth part according to the page sequence in the fourth part; the second target page is a page subsequent to the first target page, and the fourth target page is a page subsequent to the third target page.
Wherein the recording the target data to the first target page and the second target page in the first portion according to the page order in the first portion, and recording the target data to the fourth portion after the third target page and the fourth target page in the fourth portion according to the page order in the fourth portion further comprises:
and when a reading command of the target data is received, reading the last piece of data in the first part.
Wherein after reading the last piece of data in the first portion, the method further comprises:
and if the last piece of data in the first part is read wrongly, reading the penultimate piece of data in the first part.
Wherein, after reading the penultimate data in the first part, the method further comprises:
and if the last piece of data and the penultimate piece of data in the first part are both read wrongly, reading the last piece of data in the fourth part.
Wherein, after reading the last piece of data in the fourth part, the method further comprises:
and if the last data in the fourth part is read wrongly, reading the penultimate data in the fourth part.
The target data is management information of the memory, and the management information includes any one or a combination of any several of bad block information, load balancing information and garbage collection information.
Wherein the recording the target data after the first target page and the second target page in the first portion and the third target page and the fourth target page in the fourth portion further comprises:
when the first part is full, erasing all data in the first part;
reading the last piece of data in the fourth part, and recording the last piece of data to the first part;
erasing all data in the fourth portion, and synchronizing the last piece of data in the first portion to the fourth portion.
Wherein, after recording the target data to the first target page and the second target page in the first portion, and before recording the target data to the third target page and the fourth target page in the fourth portion, the method further comprises:
and if the second storage block is abnormal in power failure, synchronizing the last piece of data in the first part to the fourth part after the second storage block is powered on.
To achieve the above object, the present application provides a data management apparatus, comprising:
a determining module for determining a first memory block and a second memory block in a memory;
the dividing module is used for dividing the first storage block into a first part and a second part according to a preset dividing mode and dividing the second storage block into a third part and a fourth part;
a recording module, configured to record target data to a first target page and a second target page in the first portion, and a third target page and a fourth target page in the fourth portion; wherein the offset of the first target page in the first portion is the same as the offset of the third target page in the fourth portion, and the offset of the second target page in the first portion is the same as the offset of the fourth target page in the fourth portion.
Wherein the determining module is specifically configured to: the first memory block and the second memory block are identified in the memory using a high temperature technology screening method.
Wherein the determining module is specifically configured to: writing the same target content to all storage blocks in the memory; reading the contents of all the storage blocks, and determining a first error rate of each storage block by comparing the read contents with the target contents; heating the memory, reading the contents of all the memory blocks, and determining a second error rate of each memory block by comparing the read contents with the target contents; and determining two memory blocks with the smallest difference between the first error rate and the second error rate as a first memory block and a second memory block.
Wherein the determining module is specifically configured to: writing the same target content to all memory blocks in the memory; heating the memory, reading the contents of all the memory blocks, and determining the error rate of each memory block by comparing the read contents with the target contents; and determining the two memory blocks with the lowest error rate as a first memory block and a second memory block.
Wherein the recording module is specifically configured to: recording target data to a first target page and a second target page in the first part according to the page sequence in the first part, and recording target data to a third target page and a fourth target page in the fourth part according to the page sequence in the fourth part; the second target page is a page subsequent to the first target page, and the fourth target page is a page subsequent to the third target page.
Wherein, still include:
and the first reading module is used for reading the last piece of data in the first part when a reading command of the target data is received.
Wherein, still include:
and the second reading module is used for reading the penultimate data in the first part if the last data in the first part is read wrongly.
Wherein, still include:
and the third reading module is used for reading the last data in the fourth part if the last data and the penultimate data in the first part are both read wrongly.
Wherein, still include:
and the fourth reading module is used for reading the penultimate data in the fourth part if the last data in the fourth part is read wrongly.
The target data is management information of the memory, and the management information includes any one or a combination of any several of bad block information, load balancing information and garbage collection information.
Wherein, still include:
the erasing module is used for erasing all data in the first part when the first part is fully written; reading the last piece of data in the fourth part, and recording the last piece of data to the first part; erasing all data in the fourth portion, and synchronizing the last piece of data in the first portion to the fourth portion.
Wherein, still include:
and the synchronization module is used for synchronizing the last piece of data in the first part to the fourth part after the second storage block is powered on if the second storage block is in power failure abnormity.
To achieve the above object, the present application provides an electronic device including:
a memory for storing a computer program;
a processor for implementing the steps of the data management method as described above when executing the computer program.
To achieve the above object, the present application provides a computer-readable storage medium having stored thereon a computer program, which when executed by a processor, implements the steps of the data management method as described above.
According to the scheme, the data management method provided by the application comprises the following steps: determining a first memory block and a second memory block in a memory; dividing the first storage block into a first part and a second part according to a preset dividing mode, and dividing the second storage block into a third part and a fourth part; recording target data to a first target page and a second target page in the first part and a third target page and a fourth target page in the fourth part; wherein the offset of the first target page in the first portion is the same as the offset of the third target page in the fourth portion, and the offset of the second target page in the first portion is the same as the offset of the fourth target page in the fourth portion.
According to the data management method, a double-block asynchronous recording method is adopted, the UNC (un-core) occurs to the pages with the same sequence number in different blocks at the same time, namely when the UNC occurs to the first part in the first storage block and the third part in the second storage block at the same time, data can be recorded and read based on the fourth part in the second storage block. The method and the device can ensure that important information can be accurately recorded and read, can repair the NAND information in time to the maximum extent, and ensure that the NAND system cannot be paralyzed due to the error of information recording. Therefore, the data management method improves the accuracy of data recording. The application also discloses a data management device, an electronic device and a computer readable storage medium, which can also realize the technical effects.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure without limiting the disclosure. In the drawings:
FIG. 1 is a flow chart illustrating a method of data management according to an exemplary embodiment;
FIG. 2 is a flow diagram illustrating another method of data management in accordance with an exemplary embodiment;
FIG. 3 is a block diagram of a data management device according to an exemplary embodiment;
FIG. 4 is a block diagram illustrating an electronic device in accordance with an exemplary embodiment.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. In addition, in the embodiments of the present application, "first", "second", and the like are used for distinguishing similar objects, and are not necessarily used for describing a specific order or a sequential order.
The embodiment of the application discloses a data management method, which improves the accuracy of data recording.
Referring to fig. 1, a flowchart of a data management method according to an exemplary embodiment is shown, as shown in fig. 1, including:
s101: determining a first memory block and a second memory block in a memory;
in this embodiment, two memory blocks with a low error rate are determined in the memory as memory blocks for recording target data, that is, a first memory block a and a second memory block b. As a preferred embodiment, the present step may include: the first memory block and the second memory block are identified in the memory using a high temperature technology screening method.
As a possible implementation, the determining the first memory block and the second memory block in the memory by using the high temperature technology screening method includes: writing the same target content to all storage blocks in the memory; heating the memory, reading the contents of all the memory blocks, and determining the error rate of each memory block by comparing the read contents with the target contents; and determining the two memory blocks with the lowest error rate as a first memory block and a second memory block.
In the implementation, the whole memory is erased, the same target content, for example, all 0 s, is written into all the memory blocks in the memory, and all 1 s are not used as much as possible, because the erased NAND content is all 1 s, and the voltage jump maximization cannot be guaranteed at this time. Putting the memory into a high-temperature box for heating operation for a plurality of hours, taking out the memory, reading the memory, counting the error rate of all memory blocks, selecting two memory blocks with the lowest error rate as a first memory block and a second memory block, and distributing the two memory blocks on odd-even blocks.
As another possible implementation, the determining the first memory block and the second memory block in the memory by using the high temperature technology screening method includes: writing the same target content to all memory blocks in the memory; reading the contents of all the storage blocks, and determining a first error rate of each storage block by comparing the read contents with the target contents; heating the memory, reading the contents of all the memory blocks, and determining a second error rate of each memory block by comparing the read contents with the target contents; and determining two memory blocks with the smallest difference between the first error rate and the second error rate as a first memory block and a second memory block.
In the implementation, the whole memory is erased, the same target content, for example, all 0 s, is written into all the memory blocks in the memory, and all 1 s are not used as much as possible, because the erased NAND content is all 1 s, and the voltage jump maximization cannot be guaranteed at this time. Reading the whole memory to count the error rate of all memory blocks. And putting the memory into a high-temperature box to carry out heating operation for several hours, taking out the memory, carrying out reading operation on the memory, counting the error rate conditions of all memory blocks, and selecting two memory blocks with the minimum error rate difference as a first memory block and a second memory block which are distributed on the odd-even block.
S102: dividing the first storage block into a first part and a second part according to a preset dividing mode, and dividing the second storage block into a third part and a fourth part;
in this step, the first storage block and the second storage block are divided into two parts according to the same dividing manner, that is, the first storage block is divided into a first part and a second part, and the second storage block is divided into a third part and a fourth part. The first part, the second part, the third part and the fourth part all comprise a plurality of pages, the offset of the first part in the first storage block is the same as the offset of the third part in the second storage block, the offset of the second part in the first storage block is the same as the offset of the fourth part in the second storage block, namely the first part and the third part are easy to simultaneously generate UNC, and the second part and the fourth part simultaneously generate UNC.
S103: recording target data to a first target page and a second target page in the first part and a third target page and a fourth target page in the fourth part; wherein the offset of the first target page in the first portion is the same as the offset of the third target page in the fourth portion, and the offset of the second target page in the first portion is the same as the offset of the fourth target page in the fourth portion.
In a specific implementation, target data is recorded to a first target page and a second target page in the first part according to the page sequence in the first part, and target data is recorded to a third target page and a fourth target page in the fourth part according to the page sequence in the fourth part; the second target page is a page subsequent to the first target page, and the fourth target page is a page subsequent to the third target page. The target data in this embodiment may be management information of the memory, where the management information may include bad block information, load balancing information, garbage collection information, and the like, and this embodiment is not particularly limited.
For a block with N pages, the recording mode generally starts at page0 and ends at page (N-1). For example, blockA is divided into a first section pageA and a second section pageB, and blockB is divided into a third section pageA and a fourth section pageB. For convenience of recording, all pages a are numbered starting from 0, all pages b are numbered starting from 0, and the ith page is respectively denoted as page ai and page bi. And only writing pageA in the recording process in the block A, and only writing pageB in the block B. Moreover, in order to ensure the reliability of the information, each block repeatedly writes two pages in the information recording process. pageA (x) of blockA records information = pageA (x + 1) of blockA records information, x is an even sequence number, pageB (x) of blockB records information = pageB (x + 1) of blockB records information, and has: pageAi of blockA records information = pageBi of blockB records information.
According to the data management method provided by the embodiment of the application, a double-block asynchronous recording method is adopted, and when pages with different blocks and the same serial number simultaneously generate UNC (un-simple common code), namely when a first part in a first storage block and a third part in a second storage block simultaneously generate UNC, data can be recorded and read based on a fourth part in the second storage block. The embodiment of the application can ensure that important information can be accurately recorded and read, can repair the NAND information in time to the maximum extent, and ensures that the NAND system cannot be paralyzed due to information recording errors. Therefore, the data management method provided by the embodiment of the application improves the accuracy of data recording.
On the basis of the above embodiment, as a preferred embodiment, the method further includes: when a read command for the target data is received, the last piece of data in the first portion is read. And if the last piece of data in the first part is read wrongly, reading the penultimate piece of data in the first part. And if the last piece of data and the penultimate piece of data in the first part are both read wrongly, reading the last piece of data in the fourth part. And if the last data in the fourth part is read wrongly, reading the penultimate data in the fourth part.
In a specific implementation, the last valid record of blockA is read, and if UNC is not generated, valid information is obtained. And reading the last effective record of the block A, if the UNC exists, reading the penultimate effective information, and if the UNC does not exist, obtaining the effective information. The last two records of reading pageA are UNC; the last two records of blockB are read until a non-UNC record is found.
The embodiment of the application discloses a data management method, and compared with the previous embodiment, the embodiment further explains and optimizes the technical scheme. Specifically, the method comprises the following steps:
referring to fig. 2, a flow diagram illustrating another data management method according to an exemplary embodiment, as shown in fig. 2, includes:
s201: when the first part is full, erasing all data in the first part;
s202: reading the last piece of data in the fourth part, and recording the last piece of data to the first part;
s203: erasing all data in the fourth portion, and synchronizing the last piece of data in the first portion to the fourth portion.
It is understood that the pageA and pageB arrangements of different MLC (Multi-level cell) NAND are not consistent, and the total number may be different. When either pageA in blockA or pageB in blockB has one side written full, the other block is often not yet full. At this point, a synchronization process is performed. For example, if the block A is full, an erasing action is required, the last piece of valid information of the block B is read and updated to the page A0 and the page A1 of the block A, at this time, the block B is erased, and then the valid information of the block A is synchronized to the page B0 and the page B1 of the block B.
On the basis of the above embodiment, as a preferred implementation, the method further includes: and if the second storage block is abnormal in power failure, synchronizing the last piece of data in the first part to the fourth part after the second storage block is powered on.
In the specific implementation, if block A is recorded and block B is not recorded, and power failure occurs, the effective information of block A is synchronized to block B. Under other conditions, if power failure occurs, the last effective record of block A is read after restarting.
An application example provided by the present application is described below, which is illustrated as an L06B NAND, and includes 512 blocks, where each block has 256 pages.
The method comprises the following steps: the method comprises the steps of high-temperature screening, writing all blocks (except bad blocks and block0, block 1) into 0x00, reading out the BER (Bit Error Ratio) of each block at the moment, putting the blocks into a high-temperature box at about 85 ℃ for about one day, re-reading the BER of each block, and selecting two blocks with lower Error rates, namely block A and block B, wherein the blocks are selected in the test as block9 and block20.
Step two: block A writes page A only, if PageB is met, then fill all 1, block B writes page B only, if PageA is met, fill all 1; each piece of valid information is repeated twice for two blocks, i.e., valid information is actually recorded four times.
Step three: and when the block A is full, erasing the block A, synchronizing the information of the block B to the block A, then erasing the block B, and synchronizing the effective information of the block A to the block B.
The following tests are carried out to ensure that accurate data can be obtained:
1. recording single information, reading blockA pageA0 and pageA1 and blockB pageB0 and pageB1, and comparing contents to be consistent;
2. and reading data, and reading the pageA0 to obtain a record if the pageA1 of the blockA returns an error.
3. both records of blockA have errors, and valid records can be read from pageB0 or pageB1 of blockB.
4. And (4) exception handling of the power failure condition.
The high-temperature block screening method, the double-block asynchronous recording method and the synchronization processing after the block is fully written are all used for ensuring that important information can be accurately recorded and read; under the condition that any one party loses data, effective information can be extracted from the other party, even under various abnormal conditions such as power failure and the like, the NAND information can be repaired in time to the greatest extent, and the NAND system is prevented from being paralyzed due to the error of information recording. The robustness and the recording accuracy of the block are enhanced to the maximum extent from the screening stage of the block to the recording process of the information. The method not only solves the problem of information recording error caused by page synchronization error, but also avoids the problems of information loss and the like caused by power failure. In the actual development or test process, if information needs to be recorded, updated or restored in real time, the method can be used for selecting the inter-block transverse and intra-block longitudinal recording methods, so that four effective records can be ensured at the same time, and correct data can be obtained from one or more parties.
In the following, a data management apparatus provided in an embodiment of the present application is introduced, and a data management apparatus described below and a data management method described above may be referred to each other.
Referring to fig. 3, a block diagram of a data management apparatus according to an exemplary embodiment is shown, as shown in fig. 3, including:
a determining module 301, configured to determine a first memory block and a second memory block in a memory;
in this embodiment, two memory blocks with a low error rate are determined in the memory as memory blocks for recording target data, that is, a first memory block a and a second memory block b. As a preferred embodiment, the first memory block and the second memory block are determined in the memory using a high temperature technology screening method.
As a possible implementation, the same target content is written to all memory blocks in the memory; heating the memory, reading the contents of all the memory blocks, and determining the error rate of each memory block by comparing the read contents with the target contents; and determining the two memory blocks with the lowest error rate as a first memory block and a second memory block.
In the implementation, the whole memory is erased, the same target content, for example, all 0 s, is written into all the memory blocks in the memory, and all 1 s are not used as much as possible, because the erased NAND content is all 1 s, and the voltage jump maximization cannot be guaranteed at this time. Putting the memory into a high-temperature box for heating operation for a plurality of hours, taking out the memory, reading the memory, counting the error rate of all memory blocks, selecting two memory blocks with the lowest error rate as a first memory block and a second memory block, and distributing the two memory blocks on odd-even blocks.
As another possible implementation, the same target content is written to all memory blocks in the memory; reading the contents of all the storage blocks, and determining a first error rate of each storage block by comparing the read contents with the target contents; heating the memory, reading the contents of all the memory blocks, and determining a second error rate of each memory block by comparing the read contents with the target contents; and determining two memory blocks with the smallest difference between the first error rate and the second error rate as a first memory block and a second memory block.
In the implementation, the whole memory is erased, the same target content, for example, all 0 s, is written into all the memory blocks in the memory, and all 1 s are not used as much as possible, because the erased NAND content is all 1 s, and the voltage jump maximization cannot be guaranteed at this time. Reading the whole memory to count the error rate of all memory blocks. And putting the memory into a high-temperature box to carry out heating operation for several hours, taking out the memory, carrying out reading operation on the memory, counting the error rate conditions of all memory blocks, and selecting two memory blocks with the minimum error rate difference as a first memory block and a second memory block which are distributed on the odd-even block.
A dividing module 302, configured to divide the first storage block into a first part and a second part according to a preset dividing manner, and divide the second storage block into a third part and a fourth part;
in a specific implementation, the first storage block and the second storage block are divided into two parts according to the same dividing manner, that is, the first storage block is divided into a first part and a second part, and the second storage block is divided into a third part and a fourth part. The first part, the second part, the third part and the fourth part all comprise a plurality of pages, the offset of the first part in the first storage block is the same as the offset of the third part in the second storage block, the offset of the second part in the first storage block is the same as the offset of the fourth part in the second storage block, namely the first part and the third part are easy to simultaneously generate UNC, and the second part and the fourth part simultaneously generate UNC.
A recording module 303, configured to record target data into a first target page and a second target page in the first portion, and a third target page and a fourth target page in the fourth portion; wherein an offset of the first target page in the first portion is the same as an offset of the third target page in the fourth portion, and an offset of the second target page in the first portion is the same as an offset of the fourth target page in the fourth portion.
In a specific implementation, the target data is recorded to a first target page and a second target page in the first part according to the page sequence in the first part, and the target data is recorded to a third target page and a fourth target page in the fourth part according to the page sequence in the fourth part; the second target page is a page subsequent to the first target page, and the fourth target page is a page subsequent to the third target page. The target data in this embodiment may be management information of the memory, where the management information may include bad block information, load balancing information, garbage collection information, and the like, and this embodiment is not particularly limited.
For a block with N pages, the recording mode generally starts at page0 and ends at page (N-1). For example, blockA is divided into a first section pageA and a second section pageB, and blockB is divided into a third section pageA and a fourth section pageB. For convenience of recording, all pages a are numbered from 0, all pages b are also numbered from 0, and the ith page is respectively designated as pageAi and pageBi. And only writing pageA in the recording process in the block A, and only writing pageB in the block B. Moreover, in order to ensure the reliability of the information, each block repeatedly writes two pages in the information recording process. pageA (x) of blockA records information = pageA (x + 1) of blockA records information, x is an even sequence number, pageB (x) of blockB records information = pageB (x + 1) of blockB records information, and has: pageAi of blockA records information = pageBi of blockB records information.
The data management device provided by the embodiment of the application adopts a double-block asynchronous recording method, and when UNC (un-express) occurs to pages with the same sequence number in different blocks at the same time, namely, when UNC occurs to the first part in the first storage block and the third part in the second storage block at the same time, data can be recorded and read based on the fourth part in the second storage block. The embodiment of the application can ensure that important information can be accurately recorded and read, can repair the NAND information in time to the maximum extent, and ensures that the NAND system cannot be paralyzed due to information recording errors. Therefore, the data management device provided by the embodiment of the application improves the accuracy of data recording.
On the basis of the foregoing embodiment, as a preferred implementation manner, the determining module 301 is specifically configured to: the first memory block and the second memory block are identified in the memory using a high temperature technology screening method.
On the basis of the foregoing embodiment, as a preferred implementation manner, the determining module 301 is specifically configured to: writing the same target content to all memory blocks in the memory; reading the contents of all the storage blocks, and determining a first error rate of each storage block by comparing the read contents with the target contents; heating the memory, reading the contents of all the memory blocks, and determining a second error rate of each memory block by comparing the read contents with the target contents; and determining two memory blocks with the smallest difference between the first error rate and the second error rate as a first memory block and a second memory block.
On the basis of the foregoing embodiment, as a preferred implementation manner, the determining module 301 is specifically configured to: writing the same target content to all memory blocks in the memory; heating the memory, reading the contents of all the memory blocks, and determining the error rate of each memory block by comparing the read contents with the target contents; and determining the two memory blocks with the lowest error rate as a first memory block and a second memory block.
On the basis of the foregoing embodiment, as a preferred implementation manner, the recording module 303 is specifically configured to: recording target data to a first target page and a second target page in the first part according to the page sequence in the first part, and recording target data to a third target page and a fourth target page in the fourth part according to the page sequence in the fourth part; the second target page is a page subsequent to the first target page, and the fourth target page is a page subsequent to the third target page.
On the basis of the above embodiment, as a preferred embodiment, the method further includes:
and the first reading module is used for reading the last piece of data in the first part when a reading command of the target data is received.
On the basis of the above embodiment, as a preferred implementation, the method further includes:
and the second reading module is used for reading the penultimate data in the first part if the last data in the first part is read wrongly.
On the basis of the above embodiment, as a preferred embodiment, the method further includes:
and the third reading module is used for reading the last data in the fourth part if the last data and the penultimate data in the first part are both read wrongly.
On the basis of the above embodiment, as a preferred implementation, the method further includes:
and the fourth reading module is used for reading the penultimate data in the fourth part if the last data in the fourth part is read wrongly.
In a specific implementation, the last valid record of blockA is read, and if UNC is not generated, valid information is obtained. And reading the last effective record of the block A, if the UNC exists, reading the penultimate effective information, and if the UNC does not exist, obtaining the effective information. The last two records of reading pageA are UNC; the last two records of blockB are read until a non-UNC record is found.
On the basis of the foregoing embodiment, as a preferred implementation manner, the target data is management information of the memory, and the management information includes any one or a combination of any several items of bad block information, load balancing information, and garbage collection information.
On the basis of the above embodiment, as a preferred embodiment, the method further includes:
the erasing module is used for erasing all data in the first part when the first part is fully written; reading the last piece of data in the fourth part, and recording the last piece of data to the first part; erasing all data in the fourth portion, and synchronizing the last piece of data in the first portion to the fourth portion.
It is understood that the pageA and pageB arrangements for different MLC NAND are not identical and the total number will be different. When either pageA in blockA or pageB in blockB has one side written full, the other block is often not yet full. At this point, a synchronization process is performed. For example, if the block A is full, an erasing action is required, the last piece of valid information of the block B is read and updated to the page A0 and the page A1 of the block A, at this time, the block B is erased, and then the valid information of the block A is synchronized to the page B0 and the page B1 of the block B.
On the basis of the above embodiment, as a preferred implementation, the method further includes:
and the synchronization module is used for synchronizing the last piece of data in the first part to the fourth part after the second storage block is powered on if the second storage block is in power failure abnormity.
In the specific implementation, if block A is recorded and block B is not recorded, and power failure occurs, the effective information of block A is synchronized to block B. Under other conditions, if power failure occurs, the last effective record of block A is read after restarting.
With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
Based on the hardware implementation of the program module, and in order to implement the method according to the embodiment of the present application, an embodiment of the present application further provides an electronic device, and fig. 4 is a structural diagram of an electronic device according to an exemplary embodiment, as shown in fig. 4, the electronic device includes:
a communication interface 1 capable of information interaction with other devices such as network devices and the like;
and the processor 2 is connected with the communication interface 1 to realize information interaction with other equipment, and is used for executing the data management method provided by one or more technical schemes when running a computer program. And the computer program is stored on the memory 3.
In practice, of course, the various components in the electronic device are coupled together by the bus system 4. It will be appreciated that the bus system 4 is used to enable connection communication between these components. The bus system 4 comprises, in addition to a data bus, a power bus, a control bus and a status signal bus. For the sake of clarity, however, the various buses are labeled as bus system 4 in fig. 4.
The memory 3 in the embodiment of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program for operating on an electronic device.
It will be appreciated that the memory 3 may be either volatile memory or nonvolatile memory, and may include both volatile and nonvolatile memory. Among them, the nonvolatile Memory may be a Read Only Memory (ROM), a Programmable Read Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a magnetic random access Memory (FRAM), a magnetic random access Memory (Flash Memory), a magnetic surface Memory, an optical Disc, or a Compact Disc Read-Only Memory (CD-ROM); the magnetic surface storage may be disk storage or tape storage. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of illustration and not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), synchronous Static Random Access Memory (SSRAM), dynamic Random Access Memory (DRAM), synchronous Dynamic Random Access Memory (SDRAM), double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), enhanced Synchronous Dynamic Random Access Memory (ESDRAM), enhanced Synchronous Dynamic Random Access Memory (Enhanced DRAM), synchronous Dynamic Random Access Memory (SLDRAM), direct Memory (DRmb Access), and Random Access Memory (DRAM). The memory 3 described in the embodiments of the present application is intended to comprise, without being limited to, these and any other suitable types of memory.
The method disclosed in the above embodiment of the present application may be applied to the processor 2, or implemented by the processor 2. The processor 2 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 2. The processor 2 described above may be a general purpose processor, a DSP, or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. The processor 2 may implement or perform the methods, steps and logic blocks disclosed in the embodiments of the present application. A general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed in the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium located in the memory 3, and the processor 2 reads the program in the memory 3 and in combination with its hardware performs the steps of the aforementioned method.
When the processor 2 executes the program, the corresponding processes in the methods according to the embodiments of the present application are realized, and for brevity, are not described herein again.
In an exemplary embodiment, the present application further provides a storage medium, i.e. a computer storage medium, specifically a computer readable storage medium, for example, including a memory 3 storing a computer program, which can be executed by a processor 2 to implement the steps of the foregoing method. The computer readable storage medium may be FRAM, ROM, PROM, EPROM, EEPROM, flash Memory, magnetic surface Memory, optical disk, CD-ROM, etc. Memory.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: a removable storage device, a ROM, a RAM, a magnetic or optical disk, or various other media that can store program code.
Alternatively, the integrated units described above in the present application may be stored in a computer-readable storage medium if they are implemented in the form of software functional modules and sold or used as independent products. Based on such understanding, the technical solutions of the embodiments of the present application may be essentially implemented or portions thereof that contribute to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling an electronic device (which may be a personal computer, a server, a network device, etc.) to execute all or part of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a removable storage device, a ROM, a RAM, a magnetic or optical disk, or various other media that can store program code.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (14)
1. A method for managing data, comprising:
determining a first memory block and a second memory block in a memory;
dividing the first storage block into a first part and a second part according to a preset dividing mode, and dividing the second storage block into a third part and a fourth part; wherein the offset of the first portion in the first memory block is the same as the offset of the third portion in the second memory block, and the offset of the second portion in the first memory block is the same as the offset of the fourth portion in the second memory block;
recording target data to a first target page and a second target page in the first part, and a third target page and a fourth target page in the fourth part; wherein the offset of the first target page in the first portion is the same as the offset of the third target page in the fourth portion, and the offset of the second target page in the first portion is the same as the offset of the fourth target page in the fourth portion;
wherein the determining a first memory block and a second memory block in the memory comprises:
determining a first memory block and a second memory block in a memory by using a high-temperature technology screening method; the first storage block and the second storage block are two storage blocks with the smallest error rate difference before and after the heating operation is carried out on the memory, or the first storage block and the second storage block are two storage blocks with the lowest error rate after the heating operation is carried out on the memory.
2. The method of claim 1, wherein determining the first memory block and the second memory block in the memory using high temperature technology screening comprises:
writing the same target content to all memory blocks in the memory;
reading the contents of all the storage blocks, and determining a first error rate of each storage block by comparing the read contents with the target contents;
heating the memory, reading the contents of all the memory blocks, and determining a second error rate of each memory block by comparing the read contents with the target contents;
and determining two memory blocks with the smallest difference between the first error rate and the second error rate as a first memory block and a second memory block.
3. The method of claim 1, wherein determining the first memory block and the second memory block in the memory using high temperature technology screening comprises:
writing the same target content to all memory blocks in the memory;
heating the memory, reading the contents of all the memory blocks, and determining the error rate of each memory block by comparing the read contents with the target contents;
and determining the two memory blocks with the lowest error rate as a first memory block and a second memory block.
4. The data management method of claim 1, wherein the recording of the target data to the first and second target pages of the first portion and the third and fourth target pages of the fourth portion comprises:
recording target data to a first target page and a second target page in the first part according to the page sequence in the first part, and recording target data to a third target page and a fourth target page in the fourth part according to the page sequence in the fourth part; the second target page is a page subsequent to the first target page, and the fourth target page is a page subsequent to the third target page.
5. The data management method of claim 4, wherein the recording of the target data to the first target page and the second target page in the first portion in the page order in the first portion and the recording of the target data to the fourth portion after the third target page and the fourth target page in the page order in the fourth portion further comprises:
when a read command for the target data is received, the last piece of data in the first portion is read.
6. The data management method of claim 5, wherein after reading the last piece of data in the first portion, the method further comprises:
and if the last piece of data in the first part is read wrongly, reading the penultimate piece of data in the first part.
7. The data management method of claim 6, wherein after reading the penultimate data in the first portion, further comprising:
and if the last piece of data and the penultimate piece of data in the first part are both read wrongly, reading the last piece of data in the fourth part.
8. The data management method of claim 7, wherein after reading the last piece of data in the fourth portion, further comprising:
and if the last piece of data in the fourth part is read wrongly, reading the penultimate piece of data in the fourth part.
9. The data management method according to claim 1, wherein the target data is management information of the memory, and the management information includes any one of or a combination of bad block information, load balancing information, and garbage collection information.
10. The data management method of claim 1, wherein the recording target data after the first target page and the second target page in the first portion, and the third target page and the fourth target page in the fourth portion further comprises:
when the first part is full, erasing all data in the first part;
reading the last piece of data in the fourth part, and recording the last piece of data to the first part;
erasing all data in the fourth portion, and synchronizing the last piece of data in the first portion to the fourth portion.
11. The data management method of claim 1, wherein recording the target data after recording the target data to a first target page and a second target page in the first portion and before recording the target data to a third target page and a fourth target page in the fourth portion further comprises:
and if the second storage block is abnormal in power failure, after the second storage block is powered on, synchronizing the last piece of data in the first part to the fourth part.
12. A data management apparatus, comprising:
a determining module for determining a first memory block and a second memory block in a memory;
the dividing module is used for dividing the first storage block into a first part and a second part according to a preset dividing mode and dividing the second storage block into a third part and a fourth part; wherein the offset of the first portion in the first memory block is the same as the offset of the third portion in the second memory block, and the offset of the second portion in the first memory block is the same as the offset of the fourth portion in the second memory block;
a recording module, configured to record target data to a first target page and a second target page in the first portion, and a third target page and a fourth target page in the fourth portion; wherein the offset of the first target page in the first portion is the same as the offset of the third target page in the fourth portion, and the offset of the second target page in the first portion is the same as the offset of the fourth target page in the fourth portion;
wherein the determining module is specifically configured to: determining a first memory block and a second memory block in a memory by using a high-temperature technology screening method; the first storage block and the second storage block are two storage blocks with the smallest error rate difference before and after the heating operation is carried out on the memory, or the first storage block and the second storage block are two storage blocks with the lowest error rate after the heating operation is carried out on the memory.
13. An electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the data management method of any one of claims 1 to 11 when executing said computer program.
14. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the data management method according to any one of claims 1 to 11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211461907.9A CN115509466B (en) | 2022-11-17 | 2022-11-17 | Data management method and device, electronic equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211461907.9A CN115509466B (en) | 2022-11-17 | 2022-11-17 | Data management method and device, electronic equipment and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115509466A CN115509466A (en) | 2022-12-23 |
| CN115509466B true CN115509466B (en) | 2023-03-28 |
Family
ID=84525704
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211461907.9A Active CN115509466B (en) | 2022-11-17 | 2022-11-17 | Data management method and device, electronic equipment and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115509466B (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112256462B (en) * | 2020-10-29 | 2023-07-14 | 浪潮(北京)电子信息产业有限公司 | Service life prediction method, device and medium of NAND Flash memory |
| CN114415961B (en) * | 2022-01-21 | 2023-10-27 | 珠海奔图电子有限公司 | Bad block processing method of Nand flash memory, electronic equipment and storage medium |
| CN114420183A (en) * | 2022-01-24 | 2022-04-29 | 珠海奔图电子有限公司 | Data storage control method, electronic device and storage medium |
-
2022
- 2022-11-17 CN CN202211461907.9A patent/CN115509466B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN115509466A (en) | 2022-12-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7992071B2 (en) | Method for implementing error-correction codes in non-volatile memory | |
| US8411519B2 (en) | Selective retirement of blocks | |
| US7240178B2 (en) | Non-volatile memory and non-volatile memory data rewriting method | |
| TWI645404B (en) | Data storage device and control method for non-volatile memory | |
| US7725646B2 (en) | Method of using a flash memory for a circular buffer | |
| US20090282305A1 (en) | Storage system with data recovery function and method thereof | |
| CN101599305B (en) | Storage system with data repair function and data repair method thereof | |
| TW200921360A (en) | Data preserving method and data accessing method for non-volatile memory | |
| US20180157428A1 (en) | Data protection of flash storage devices during power loss | |
| US9514843B2 (en) | Methods for accessing a storage unit of a flash memory and apparatuses using the same | |
| US20120124442A1 (en) | Storage device failure management | |
| CN100364013C (en) | Method for storing check code in memory and its device | |
| US20160342508A1 (en) | Identifying memory regions that contain remapped memory locations | |
| CN115509466B (en) | Data management method and device, electronic equipment and storage medium | |
| CN105095352B (en) | Data processing method and device applied to distributed system | |
| WO2022156369A1 (en) | Storage block management information synchronous recording method and system, and terminal and storage medium | |
| CN105404475A (en) | Storage management system and method for small-capacity flash in MCU chip | |
| US9286936B1 (en) | Zone based band mapping | |
| CN113625947B (en) | Data error correction method, device, equipment and computer readable storage medium | |
| CN103389943A (en) | Control device, storage device, and storage control method | |
| CN107257281A (en) | NOR FLASH store method, device and the computer-readable recording medium of key data record | |
| CN114203252A (en) | Bad block detection method, device, equipment and storage medium of nonvolatile memory | |
| CN114300026A (en) | Monotonic counter, counting method, electronic device and storage medium | |
| CN114005476A (en) | Flash memory, flash memory erasing and writing counting method, electronic equipment and computer storage medium | |
| CN109542687B (en) | RAID level conversion method and device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |