CN113676023A - Gate drive circuit with controllable switching speed and method - Google Patents
Gate drive circuit with controllable switching speed and method Download PDFInfo
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- CN113676023A CN113676023A CN202110808015.0A CN202110808015A CN113676023A CN 113676023 A CN113676023 A CN 113676023A CN 202110808015 A CN202110808015 A CN 202110808015A CN 113676023 A CN113676023 A CN 113676023A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
Abstract
The invention discloses a gate driving circuit with controllable switching speed, which comprises a switching tube and a main body driving circuit coupled with the switching tube and used for controlling the gate driving of the switching tube; the switching speed control circuit is coupled with the switching tube and is used for controlling the switching frequency of the switching tube; the switching speed control circuit comprises a feedback capacitor coupled with the switching tube; the switching speed control circuit adjusts gate current of the switching tube when the switching tube is switched on and adjusts charging current of the drain-source capacitor when the switching tube is switched off by adjusting the capacitance value of the feedback capacitor, so that the switching speed and the switching-off speed of the switching tube are controlled. The invention enables the switching speed and the switching loss to be matched, and has the characteristics of high response speed, simplicity and reliability.
Description
Technical Field
The invention relates to the field of electronic information, in particular to a gate driving circuit with controllable switching speed and a method.
Background
A Switch Mode Power Supply (SMPS) is a high-frequency Power conversion device. The switch mode power supply is different from a linear power supply, and the switch transistor is used for switching between a full-open mode (saturation region) and a full-close mode (cut-off region) in most cases, and the two modes have the characteristic of low loss, so that the problems of heat and efficiency are solved. But with the attendant electromagnetic interference (EMI) problems caused by high drain-to-source voltage rate of change dv/dt and drain-to-source current rate of change di/dt.
There are many ways to solve the electromagnetic interference problem of the switch mode power supply, and one important means is to reduce the drain-source voltage change rate dv/dt and the drain-source current change rate di/dt from the source by using the transistor drive as the switching point. The most common method is to adjust the gate driving resistance Rg, reduce the driving current and reduce the switching speed; another approach is to shunt capacitance at the gate, which also reduces the turn-on and turn-off speed.
In addition, there is also a method of connecting a capacitor in parallel at the output of the switching tube, such as connecting a capacitor in parallel between the drain and the source of the MOS transistor; the method can reduce the turn-off drain-source voltage change rate dv/dt, and has little influence on the turn-on drain-source voltage change rate dv/dt; this occurs because the drain-source voltage variation rate dv/dt of the MOS transistor at turn-on depends more on the gate parasitic capacitance Cgd. In general, the selection of increasing the gate parasitic capacitance Cgd to reduce the switching speed can indeed effectively reduce the drain-source voltage change rate dv/dt of on and off, but the problem of series connection of upper and lower tubes is easily caused in a half-bridge unit structure, which increases the switching loss slightly and burns out the device heavily, thus reducing the reliability seriously.
Although the traditional method for adjusting the gate driving resistor Rg can reduce the turn-on speed, the traditional method does not sacrifice the switching loss. And, there is essentially only one degree of freedom in changing the gate drive resistance Rg, and the drain-source voltage rate of change dv/dt and the drain-source current rate of change di/dt cannot be independently changed, respectively. For example, the conventional gate driver circuit shown in FIG. 1 is a typical voltage source series resistance driver circuit, i.e., a conventional double pulse circuit, and FIG. 2 shows the corresponding turn-on and turn-off processes.
As shown in fig. 1 and 2, the gate voltage Vgs begins to rise when the drive signal is turned on at a first time t 1; at a second time t2, the gate voltage Vgs reaches the turn-on threshold voltage Vth, and the switching tube Q starts to be turned on; due to the parasitic capacitance and the reverse recovery phenomenon of the diode, the drain-source current isd flowing through the switching tube Q between the second time t2 and the third time t3 has a peak; after the third time t3, the drain-source current isd is approximately equal to the load current, and the drain-source voltage Vds starts to drop to 0 until the fourth time t4 completely drops to 0. Between the third time t3 and the fourth time t4, the gate voltage Vgs is approximately constant, which is referred to as the miller plateau Vpl, and the driving current is driven to flow entirely through the gate parasitic capacitance Cgd. After the fourth time t4, the gate voltage Vgs continues to rise to the steady state, i.e. corresponding to the fifth time t 5.
As shown in fig. 1 and 2, the turn-off process is reversed from the turn-on process. At a sixth time t6, when the driving signal is turned off, the gate voltage Vgs is decreased, and at a seventh time t7, the gate voltage Vgs is equal to the miller plateau voltage Vpl, and the drain-source voltage Vds is increased, the current flowing through the gate parasitic capacitor Cgd is equal to the current flowing through the gate driving resistor Rg. At an eighth time t8, the drain-source voltage Vds rises to a steady voltage, the drain-source current isd begins to drop, and the gate voltage Vgs also gradually drops until a ninth time t9, at which the drain-source current isd drops to 0, the gate voltage Vgs is below the turn-on threshold. From the ninth time t9 to the tenth time t10, the gate voltage Vgs continues to decrease until the tenth time t10 decreases to 0.
The use of a conventional increase in gate drive resistance Rg to mitigate switching speed can make each of the above processes now slower. As shown in fig. 3, during the turn-on process, the dotted line represents the timing corresponding to the increase of the gate driving resistance Rg. As the gate driving resistance Rg is increased, the gate charging current from the turn-on threshold to the Miller platform is reduced, and the process of the drain-source current change rate di/dt is slowed down. Similarly, the current during the miller plateau is limited by the resistor. The drain-source voltage rate of change dv/dt in the gate parasitic capacitance Cgd becomes gentle, while the drain-source voltage rate of change dv/dt in the output voltage and the miller capacitance rate of change are identical.
However, in practical applications, the conducted common film interference sometimes only needs to reduce the drain-source voltage change rate dv/dt, and the adoption of the gate driving resistor Rg adjustment method increases the time of the drain-source current change rate di/dt process, brings extra switching loss, and aggravates the heat dissipation problem. Meanwhile, the method also increases the time delay of opening, and generates potential irrational factors for the stability of control.
Disclosure of Invention
The invention provides a gate driving circuit with controllable switching speed and a method thereof, aiming at the defects in the prior art.
In order to solve the technical problem, the invention is solved by the following technical scheme:
the invention provides a gate electrode driving circuit, comprising: a switching tube; the main body driving circuit is coupled with the switching tube and is used for controlling the gate drive of the switching tube; and the switching speed control circuit is coupled with the switching tube and is used for controlling the switching speed of the switching tube. Wherein the switching speed control circuit comprises a feedback capacitor coupled with the switching tube; the switching speed control circuit adjusts gate current of the switching tube when the switching tube is switched on and adjusts charging current of a drain-source capacitor when the switching tube is switched off by adjusting the capacitance value of the feedback capacitor, so that the switching speed and the switching-off speed of the switching tube are controlled.
Optionally, the switching speed control circuit further includes a first diode and a second diode; the anode of the second diode is coupled with the gate electrode of the switching tube, and the feedback capacitor is coupled between the cathode of the second diode and the drain electrode of the switching tube; the cathode of the second diode is also coupled with the anode of the first diode, and the cathode of the first diode is coupled with the anode of the driving auxiliary power supply.
Optionally, the main body driving circuit comprises a gate driving resistor, a pulse driving source and the auxiliary power supply; the gate driving resistor is coupled between the output end of the pulse driving source and the gate of the switching tube; the gate driving resistor is coupled with a gate of the switching tube; and the grounding electrode of the pulse driving source and the grounding electrode of the auxiliary power supply are coupled with the source electrode of the switch tube.
Optionally, the source of the switching tube is grounded through negative voltage.
Optionally, a first damping resistor or a magnetic bead is electrically connected between the cathode of the second diode and the feedback capacitor, and a common connection between the cathode of the second diode and the first damping resistor is coupled to the anode of the first diode.
Optionally, a second damping resistor or a magnetic bead is electrically connected between the cathode of the second diode and the feedback capacitor, and a common connection between the feedback capacitor and the second damping resistor is coupled to the anode of the first diode.
Optionally, the two ends of the gate driving resistor are connected in parallel with the gate turn-off series circuit; the gate turn-off series circuit comprises a gate turn-off resistor and a fourth diode which are connected in series, wherein the anode of the fourth diode is coupled with the gate of the switching tube, and the cathode of the fourth diode is coupled with the pulse driving source.
The invention also discloses a half-bridge driving circuit, which comprises a first gate driving circuit for driving the upper switching tube and a second gate driving circuit for driving the lower switching tube; the first gate driving circuit and the second gate driving circuit are respectively a gate driving circuit as described in any one of the above.
The invention also discloses a gate electrode driving method for controlling the switching speed of the switching tube by the gate-level driving circuit, which is characterized by comprising the following steps of:
receiving a turn-on signal;
the second diode is conducted, and the current flowing through the feedback capacitor flows to the drain electrode of the switch tube;
in the Miller platform stage of the switching-on, the conducted second diode enables the feedback capacitor to shunt from the gate current of the switching tube, and the gate current of the switching tube during the switching-on is regulated through shunting, so that the voltage change of the switching tube during the switching-on is controlled, and the switching-on speed is controlled;
receiving a shutdown signal;
a first diode is conducted, and the current flowing through the feedback capacitor flows to the first diode;
and in the stage of the change of the turned-off drain-source voltage, the conducted first diode enables the feedback capacitor to be shunted from the charging current of the switch tube, and the charging current of the drain-source capacitor when the switch tube is turned off is adjusted through shunting, so that the voltage change of the switch tube when the switch tube is turned off is controlled, and the turn-off speed is controlled.
Optionally, the method further includes: the on-speed and the off-speed of the switching tube are adjusted by adjusting the capacitance value of the feedback capacitor; the larger the capacitance value of the connected feedback capacitor is, the slower the switching-on speed and the switching-off speed are.
Optionally, the method further includes: the change rate of the drain-source current of the switching tube when the switching tube is switched on is changed through the changed resistance value of the gate electrode driving resistor.
1. Under the condition that the gate drive resistor is fixed, the drain-source voltage change rate of the switch tube is adjusted by adjusting the size of the feedback capacitor, so that the switching speed of the switch tube is adjusted.
2. The invention can reduce the switching speed and simultaneously prevent the loss generated in the switching-on process and the switching-off process from being overlarge, thereby realizing the balance between the switching speed and the switching loss.
3. The invention determines the change rate of the drain-source current, namely the change rate of the drain-source current, by adjusting the resistance value of the gate electrode driving resistor. Therefore, the drain-source current change rate and the drain-source voltage change rate of the switching tube can be independently controlled by the embodiment. The method has the characteristics of high response speed, simplicity and reliability.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a circuit schematic of a conventional gate drive circuit of the background art;
FIG. 2 is a waveform diagram of the turn-on and turn-off process of a conventional gate drive circuit;
FIG. 3 is a waveform of a turn-on process of a conventional gate drive circuit after increasing the gate drive resistance;
FIG. 4 is a circuit schematic of a gate driver circuit according to a first embodiment and a seventh embodiment of the present invention;
FIG. 5 is a schematic diagram showing the current flow during turn-on of the gate driver circuits of the first and seventh embodiments of the present invention;
FIG. 6 is a schematic diagram showing the current flow during turn-off of the gate driver circuit according to the first and seventh embodiments of the present invention;
FIG. 7 is a waveform diagram illustrating the turn-on and turn-off process of the gate driver circuit according to the first and seventh embodiments of the present invention;
FIG. 8 is a schematic circuit diagram of a gate driver circuit according to a second embodiment of the present invention;
FIG. 9 is a schematic circuit diagram of a gate driver circuit according to a third embodiment of the present invention;
FIG. 10 is a schematic circuit diagram of a gate driver circuit according to a fourth embodiment of the present invention;
FIG. 11 is a schematic circuit diagram of a gate driver circuit according to a fifth embodiment of the present invention;
FIG. 12 is a schematic circuit diagram of a gate drive circuit according to a sixth embodiment of the present invention;
FIG. 13 is a schematic diagram showing the steps of a gate driving method according to a seventh embodiment of the present invention
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the description and claims of the present application do not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another.
The term "coupled" or "connected" in this specification includes both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as a connection made through an electrically conductive medium, which may have parasitic inductance or parasitic capacitance; indirect connections may also include connections through other active or passive devices, such as connections through switches, follower circuits, etc., that serve the same or similar functional purpose.
It should be understood that in fig. 4 and 7 referred to in the first and seventh embodiments, the drain-source current ids is denoted by isd in fig. 7, which is the current reversal of the drain-source current ids.
The first embodiment is as follows:
the embodiment discloses a gate driving circuit with controllable switching speed, which can realize independent control of drain-source current change rate di/dt and drain-source voltage change rate dv/dt by adding a small number of devices on the basis of a traditional voltage gate driving circuit, namely can independently change the drain-source voltage change rate dv/dt under the condition of ensuring that the original drain-source current change rate di/dt is not changed, thereby obtaining better balance between the switching speed and the switching loss. Wherein the drain-source current change rate di/dt is the change rate of the drain-source current ids; the drain-source voltage change rate dv/dt is the change rate of the drain-source voltage Vds of the switching tube Q1. The invention can reduce the switching speed and simultaneously prevent the switching loss from being excessively increased. The switching speed of the switching tube Q1 includes an on speed and an off speed.
In one embodiment, as shown in FIG. 4, the gate drive circuit includes a body drive circuit 200, a switching speed control circuit 100, and a switching tube Q1. The main body driving circuit 200 is coupled to the switching tube Q1 and is used for controlling the gate drive of the switching tube Q1; the switching speed control circuit 100 is coupled to the switching tube Q1 and is used for controlling the switching frequency of the switching tube Q1. In addition, the switching speed control circuit 100 includes a feedback capacitor Cfb coupled to the switching transistor Q1, and the switching speed control circuit 100 changes the gate current igs of the switching transistor Q1 when it is turned on and changes the charging current of the drain-source capacitor Cds of the switching transistor Q1 when it is turned off by changing the charging direction and the capacitance of the feedback capacitor Cfb, so as to control the on-speed and the off-speed of the switching transistor Q1, i.e., control the switching speed of the switching transistor Q1.
In one embodiment, as shown in fig. 4, the switching speed control circuit 100 further includes a first diode D1 and a second diode D2. Wherein the anode of the second diode D2 is coupled to the gate of the switching tube Q1, the feedback capacitor Cfb is coupled between the cathode of the second diode D2 and the drain of the switching tube Q1, and the cathode of the second diode D2 is also coupled to the anode of the first diode D1, i.e., the feedback capacitor Cfb, the anode of the first diode D1 and the cathode of the second diode D2 are electrically connected to one terminal; the cathode of the first diode D1 is coupled to the anode of the driving auxiliary power VDD
In one embodiment, as shown in fig. 4, the body driving circuit 200 includes a gate driving resistor Rg, a pulse driving source VPWM, and an auxiliary power source VDD. The gate driving resistor Rg is coupled between the output terminal of the pulse driving source VPWM and the gate of the switching transistor Q1, and the gate driving resistor Rg is also coupled to the anode of the second diode D2, i.e., the gate driving resistor Rg, the gate of the switching transistor Q1, and the anode of the second diode D2 are electrically connected to one end. The grounding electrode of the pulse driving source VPWM and the grounding electrode of the auxiliary power supply VDD are coupled to the source electrode of the switching tube Q1. The main body driving circuit 200 changes the driving current of the switching tube Q1 by changing the resistance of the gate driving resistor Rg. In addition, the drain of the switching tube Q1 is connected to a dc power supply Vdc. The gate driving circuit of this embodiment includes a third diode D3 and a load (the load of this embodiment employs an inductor L), an anode of the third diode D3 is coupled to the drain of the switching transistor Q1, and a cathode of the third diode D3 is coupled to the anode of the dc power source Vdc. The inductor L is connected in parallel across the third diode D3.
During the turn-on process of the switching tube Q1, the operation mode is as shown in the equivalent circuit diagram of fig. 5 and the operation waveform diagram of fig. 7, and the current path is as shown by the dashed line of fig. 5. In fig. 7, the solid line is the turn-on and turn-off process of the present embodiment, and the dotted line portion at the same time coordinate with the solid line is the turn-on and turn-off process of the conventional double pulse circuit for reference. The opening process comprises a first opening stage, a second opening stage and a third opening stage.
A first switching-on stage: during the period from the first time T1 to the third time T3, the operation mode of the gate driving circuit of the present embodiment is not different from that of the conventional gate driving circuit. Therefore, at this stage, the drain-source current change rate di/dt required for turning on the switching tube Q1 can be obtained by adjusting the resistance of the gate driving resistor Rg, where the drain-source current change rate di/dt is the change rate of the drain-source current ids flowing through the switching tube Q1.
A second switching-on stage: during the miller plateau phase from the third time T3 to the fourth time T4, the second diode D2 is turned on. Since the feedback current ifb variation of the feedback capacitor Cfb conforms to the formula: if b is Cfb x (dv1/dt), where "dv 1/dt" in the formula is the rate of change of the feedback voltage across the feedback capacitor Cfb (i.e., the rate of change of the feedback voltage Vfb), "Cfb" in the formula refers to the magnitude of the feedback capacitor Cfb, and "ifb" in the formula refers to the magnitude of the feedback current ifb. The line of the second diode D2 provides a feedback current ifb to the feedback capacitor Cfb, so that the feedback voltage change rate dv1/dt across the feedback capacitor Cfb obtains the feedback current ifb required for its change. Since a part of the current flowing through the gate driving resistor Rg is pumped away by the feedback capacitor Cfb, the gate current igs that should be originally supplied to the switching transistor Q1 is reduced, so that the turn-on speed of the switching transistor Q1 is reduced. The capacitance value of the feedback capacitor Cfb determines the amount of current drawn from the gate of the switching tube Q1; the feedback capacitor Cfb with different capacitance values draws different current from the gate of the switching tube Q1. Therefore, under the condition that the gate driving resistor Rg is fixed, the magnitude of the feedback current ifb obtained by the feedback capacitor Cfb can be adjusted by adjusting the capacitance value of the feedback capacitor Cfb, so that the magnitude of the gate current igs obtained by the switching tube Q1 can be adjusted, the drain-source voltage change rate dv/dt of the switching tube Q1 can be adjusted, and the purpose of adjusting the turn-on speed of the switching tube Q1 is achieved.
Meanwhile, the feedback current ifb flowing through the feedback capacitor Cfb in the second turn-on stage also flows through the switching tube Q1, i.e., flows through the switching tube Q1 from the drain of the switching tube Q1, so that the turn-on current of the switching tube Q1 is increased, and finally the turn-on loss is increased, which is equivalent to the addition of the gate parasitic capacitor Cgd of the switching tube Q1.
A third opening stage: during the period from the fourth time T4 to the fifth time T5, the driving current provided by the pulse driving source VPWM is mainly used to charge the gate parasitic capacitance Cgd of the switching tube Q1, and since the gate-source capacitance Cgs of the switching tube Q1 is much larger than the feedback capacitance Cfb, the period is not different from the conventional driving method.
During the turn-off process, the operation mode of the switching tube Q1 is as shown in the equivalent circuit diagram of fig. 6 and the operation waveform diagram of fig. 7, and the current path is as shown by the dashed arrow of fig. 6, and includes a first turn-off phase, a second turn-off phase and a third turn-off phase.
A first switch-off phase: during the period from the sixth time T6 to the seventh time T7, the operating mode of the gate driving circuit of the present embodiment is not different from that of the conventional driving, so that the drain-source current change rate di/dt of the switching transistor Q1 can be determined by adjusting the resistance of the gate driving resistor Rg at this stage.
A second turn-off phase: during the miller plateau phase at the seventh time T7 to the eighth time T8, the first diode D1 is turned on. According to the feedback current ifb variation formula of the feedback capacitor Cfb, the circuit of the first diode D1 provides the feedback current ifb to the feedback capacitor Cfb, so that the feedback voltage variation rate dv1/dt of the feedback capacitor Cfb obtains the feedback current ifb required by the variation. Since the charge current flowing through the switching tube Q1 is partially drawn by the feedback capacitor Cfb, the charge current that should be originally supplied to the drain-source capacitor Cds of the switching tube Q1 is reduced, and the turn-off speed of the switching tube Q1 is reduced. The capacitance value of the feedback capacitor Cfb determines the current drawn from the charging current of the drain-source capacitor Cds of the switching tube Q1; the feedback capacitor Cfb with different capacitance values has different current magnitudes drawn from the charging current of the drain-source capacitor Cds of the switching tube Q1. Therefore, under the condition that the gate driving resistor Rg is fixed, the magnitude of the feedback current ifb obtained by the feedback capacitor Cfb can be adjusted by adjusting the capacitance value of the feedback capacitor Cfb, so that the magnitude of the charging current obtained by the switching tube Q1 can be adjusted, the drain-source voltage change rate dv/dt of the switching tube Q1 can be adjusted, and the purpose of adjusting the turn-off speed of the switching tube Q1 is achieved.
Meanwhile, since the charging current flowing through the switching tube Q1 is shunted by the feedback capacitor Cfb, the turn-off loss of the switching tube Q1 is reduced, which is equivalent to increasing the drain-source capacitance Cds of the switching tube Q1.
Therefore, during the switching-on process of the switching tube Q1, the effect of the feedback capacitor Cfb to draw current on the switching tube Q1 is equivalent to increasing the gate parasitic capacitance Cgd of the switching tube Q1; during the turn-off process of the switching tube Q1, the effect of the feedback capacitor Cfb current draw on the switching tube Q1 is equivalent to increasing the drain-source capacitance Cds of the switching tube Q1. Therefore, the turn-on loss increased in the second turn-on stage and the turn-off loss reduced in the present stage are partially offset, so that the switching loss is not too large under the condition of reducing the turn-on speed and the turn-off speed, and the balance between the switching speed and the switching loss is finally achieved.
A third off-phase: during the phase from the eighth time T8 to the tenth time T10, the feedback voltage Vfb across the feedback capacitor Cfb is not changed, and the line on which the feedback capacitor Cfb is located is equivalent to an open circuit.
In summary, in the present embodiment, under the condition that the gate driving resistor Rg is fixed, the magnitude of the feedback current ifb obtained by the feedback capacitor Cfb is changed by adjusting the capacitance of the feedback capacitor Cfb, so that the magnitude of the gate current igs obtained by the switching tube Q1 is adjusted in the turn-on process of the switching tube Q1, thereby adjusting the speed of the switching tube Q1 and reducing the turn-on speed; and the magnitude of the charging current obtained by the switching tube Q1 can be adjusted in the switching-off process of the switching tube Q1, so that the switching-off speed of the switching tube Q1 is adjusted, and the switching-off speed is reduced.
The embodiment can reduce the switching-on speed and the switching-off speed, and simultaneously can prevent the loss generated in the switching-on process and the switching-off process from being overlarge, thereby realizing the balance between the switching speed and the switching loss.
In the embodiment, the change rate of the drain-source current ids, i.e., the drain-source current change rate di/dt, is determined by adjusting the resistance of the gate driving resistor Rg. Therefore, the drain-source current change rate di/dt and the drain-source voltage change rate dv/dt of the switching tube Q1 can be independently controlled by the present embodiment. The method has the characteristics of high response speed, simplicity and reliability.
Example two:
in this embodiment, in the high power application field, since the gate threshold voltage is decreased with the temperature increase, in order to further improve the driving reliability of the gate driving circuit, in this embodiment, on the basis of the first embodiment, a turned-off negative voltage is connected between the source of the switching transistor Q1 and the ground terminal of the pulse driving source VPWM, that is, a negative voltage with the source of the switching transistor Q1 being connected to be less than 0 is used as the turned-off voltage Voffset, so that the reliability of the circuit turning-off can be improved. The gate driving circuit in the first embodiment is compatible with the application of the present embodiment, and the reference circuit of the present embodiment is shown in fig. 8.
Example three:
in this embodiment, a damping resistor or a magnetic bead is electrically connected between the cathode of the second diode D2 and the feedback capacitor Cfb, and the common connection between the cathode of the second diode D2 and the first damping resistor R1 (or the magnetic bead) is coupled to the anode of the first diode D1. The reference circuit of this embodiment is shown in fig. 9.
Example four:
in this embodiment, a damping resistor or a magnetic bead is electrically connected between the cathode of the second diode D2 and the feedback capacitor Cfb, and a common connection between the feedback capacitor Cfb and the second damping resistor R2 (or the magnetic bead) is coupled to the anode of the first diode D1. The reference circuit of this embodiment is shown in fig. 10.
In the process of opening the gate driving circuit, the current change speed of the loop where the feedback capacitor Cfb is located is high, and gate oscillation is easily caused, so that the circuit design of the third embodiment or the fourth embodiment can absorb high-frequency oscillation, and harm caused by gate oscillation is reduced.
Example five:
in this embodiment, on the basis of the first embodiment, the gate driving resistor Rg is connected in parallel with the gate turn-off series circuit at two ends. The gate turn-off series circuit comprises a gate turn-off resistor Roff and a fourth diode D4 which are connected in series, wherein the anode of the fourth diode D4 is coupled with the gate of the switching tube Q1, and the cathode of the fourth diode D4 is coupled with the pulse drive source VPWM. The reference circuit of this embodiment is shown in fig. 11. In the embodiment, the on-off parameters can be independently adjusted by adding a gate turn-off resistor Roff, so that the on-off speed can be independently adjusted.
Example six:
the present embodiment discloses a half-bridge driving circuit, which is formed by coupling two gate driving circuits according to the first embodiment. As shown in fig. 12, the present embodiment includes a first gate driving circuit and a second gate driving circuit coupled to each other; the drain of the upper switch transistor Q2 of the first gate driving circuit, the ground of the first pulse driving source VPWM1, and the ground of the first auxiliary power source VDD1 are coupled to each other to form a first common terminal, and the first common terminal is coupled to the source of the lower switch transistor Q3 of the second gate driving circuit.
The first gate driver circuit and the second gate driver circuit each have an advantage that the switching loss is not excessively large while the turn-on speed and the turn-off speed are reduced, that is, each has an advantage of a balance between the switching speed and the switching loss. Therefore, the half-bridge driving circuit of the embodiment has the characteristics of high response speed and less interference, namely has the characteristic of balance between the response speed and the interference resistance.
The first gate driving circuit of this embodiment can reduce the gate current of the upper switching tube Q2 through the first feedback capacitor Cfb1 in the turn-on stage of the upper switching tube Q2, so as to reduce the switching speed, which is equivalent to increasing the gate parasitic capacitance of the upper switching tube Q2; and in the turn-off stage of the upper switch tube Q2, the charging current of the upper switch tube Q2 is reduced through the first feedback capacitor Cfb1, and the turn-off speed is reduced, which is equivalent to increasing the drain-source capacitance of the upper switch tube Q1. The second gate driving circuit has the same features, and thus, is not described in detail. Therefore, the present embodiment can reduce the switching speed of the switching tube while avoiding the risk of the upper tube and the lower tube of the half-bridge driving circuit from being connected in series, thereby improving the reliability of the circuit.
In other embodiments of the half-bridge driving circuit, the first gate driving circuit and the second gate driving circuit may also adopt the gate driving circuit of embodiment two, embodiment three, embodiment four or embodiment five.
This embodiment also discloses a motor system comprising a motor and at least one half-bridge drive circuit as described in this embodiment.
Example seven:
the present embodiment discloses a gate driving method with controllable switching speed, which is applied to the gate driving circuit of the first embodiment, and the method refers to the circuit diagram shown in fig. 4 and the turn-on and turn-off process schematic shown in fig. 7.
The embodiment includes the steps shown in fig. 13, and it should be understood that the order of the steps in the embodiment is only one of the order of the present invention, and other orders may be arranged in other embodiments.
Step S01: the pulse drive source VPWM drives an on signal at a first time T1, and the gate drive circuit receives the on signal.
The gate voltage Vgs of the switching transistor Q1 begins to rise. At a second time T2, the gate voltage Vgs reaches the turn-on threshold voltage Vth, the switching transistor Q1 starts to conduct, and the drain-source current ids starts to rise. Due to the influence of the drain-source capacitance Cds of the switching tube Q1 and the reverse recovery phenomenon of the parasitic diode, the drain-source current ids flowing through the switching tube Q1 has a peak between the second time T2 and the third time T3.
In the process from the first time T1 to the third time T3, the drain-source current change rate di/dt required by the switching tube Q1 to be turned on is met by selecting the gate driving resistor Rg with a proper resistance, wherein the drain-source current change rate di/dt is the change rate of the drain-source current ids flowing through the drain-source capacitor Cds of the switching tube Q1.
Step S02: the second diode D2 is turned on, and the current flowing through the feedback capacitor Cfb flows to the drain of the switching tube Q1.
The current direction of the switching speed control circuit 100 under the action of the turn-on signal is shown in fig. 5.
The on signal is a driving current provided by the pulse driving source VPWM, at this time, the driving current flows from the anode to the cathode of the second diode D2 after flowing through the gate driving resistor Rg, the second diode D2 is turned on, the first diode D1 is turned off, and the turned-on second diode D2 causes a part of the driving current that should originally flow to the gate of the switching tube Q1 to flow to the feedback capacitor Cfb.
Step S03: in the miller plateau stage of the switching-on, the turned-on second diode D2 shunts the feedback capacitor Cfb from the gate current igs of the switching tube Q1, so as to adjust the gate current igs of the switching tube Q1 during the switching-on, and to control the voltage variation of the switching tube Q1 during the switching-on, thereby controlling the switching-on speed of the switching tube Q1. The larger the capacitance value of the connected feedback capacitor Cfb is, the slower the switching-on speed of the switching tube Q1 is.
At a third time T3 when the drain-source current ids is approximately equal to the load current IL, the drain-source voltage Vds of the switching tube Q1 begins to drop and at a fourth time T4 when the drain-source voltage Vds drops to zero. As shown in fig. 4, the load current IL is a current flowing through the inductor L. In addition, during the period from the third time T3 to the fourth time T4, the gate voltage Vgs rises to the miller plateau voltage Vpl and remains approximately constant, so that the miller plateau is performed. In this stage, the driving current provided by the pulse driving source VPWM flows through the gate driving resistor Rg to the gate of the switching transistor Q1, and a part of the driving current that should originally flow through the gate of the switching transistor Q1 flows through the feedback capacitor Cfb due to the turned-on second diode D2, so that the feedback voltage change rate dv1/dt of the feedback capacitor Cfb obtains the feedback current ifb required for the change. Therefore, the gate current igs that should be originally supplied to the switching transistor Q1 is reduced, so that the turn-on speed of the switching transistor Q1 is reduced.
The feedback capacitor Cfb with different capacitance values has different magnitudes of the driving current drawn from the gate of the switching tube Q1. Therefore, under the condition that the gate driving resistor Rg is fixed, the gate current igs obtained by the switching tube Q1 can be adjusted by adjusting the size of the feedback capacitor Cfb, so that the drain-source voltage change rate dv/dt is adjusted, and the purpose of adjusting the turn-on speed of the switching tube Q1 is achieved.
The gate voltage Vgs continues to rise at a fourth time T4 and rises to steady state at a fifth time T5. The driving current provided by the pulse driving source VPWM is mainly used to charge the gate parasitic capacitance Cgd of the switching transistor Q1 in this stage, and since the gate-source capacitance Cgs of the switching transistor Q1 is much larger than the feedback capacitance Cfb, the process in this stage is not different from the conventional driving method.
Step S04: the pulse drive source VPWM drives the off signal to come at a sixth time T6, and the gate drive circuit receives the off signal.
The gate voltage Vgs of the switching transistor Q1 begins to decrease. In the process from the sixth time T6 to the seventh time T7, the drain-source current change rate di/dt required by the switching tube Q1 to be turned on is met by selecting a gate driving resistor Rg with a proper resistance value.
Step S05: the first diode D1 is turned on, and the current flowing through the feedback capacitor Cfb flows to the first diode D1.
Under the action of the turn-off signal, the current direction of the switching speed control circuit 100 is as shown in fig. 6.
The off signal is a driving current provided by the pulse driving source VPWM, and since the off signal and the on signal are opposite in direction, the driving current direction at this time turns off the second diode D2, the first diode D1 is turned on, and the turned on first diode D1 divides a part of the charging current that should originally flow to the switching tube Q1 and flows to the feedback capacitor Cfb.
Step S06: in the stage of the change of the drain-source voltage of the switch-off state, the first diode D1 which is turned on shunts the feedback capacitor Cfb from the charging current of the switching tube Q1, and the voltage change of the switching tube Q1 at the time of the switch-off state is controlled by controlling the charging current of the drain-source capacitor Cds of the switching tube Q1 at the time of the switch-off state, so that the switch-off speed is controlled. The larger the capacitance value of the connected feedback capacitor Cfb is, the slower the turn-off speed is.
At a seventh time T7, the gate voltage Vgs drops to the miller plateau voltage Vpl, at which time the drain-source voltage Vds begins to rise. In this process, since the first diode D1 that is turned on divides the charging current that should originally flow to the switching tube Q1 and flows to the feedback capacitor Cfb, the feedback voltage change rate dv1/dt of the feedback capacitor Cfb obtains the feedback current ifb required for the change. Since the charge current flowing through the switching tube Q1 is partially drawn by the feedback capacitor Cfb, the charge current that should be originally supplied to the drain-source capacitor Cds of the switching tube Q1 is reduced, and the turn-off speed of the switching tube Q1 is reduced. Under the condition that the gate driving resistor Rg is fixed, the magnitude of the charging current obtained by the switching tube Q1 can be adjusted by adjusting the capacitance value of the feedback capacitor Cfb, so that the drain-source voltage change rate dv/dt is adjusted, and the purpose of adjusting the turn-off speed of the switching tube Q1 is achieved.
At an eighth time T8 when the drain-source voltage Vds rises to a steady voltage, the drain-source current ids begins to drop, while the gate voltage Vgs begins to drop, and at a ninth time T9 when the drain-source current ids drops to zero, the gate voltage Vgs is below the turn-on threshold voltage Vth. At the ninth time T9 to the tenth time T10, the gate voltage Vgs continues to decrease and decreases to zero at a tenth time T10. During the phase from the eighth time T8 to the tenth time T10, the feedback voltage Vfb across the feedback capacitor Cfb is not changed, and the line on which the feedback capacitor Cfb is located is equivalent to an open circuit.
In summary, in the present embodiment, under the condition that the gate driving resistor Rg is fixed, the drain-source voltage change rate dv/dt of the open-circuit tube is adjusted by adjusting the magnitude of the feedback capacitor Cfb, so as to adjust the switching speed of the switching tube Q1.
In addition, the embodiment can reduce the switching speed and simultaneously prevent the loss generated in the switching-on process and the switching-off process from being too large, thereby realizing the balance between the switching speed and the switching loss.
In the embodiment, the change rate of the drain-source current ids, i.e., the drain-source current change rate di/dt, is determined by adjusting the resistance of the gate driving resistor Rg. Therefore, the drain-source current change rate di/dt and the drain-source voltage change rate dv/dt of the switching tube Q1 can be independently controlled by the present embodiment. The method has the characteristics of high response speed, simplicity and reliability.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
In summary, the above-mentioned embodiments are only preferred embodiments of the present invention, and all equivalent changes and modifications made in the claims of the present invention should be covered by the claims of the present invention.
Claims (11)
1. A gate electrode driving circuit, comprising:
a switching tube;
the main body driving circuit is coupled with the switching tube and is used for controlling the gate drive of the switching tube; and
the switching speed control circuit is coupled with the switching tube and is used for controlling the switching speed of the switching tube;
wherein the switching speed control circuit comprises a feedback capacitor coupled with the switching tube; the switching speed control circuit adjusts gate current of the switching tube when the switching tube is switched on and adjusts charging current of the drain-source capacitor when the switching tube is switched off by adjusting the capacitance value of the feedback capacitor, so that the switching speed and the switching-off speed of the switching tube are controlled.
2. The gate driver circuit of claim 1, wherein said switching speed control circuit further comprises a first diode and a second diode;
the anode of the second diode is coupled with the gate electrode of the switching tube, and the feedback capacitor is coupled between the cathode of the second diode and the drain electrode of the switching tube;
the cathode of the second diode is also coupled with the anode of the first diode, and the cathode of the first diode is coupled with the anode of the auxiliary power supply.
3. The gate driving circuit according to claim 2, wherein the main body driving circuit comprises a gate driving resistor, a pulse driving source and the auxiliary power source;
the gate driving resistor is coupled between the output end of the pulse driving source and the gate of the switching tube; the gate driving resistor is coupled with a gate of the switching tube; and the grounding electrode of the pulse driving source and the grounding electrode of the auxiliary power supply are coupled with the source electrode of the switch tube.
4. The gate driving circuit of claim 3, wherein the source of the switching tube is grounded via a negative voltage.
5. A gate driver circuit according to claim 3, wherein a first damping resistor or a magnetic bead is electrically connected between the cathode of the second diode and the feedback capacitor, and a common connection between the cathode of the second diode and the first damping resistor is coupled to the anode of the first diode.
6. A gate driver circuit according to claim 3, wherein a second damping resistor or a magnetic bead is electrically connected between the cathode of the second diode and the feedback capacitor, and a common connection between the feedback capacitor and the second damping resistor is coupled to the anode of the first diode.
7. The gate driving circuit of claim 3, wherein the gate driving resistor is connected in parallel across the gate turn-off series circuit; the gate turn-off series circuit comprises a gate turn-off resistor and a fourth diode which are connected in series, wherein the anode of the fourth diode is coupled with the gate of the switching tube, and the cathode of the fourth diode is coupled with the pulse driving source.
8. A half-bridge driving circuit is characterized by comprising a first gate driving circuit for driving an upper switching tube and a second gate driving circuit for driving a lower switching tube; the first gate driving circuit and the second gate driving circuit are respectively the gate driving circuit as claimed in any one of claims 1 to 7.
9. A gate pole driving method is used for controlling the switching speed of a switching tube by a gate pole driving circuit, and is characterized by comprising the following steps:
receiving a turn-on signal;
the second diode is conducted, and the current flowing through the feedback capacitor flows to the drain electrode of the switch tube;
in the Miller platform stage of the switching-on, the conducted second diode enables the feedback capacitor to shunt from the gate current of the switching tube, and the gate current of the switching tube during the switching-on is regulated through shunting, so that the voltage change of the switching tube during the switching-on is controlled, and the switching-on speed is controlled;
receiving a shutdown signal;
a first diode is conducted, and the current flowing through the feedback capacitor flows to the first diode;
and in the stage of the change of the turned-off drain-source voltage, the conducted first diode enables the feedback capacitor to be shunted from the charging current of the switch tube, and the charging current of the drain-source capacitor when the switch tube is turned off is adjusted through shunting, so that the voltage change of the switch tube when the switch tube is turned off is controlled, and the turn-off speed is controlled.
10. The gate drive method of claim 10, further comprising: the on-speed and the off-speed of the switching tube are adjusted by adjusting the capacitance value of the feedback capacitor; the larger the capacitance value of the connected feedback capacitor is, the slower the switching-on speed and the switching-off speed are.
11. The gate drive method of claim 10, further comprising: the change rate of the drain-source current of the switching tube when the switching tube is switched on is changed through the changed resistance value of the gate electrode driving resistor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110808015.0A CN113676023A (en) | 2021-07-16 | 2021-07-16 | Gate drive circuit with controllable switching speed and method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110808015.0A CN113676023A (en) | 2021-07-16 | 2021-07-16 | Gate drive circuit with controllable switching speed and method |
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| CN113676023A true CN113676023A (en) | 2021-11-19 |
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|---|---|---|---|
| CN202110808015.0A Pending CN113676023A (en) | 2021-07-16 | 2021-07-16 | Gate drive circuit with controllable switching speed and method |
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| CN (1) | CN113676023A (en) |
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2021
- 2021-07-16 CN CN202110808015.0A patent/CN113676023A/en active Pending
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