CN113671883B

CN113671883B - Method and device for controlling switch indicator light, single chip microcomputer and storage medium

Info

Publication number: CN113671883B
Application number: CN202110984115.9A
Authority: CN
Inventors: 薛兆井; 王倩
Original assignee: Beijing Armyfly Technology Co Ltd
Current assignee: Beijing Armyfly Technology Co Ltd
Priority date: 2021-08-25
Filing date: 2021-08-25
Publication date: 2023-03-17
Anticipated expiration: 2041-08-25
Also published as: CN113671883A

Abstract

The application relates to the field of industrial control, and provides a method and a device for controlling an indicator light of a switch, a single chip microcomputer and a storage medium. The method of the embodiment of the application can comprise the following steps: acquiring configuration data of the switch, wherein the configuration data comprises a corresponding relation between each bit of the indicator light state information and the working state of the indicator light; sampling the DO signal according to the clock signal so as to record the state information of the indicator lamp in the DO signal into an indicator lamp state array; and generating an indicator lamp state signal according to the corresponding relation and the indicator lamp state array, and outputting the indicator lamp state signal to a corresponding indicator lamp so as to control the indicator lamp in the switch to be lightened according to the corresponding indicator lamp state information. The embodiment of the application can effectively reduce hardware cost, is applicable to various switches and has good universality.

Description

Method and device for controlling switch indicator light, single chip microcomputer and storage medium

Technical Field

The application relates to the field of industrial control, in particular to a method and a device for controlling an indicator light of a switch, a single chip microcomputer and a storage medium.

Background

Each service port of the switch has 2 indicator lights, one of which is called a Link/ACT (Link/ACT) light and which, when illuminated green, indicates that the line is active, and the other indicator light is called a rate (Speed) light and which, when illuminated yellow, indicates that the rate has reached the maximum rate.

Currently, the indicator lights of each service port of the switch are mainly controlled in the following two ways. One implementation is to implement the control of the status of the indicator light by an LED Controller (LED Controller) of a Physical Layer (PHY) chip, which is costly. Another implementation manner is that a serial code stream is output by an LED controller of a switch chip, the serial code stream is processed by a serial-parallel chip or a Complex Programmable Logic Device (CPLD) logic chip to extract a serial signal, and the serial signal is output to each indicator lamp in parallel, so that the flashing, normally-on, or normally-off state of each indicator lamp in the switch can be directly controlled.

Therefore, how to improve the versatility while reducing the cost is an urgent problem to be solved in the lighting scheme of the switch indicator light.

Disclosure of Invention

In view of the above problems in the prior art, the application provides a method, a device, a single chip and a storage medium for controlling an indicator light of a switch, which can effectively reduce hardware cost and improve universality.

In order to achieve the above object, a first aspect of the present application provides a method for controlling an indicator light of a switch, where the method is implemented by a single chip, and the method includes:

acquiring configuration data of a switch, wherein the configuration data comprises a corresponding relation between each bit of indicator light state information and the working state of an indicator light, and the number of bits of the indicator light state information and the corresponding relation are agreed in advance;

sampling a DO signal according to a clock signal so as to record indicator lamp state information in the DO signal to an indicator lamp state array, wherein the clock signal and the DO signal are both from a switching chip of a switch, and the DO signal carries the indicator lamp state information of all service ports in the switch;

and generating an indicator light state signal according to the corresponding relation and the indicator light state array, and outputting the indicator light state signal to a corresponding indicator light so as to control the indicator light in the switch to be lightened according to the corresponding indicator light state information.

Therefore, the single chip microcomputer is used for receiving the CLK signal and the DO signal through the 2 GPIO ports, meanwhile, the single chip microcomputer can record the value of the indicating lamp state information in the DO signal into the indicating lamp state array, corresponding indicating lamp state signals are generated through the indicating lamp state array, and then the state of the indicating lamp of the corresponding service port is updated. So, for solving the operation of lighting up of switch business mouth pilot lamp, provided a brand-new notion and implementation, realize the control of switch pilot lamp promptly through the singlechip, need not to rewrite the procedure to the different switch of hardware design, only modify necessary configuration parameter can, the hardware is with low costs to only need configuration data alright realize the customization of switch pilot lamp control, applicable in the different all kinds of switches of hardware design, the commonality is good.

In some embodiments, the DO signal and the clock signal are periodically output by the switch chip, each period of the periodic output includes one DO signal and M clock signals, M is equal to a product of Q and p, Q is a number of service ports of the switch, p is a number of bits of the indicator light status information, the DO signal includes indicator light status information of Q service ports in the switch, the indicator light status information in the DO signal is sorted according to an identification sequence of the Q service ports, the M clock signals form Q groups of clock signals, and the Q groups of clock signals are sequentially output according to the identification sequence of the Q service ports, each group of clock signals in the Q groups of clock signals includes p consecutive clock signals, and the p consecutive clock signals are in one-to-one correspondence with p bits of the indicator light status information corresponding to an identification of the same service port. Therefore, after the single chip microcomputer 100 acquires the status information of the indicator lamp, a corresponding status signal of the indicator lamp can be generated according to the value of the bit and the corresponding relation between the bit and the status of the indicator lamp, and the control of the Link/Act lamp and the Speed lamp of each service port in the switch is further realized.

In some embodiments, the sampling the DO signal according to the clock signal from the switch chip specifically includes: sampling the DO signal in response to a first interrupt generated by an interrupt system of the single-chip microcomputer at a rising edge of the clock signal. Therefore, the indicator light state information in the DO signal can be extracted bit by bit and recorded in the indicator light state array bit by bit, so that the indicator light state information is consistent with the indicator light corresponding to the final indicator light state signal.

In some embodiments, the configuration data further includes a first interrupt duration, the first interrupt duration is predetermined according to a duration of an interval between adjacent DO signals; the method further comprises the following steps: and responding to timer interruption, controlling a timer of the single chip microcomputer to stop counting within a first interruption time length, and controlling the timer to clear the count, wherein the timer is configured to count the first interruption, and the timer interruption is generated when the time length of the first interruption exceeds a clock cycle of the clock signal through the interruption system. Therefore, when the serial signal of the next period comes, the timer will start counting from 0 again, so that the counting value of the timer will always be consistent with the number of the clock signals, the number of the first interrupts, the number of sampling times and the number of times of writing information into the indicator light state array, and even if an error (such as a clock signal error, a sampling error and the like) occurs in the current period, the indicator light control result of the next period will not be affected, and thus, the method of the embodiment of the application can have an automatic error correction mechanism.

In some embodiments, further comprising: and entering a configuration mode in response to a predetermined trigger signal from an external system, turning off the timer interrupt and the first interrupt in the configuration mode, and re-acquiring configuration data of the switch. Therefore, a user can flexibly update the switch configuration data in the single chip microcomputer through an external signal.

This application second aspect provides a device of control switch pilot lamp, the device sets up in the treater of singlechip, the device includes:

the configuration module is configured to acquire configuration data of the switch, wherein the configuration data comprises a corresponding relation between each bit of the indicator light state information and the working state of the indicator light, and the bit number of the indicator light state information and the corresponding relation are agreed in advance;

the sampling module is configured to sample a DO signal according to a clock signal so as to record indicator lamp state information in the DO signal to an indicator lamp state array, wherein the clock signal and the DO signal are both from a switching chip of a switch, and the DO signal carries the indicator lamp state information of all service ports in the switch;

and the indicating lamp control module is configured to generate indicating lamp state signals according to the corresponding relation and the indicating lamp state array and output the indicating lamp state signals to corresponding indicating lamps so as to control the indicating lamps in the switch to be lightened according to the corresponding indicating lamp state information.

In some embodiments, the DO signal and the clock signal are periodically output by the switch chip, each period of the periodic output includes one DO signal and M clock signals, M is equal to a product of Q and p, Q is a number of service ports of the switch, p is a number of bits of the indicator light status information, the DO signal includes indicator light status information of Q service ports in the switch, the indicator light status information in the DO signal is sorted according to an identification sequence of the Q service ports, the M clock signals form Q groups of clock signals, and the Q groups of clock signals are sequentially output according to the identification sequence of the Q service ports, each group of clock signals in the Q groups of clock signals includes p consecutive clock signals, and the p consecutive clock signals are in one-to-one correspondence with p bits of the indicator light status information corresponding to an identification of the same service port.

In some embodiments, the sampling module is specifically configured to sample the DO signal in response to a first interrupt, the first interrupt being generated by an interrupt system of the single-chip microcomputer at a rising edge of the clock signal.

In some embodiments, the configuration data further includes a first interrupt duration, the first interrupt duration being preset according to an interval duration between adjacent DO signals; the device further comprises: the timer control module is configured to respond to timer interruption, control the timer of the single chip microcomputer to stop counting within a first interruption time length, and control the timer to zero the count; wherein the timer is configured to count the first interrupt; the timer interrupt is generated by the interrupt system when a duration of the first interrupt exceeds a clock period of the clock signal.

In some embodiments, the configuration module is further configured to enter a configuration mode in response to a predetermined trigger signal from an external system, to turn off the timer interrupt and the first interrupt in the configuration mode, and to reacquire configuration data of the switch.

The third aspect of the present application provides a single chip microcomputer, including:

the first GPIO port is configured to receive a DO signal from a switching chip of the switch, wherein the DO signal carries status information of indicator lamps of all service ports in the switch;

the second GPIO port is configured to receive a clock signal from a switching chip of the switch;

each pin is connected with one indicator light of the switch, and N is the number of the indicator lights of all service ports in the switch;

a processor;

and the memory stores program instructions, and the program instructions enable the single chip microcomputer to realize the method for controlling the switch indicator lamp when being executed by the processor.

In some embodiments, the single chip further includes one of:

a third GPIO port configured to receive a predetermined trigger signal from the outside;

a timer configured to count the first interrupt under control of the processor;

an interrupt system configured to generate the first interrupt and the timer interrupt.

A fourth aspect of the present application provides a computer-readable storage medium having stored thereon program instructions that, when executed by a computer, cause the computer to implement the above-described method of controlling switch indicator lights.

This application embodiment utilizes the singlechip can realize the pilot lamp of each business port in the switch and lights the operation, adopts the mode of configuration data alright realize the customization, to the hardware design of different switches, only needs the change configuration array, can conveniently be applied to various customization occasions, and the flexibility is strong, and singlechip hardware is with low costs to the commonality has been promoted in reducing the hardware cost.

Drawings

The various features and the connections between the various features of the present application are further described below with reference to the drawings. The figures are exemplary, some features are not shown to scale, and some of the figures may omit features that are conventional in the art to which the application relates and are not essential to the application, or show additional features that are not essential to the application, and the combination of features shown in the figures is not intended to limit the application. In addition, the same reference numerals are used throughout the specification to designate the same components. The specific drawings are illustrated as follows:

fig. 1 is a schematic diagram of the structure and external connection of a single chip microcomputer according to an embodiment of the present application.

Fig. 2 is a schematic flowchart of a method for controlling an indicator light of a switch according to an embodiment of the present application.

FIG. 3 is an exemplary diagram of the DO signal and the clock signal in an embodiment of the present application.

Fig. 4 is a diagram illustrating an example of a timer operation process according to an embodiment of the present application.

Fig. 5 is a schematic diagram of an exemplary implementation flow of the indication lamp of the single chip microcomputer control switch according to the embodiment of the present application.

Fig. 6 is a schematic structural diagram of an apparatus for controlling switch indicator lights according to an embodiment of the present application.

Detailed Description

The terms "first, second, third, etc. in the description and in the claims, or the like, may be used solely to distinguish one from another and are not intended to imply a particular order to the objects, but rather are to be construed in a manner that permits interchanging particular sequences or orderings where permissible such that embodiments of the present application may be practiced otherwise than as specifically illustrated or described herein.

In the following description, reference numbers indicating steps, such as S110, S120 … …, etc., do not necessarily indicate that the steps are executed in this order, and the order of the preceding and following steps may be interchanged or executed simultaneously, if permitted.

The term "comprising" as used in the specification and claims should not be construed as being limited to the contents listed thereafter; it does not exclude other elements or steps. It should therefore be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, and groups thereof. Thus, the expression "an apparatus comprising the devices a and B" should not be limited to an apparatus consisting of only the components a and B.

Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments, as would be apparent to one of ordinary skill in the art from this disclosure.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. In the case of inconsistency, the meaning described in the present specification or the meaning derived from the content described in the present specification shall control. In addition, the terminology used herein is for the purpose of describing embodiments of the present application only and is not intended to be limiting of the present application.

To accurately describe the technical contents in the present application and to accurately understand the present application, the terms used in the present specification are given the following explanations or definitions before the description of the specific embodiments.

The Single-Chip Microcomputer is an integrated circuit Chip, which is a small and perfect Microcomputer system formed by integrating the functions of a central processing unit with data processing capacity, a random access memory, a read-only memory, various I/O ports, interrupt systems, timers/counters and the like (possibly comprising circuits such as a display driving circuit, a pulse width modulation circuit, an analog multiplexer, an A/D converter and the like) on a silicon Chip by adopting a super-large scale integrated circuit technology, and is widely applied to the field of industrial control.

A switch chip, a core chip of the switch.

A Digital Output (DO), also called DO signal, is an output signal of a switching value.

A General Purpose Input Output (GPIO) signal is a flexible digital signal that is controlled by software.

The following describes the single chip microcomputer and an exemplary embodiment thereof in detail.

Fig. 1 shows a structure and an external schematic diagram of a single chip microcomputer 100 provided in the embodiment of the present application. Fig. 1 shows the structure of the single chip microcomputer 100, and also shows the hardware connection between the single chip microcomputer 100 and the indicator lamp 200 of the service port, and the switch and other parts of the switch chip are omitted.

As shown in fig. 1, the single chip microcomputer 100 may include: a first GPIO port 110, a second GPIO port 120, N pins, a processor 140, and a memory 150. The first GPIO port 110 is configured to receive a DO signal from a switch chip of the switch, where the DO signal carries status information of indicator lamps of all service ports in the switch; the second GPIO port 120 is configured to receive a clock signal (CLK signal) from a switching chip of the switch; each pin 130 of the N pins is connected to one indicator lamp 200 of the switch, N being the number of indicator lamps of all service ports in the switch; the memory 150 stores program instructions that, when executed by the processor 140, cause the single chip microcomputer 100 to implement the method of controlling the switch indicator light described below.

Referring to fig. 1, the single chip microcomputer 100 may further include: and the third GPIO port 160 is configured to receive a predetermined trigger signal from the outside, so that the single chip microcomputer 100 is triggered to enter a configuration mode by an external signal, thereby updating or reconfiguring configuration data of the switch.

Referring to fig. 1, the single chip microcomputer 100 may further include: the timer 170 is configured to count the first interrupt under the control of the processor 140, so as to implement accurate sampling of the DO signal through the counting of the timer 170, so that the indicator light state information of a certain service port in the DO signal is accurately recorded to a corresponding data bit of the indicator light state array, and thus the indicator light state signal finally aiming at the indicator light is consistent with the indicator light state information of the service port.

Referring to fig. 1, the single chip microcomputer 100 may further include: an interrupt system 180 configured to generate a first interrupt of the context and a timer interrupt of the context. The details of the interrupt system 180 can be found in the following description of the method, and are not described herein again.

In some embodiments, since the driving capability of the pin of the mcu is relatively insufficient, in order to avoid the delay in the transmission of the status signal of the indicator due to the insufficient driving capability of the pin of the mcu, a pull-up resistor may be added to the corresponding pin 130 as needed.

In practical application, the number of pins of the single chip microcomputer is limited, and the single chip microcomputer can be selected according to the requirement of practical application (for example, the number N of the indicating lamps in the switch).

In the embodiment of the present application, the input of the single chip microcomputer 100 is the CLK signal and the DO signal output by the switch chip, and the single chip microcomputer 100 samples the DO signal according to a Clock signal line (SCK), and outputs a corresponding indicator light state signal to an indicator light of a corresponding service port according to the indicator light state information obtained by sampling. Specifically, the single chip microcomputer 100 receives the CLK signal and the DO signal through 2 GPIO ports, and meanwhile, the single chip microcomputer 100 may generate a first interrupt to the CLK signal in a rising edge interrupt manner on software, and when the first interrupt is generated, a value of indicator light state information in the DO signal is recorded in the indicator light state array, so that a corresponding indicator light state signal is generated through the indicator light state array, and the state of an indicator light of a corresponding service port is updated. So, for solving the operation of lighting up of switch business mouth pilot lamp, provided a brand-new notion and implementation, realize the control of switch pilot lamp promptly through the singlechip, not only the hardware is with low costs to only need the configuration data alright realize the customization of switch pilot lamp control, applicable all kinds of switches different in the hardware design, the commonality is good.

The method for controlling the switch indicator light of the single chip microcomputer 100 according to the embodiment of the present application will be described in detail below.

Fig. 2 is a schematic flow chart illustrating a method for controlling an indicator light of a switch in an embodiment of the present application, where the method is implemented by the above-mentioned single chip microcomputer 100. Referring to fig. 2, the method may include:

step S210, obtaining configuration data of the switch, wherein the configuration data comprises a corresponding relation between each bit of the indicator light state information and the working state of the indicator light, and the bit number and the corresponding relation of the indicator light state information are agreed in advance;

step S220, sampling the DO signal according to the clock signal so as to record the state information of the indicator lamps in the DO signal into an indicator lamp state array, wherein the clock signal and the DO signal are both from a switching chip of the switchboard, and the DO signal carries the state information of the indicator lamps of all service ports in the switchboard;

and step S230, generating an indicator lamp state signal according to the corresponding relation and the indicator lamp state array, and outputting the indicator lamp state signal to a corresponding indicator lamp so as to control the indicator lamp in the switch to be lightened according to the corresponding indicator lamp state information.

In some embodiments, the DO signals and the clock signals are periodically output by a switch chip, each period of the periodic output includes a DO signal and M clock signals, M is equal to a product of Q and p, Q is a number of service ports of the switch, p is a number of bits of the indicator light status information, the DO signal includes indicator light status information of Q service ports in the switch, the indicator light status information in the DO signal is sorted according to an identification sequence of the Q service ports (for example, pN — p0 shown in fig. 3 below), the M clock signals form Q groups of clock signals, and the Q groups of clock signals are sequentially output according to the identification sequence of the Q service ports, each group of the Q groups of clock signals includes p consecutive clock signals, and the p consecutive clock signals are in one-to-one correspondence with p bits of the indicator light status information corresponding to the same service port identification. For example, as shown in fig. 3 below, if N =32,p =4, then M =128, that is, each cycle, the switch chip outputs a DO signal and 128 clock signals, where the DO signal includes indicator light state information of 32 service ports, and the indicator light state information of each service port in the DO signal is sorted according to a default service port identifier sequence, and accordingly, the 128 clock signals form 32 groups of clock signals, the 32 groups of clock signals are sequentially output according to the default service port identifier sequence, and each group of clock signals in the 32 groups of clock signals includes 4 consecutive clock signals, that is, each service port identifier corresponds to 4 consecutive clock signals, and each service port identifier corresponds to one indicator light state information including 4 bits, so that 4 consecutive clock signals corresponding to one service port identifier and 4 bits of the indicator light state information corresponding to the service port identifier in the DO signal can be synchronously output.

Fig. 3 shows an exemplary diagram of the DO signal and the clock signal. The switching chip controls the Link/Act lamps and the Speed lamps of the service ports to be output through a periodic serial code stream, in the example of fig. 3, pN refers to the number of the service ports of the switching chip, and N is the number of the service ports of the switching chip. Assuming that the switch chip has 32 service ports, i.e., N =31, p31 to p0 are respectively identifiers of the 32 service ports, the DO signal includes status information of the indicator lights of the 32 service ports, and assuming that it is agreed in advance that the status information of the indicator lights of each service port may have p bits, i.e., the status of the indicator lights of each service port is controlled by p bits, in some examples, p may be 4, 6 or another value, and p may be agreed in advance and may be configured by the switch chip. In the example of fig. 3, it is assumed that p =4, that is, the indicator light status information of each service port has 4 bits, the 4 bits are labeled as b 3-b 0, the correspondence between the 4 bits b 3-b 0 and the indicator light status may be agreed in advance and configured into the single chip microcomputer 100 through configuration data, and after the single chip microcomputer 100 acquires the indicator light status information, the single chip microcomputer 100 may generate a corresponding indicator light status signal according to the value of the bit and the correspondence between the 4 bits and the indicator light status, thereby implementing control of the Link/Act light and the Speed light of each service port in the switch.

For example, the correspondence between the 4 bits b 3-b 0 and the status of the indicator light may include the following information: b3 is a Speed lamp; b2 is a Link signal; b1 is an Active signal; b3=1,speed lamp lit normally yellow; b3=0,speed lamp off; b2=1, link/ACT lamp normally lit green; b1=1, link/ACT lamp lit green.

In the example of fig. 3, since the switch chip only supports 4 bits of indicator light status information per traffic port, p =4. In other applications, if the switch chip supports 6 bits of indicator light status information per traffic port, p =6 may be taken. No matter what the value of p is, the relevant specific implementation details are the same and are not described in detail.

In step S210, the configuration data may be stored in the memory 150 of the mcu 100 in advance in the form of a configuration file. The configuration data may include, but is not limited to, the correspondence between the indicator light status information and the indicator light status, the number of service ports of the switch, the identification of each service port (e.g., p31 to p0 in fig. 3), the first interrupt duration, and the like. In practical applications, the content of the configuration data can be configured according to actual requirements and hardware design of the switch. Therefore, the switch indicator lamp control customization can be realized by updating the configuration data, and the switch indicator lamp control customization method is applied to various switches with different hardware designs.

In step S220, the DO signal may be sampled by interrupting the sampling at the rising edge according to the clock signal. That is, step S210 may include: the DO signal is sampled in response to a first interrupt generated by the interrupt system 180 of the single chip 100 on the rising edge of the clock signal. Specifically, a first interrupt is generated when a rising edge of each clock signal in the M clock signals arrives, and the DO signal is sampled once every time the first interrupt is generated, so that the indicator light state information in the DO signal can be extracted bit by bit and recorded in the indicator light state array bit by bit, so that the indicator light state information is consistent with the indicator light corresponding to the final indicator light state signal.

Still referring to fig. 3 above as an example, when a rising edge of each clock signal among 128 clock signals arrives, a first interrupt is generated, and the DO signal is sampled once every time the first interrupt is generated, that is, the DO signal is sampled 128 times in sequence according to a clock period of the clock signal, a value of one bit of the indicator light state information of one service port is extracted every time, and the value of the bit is recorded in the indicator light state array, so that the value in the indicator light state array can be recorded in the indicator light state array according to the sequence of the indicator light state information in the DO signal, and the value in the indicator light state array can be made to be consistent with the indicator light state information in the DO signal, and then the indicator light state signal consistent with the indicator light state information in the DO signal is generated and output to a corresponding indicator light.

In some embodiments, the indicator light status array may be a one-dimensional array or a two-dimensional array, and the recorded indicator light status information includes a service port identifier (e.g., p31 to p0 in fig. 3), and a value of each bit. For example, the indicator light status array may be a two-dimensional array, the abscissa of which may be the traffic port identification and the ordinate may be the identification of the bits in the indicator light status information (e.g., b 3-b 0 in fig. 3). Still taking fig. 3 as an example, the elements in the indicator light status array may be represented as array [ x ] [ y ], where x represents the service port identifier, taking one of p31 to p0, y represents the bit, and taking one of b3 to b0. As another example, the light status array may be a one-dimensional array in which the data is sorted in the order of the light status information in the DO signal. Taking fig. 2 and fig. 3 as an example, the status information of the indicator lamp in the DO signal in fig. 2 is: PNb3, PNb2, PNb1, PNb0, PN-1b3, PN-1b2, PN-1b1, PN-1b0, … …, P0b3, P0b2, P0b1 and P0b0, then a single data in the indicator light state array can be represented as xy, x is a service port identifier, one of PN-P0 is taken, y is a bit identifier, one of b 3-b 0 is taken, the sequence of each array in the indicator light state array is sequenced from large to small according to the service port identifier, and is sequenced from large to small according to the bit identifier when the same service port identifier is used, namely the indicator light state information in the indicator light state array is still recorded as PNb3, PNb2, PNb1, PNb0, PN-1b3, PN-1b2, PN-1b0, … …, P0b3, P0b2, P0b0 and P0b0.

In step S230, data corresponding to the service port identifier of the current service port may be extracted from the indicator light status array, an indicator light status signal is generated according to a value of the data and an indicator light status corresponding to the value in the correspondence, where the indicator light status signal may be, but is not limited to, a high level signal and a low level signal, and the indicator light status signal is output to a corresponding indicator light of the service port through a corresponding pin 130, and the indicator light is turned on in response to the indicator light status signal (i.e., the high level signal or the low level signal), that is, operations such as flashing, normally on, or normally off are performed. Thus, the lighting operation of the indicator lamps of the service ports in the switch can be realized by executing the processing on each service port of the switch one by one.

Still taking fig. 2 and fig. 3 as an example, taking the service port P31 as an example, extracting the relevant data of P31 from the indicator light state array, assuming that b3=1, b2=1, b1=0, and b0=0 in these data, it is known from the above correspondence that "b3=1, speed light is turned on in yellow; b2=1, the Link/ACT lamp is normally turned on green ", the high level signal for the Speed lamp of the service port P31 is generated in step S230 and is output to the Speed lamp of the service port P31 through a pin connected to the Speed lamp, the Speed lamp of the service port P31 is turned on yellow, the high level signal for the Link/ACT lamp of the service port P31 may be generated and is output to the Link/ACT lamp of the service port P31 through a pin connected to the Link/ACT lamp, and the Link/ACT lamp of the service port P31 is turned on green. The processing of other service ports is the same, and is not described again.

For the processing of serial signals, it is critical to handle interrupts and samples. In step S220, the first interrupt based on the clock signal and the sampling for the DO signal are controlled by a timer. In other words, the timer 170 of the single chip microcomputer 100 counts the clock signal from the switch chip, counts the first interrupt based on the clock signal, counts the sampling of the DO signal, and counts the data written in the indicator status array, so that the interrupt system 180 and the processor 140 can synchronously operate according to the serial signal (i.e., the clock signal and the DO signal) from the switch chip through the timer, thereby implementing the method of the embodiment of the present application.

In some embodiments, the configuration data of the switch may include a first interrupt duration, and the first interrupt duration is predetermined according to the interval duration between adjacent DO signals. The method for controlling the switch indicator light may further include: in response to the timer interrupt, the timer 170 controlling the single chip microcomputer 100 stops counting for the first interrupt duration, and controls the timer 170 to clear the count. Where the timer interrupt is generated by interrupt system 180 when the duration of the first interrupt exceeds the clock period of the clock signal.

Since the serial signals (i.e., the clock signal and the DO signal) output by the switch chip are periodic, the head of each period needs to be found in real time to avoid errors. In some embodiments, the first clock signal of each cycle may be found by means of a timer interrupt. Specifically, if the rising edge interrupt sampling method is adopted, the interrupt interval of the first interrupt is relatively short every time in a complete cycle, so that the timer needs to be reset every time in the interrupt function of the first interrupt, that is, the timer does not interrupt and still maintains the working state when the first interrupt is generated. When one period is finished, a new first interrupt will not be generated within a relatively long time interval, a timer interrupt can be generated at the time, the timer is controlled to stop counting and interrupt for a preset time length, the preset time length is the first interrupt time length, and the timer is controlled to clear the counting. Thus, when the serial signal of the next cycle arrives, the timer will start counting from 0 again, so that the counting value of the timer will always be consistent with the number of the clock signals, the number of the first interrupts, the number of sampling times and the number of times of writing information into the indicator light state array, and even if an error (for example, an error occurs in the clock signals, an error in sampling, etc.) occurs in the current cycle, the indicator light control result of the next cycle will not be affected.

The first interrupt duration may be preset according to an interval duration between adjacent DO signals, that is, may be determined according to an interval duration of a serial cycle of the switch chip. In some embodiments, the first interrupt duration is less than the interval duration between adjacent DO signals but greater than a preset threshold, and the threshold is at least greater than the interrupt duration of the first interrupt, so that a situation that the first interrupt and the timer interrupt occur simultaneously can be avoided, which is beneficial to reducing the software processing complexity of the single chip microcomputer and further reducing the cost. For example, assuming that the interval between each serial cycle of the switch chip (i.e., the interval duration between adjacent DO signals) is 20ms, the first interrupt duration may be a value greater than 10ms, less than 20ms, for example, 18ms, 15ms, or other values.

Fig. 4 is a diagram illustrating an example of a timer operation process of a method according to an embodiment of the present application. In the example of fig. 4, the switch has 32 traffic ports, each of which supports 4 bits of light status information. Referring to fig. 4, in each serial cycle, the switching chip outputs 128 clock signals (CLK) and a DO signal (not shown), when each clock signal arrives, a first interrupt is generated at its rising edge, the count of the timer is increased by 1 in each first interrupt, and the interrupt of the timer is reset, the timer of each serial cycle starts counting from 0, and 127 is counted at the maximum count value, and the count value of the timer of each serial cycle is consistent with the number of clock signals input to the single chip microcomputer 100. After each serial cycle is finished, a Timer (Timer) generates a longer interrupt, wherein the interrupt duration is the first interrupt duration, and the count (Tick) of the Timer is cleared at the same time. Therefore, the first clock signal of each serial cycle can be accurately determined through timer interruption and counting zero clearing of the timer, each serial cycle is independently counted, different serial cycles are not affected by each other, and therefore the method of the embodiment of the application has an automatic error correction mechanism, and the single chip microcomputer 100 has automatic error correction capacity.

In some embodiments, the method of controlling the switch indicator light may further include: and entering a configuration mode in response to a predetermined trigger signal from an external system, turning off the timer interrupt and the first interrupt in the configuration mode, and re-acquiring configuration data of the switch. Therefore, the user can flexibly update the switch configuration data in the singlechip 100 through the external signal.

Fig. 5 shows an exemplary implementation flow diagram of the single chip microcomputer 100 controlling the switch indicator light. Referring to fig. 5, a specific implementation process of the single chip microcomputer 100 for controlling the switch indicator lamp may include the following steps:

and step S510, starting the single chip microcomputer.

Step S520, the single chip reads configuration data, where the configuration data may include a Timer period, the number of service ports of the switch, and status information of the indicator light of each service port, and the configuration data may be adapted according to an application scenario.

Step S530, entering into while circulation, reading the state information of the indicator lamp from the state array of the indicator lamp, controlling the state of the indicator lamp by using the state information of the indicator lamp, and updating the state of the indicator lamp;

step S540, according to the next clock signal from the switch chip, executing a first interrupt (SCK interrupt), performing a sampling on the DO signal from the switch chip, obtaining the indicator light state information of the next bit and updating the indicator light state array, counting by the timer and adding by 1, resetting the timer in the first interrupt, and continuing step S530.

In step S550, after the last clock signal, that is, the interrupt duration of the first interrupt exceeds the clock cycle of the clock signal, the current serial cycle is ended, timer interrupt is executed, the count (Tick) of the Timer is cleared, and the process returns to step S530 to enter the next serial cycle.

Step S560, judging whether entering into configuration mode, if yes, continuing step S570, otherwise returning to step S530, entering into next serial cycle;

specifically, if a predetermined trigger signal is received from the outside, the configuration parameter command line is entered, and then the configuration mode is entered. If a predetermined trigger signal is not received from the outside, the configuration mode need not be entered.

Step S570, entering a configuration mode, closing CLK interruption and Timer interruption, and setting and saving switch configuration data.

According to the method, the switch indicator lamp is lightened by the single chip microcomputer, customization can be achieved by adopting a configuration file mode, only one configuration file needs to be changed for different hardware designs each time, graphical selection is achieved through software when the configuration file is generated, the method is conveniently applied to various customization occasions, the cost of the single chip microcomputer is low, and the method is applicable to various switches.

Fig. 6 shows an apparatus 600 for controlling switch indicator lights according to an embodiment of the present application, where the apparatus 600 may be implemented by software, hardware, or a combination of the two, and the apparatus 600 may be implemented by the processor 140 of the single chip 100 or disposed in the processor 140 of the single chip 100.

Referring to fig. 6, the apparatus 600 for controlling the switch indicator lamp may include:

a configuration module 610 configured to obtain configuration data of the switch, where the configuration data includes a corresponding relationship between each bit of the indicator light status information and an indicator light operating status, and the bit number of the indicator light status information and the corresponding relationship are agreed in advance;

the sampling module 620 is configured to sample a DO signal according to a clock signal, so as to record indicator lamp state information in the DO signal into an indicator lamp state array, where the clock signal and the DO signal both come from a switch chip of a switch, and the DO signal carries the indicator lamp state information of all service ports in the switch;

and the indicator lamp control module 630 is configured to generate an indicator lamp state signal according to the corresponding relationship and the indicator lamp state array, and output the indicator lamp state signal to a corresponding indicator lamp, so as to control the indicator lamp in the switch to be turned on according to the corresponding indicator lamp state information.

In some embodiments, the sampling module 620 is specifically configured to sample the DO signal in response to a first interrupt, where the first interrupt is generated by an interrupt system of the single chip at a rising edge of the clock signal.

In some embodiments, the configuration data further includes a first interrupt duration, the first interrupt duration is predetermined according to a duration of an interval between adjacent DO signals; the apparatus 600 further comprises: the timer control module 640 is configured to respond to timer interruption, control the timer of the single chip microcomputer to stop counting within a first interruption duration, and control the timer to zero the count; wherein the timer is configured to count the first interrupt; the timer interrupt is generated by the interrupt system when a duration of the first interrupt exceeds a clock period of the clock signal.

In some embodiments, the configuration module 610 is further configured to enter a configuration mode in response to a predetermined trigger signal from an external system, to turn off the timer interrupt and the first interrupt in the configuration mode, and to retrieve configuration data of the switch.

Compared with an FPGA or a serial-parallel conversion chip, the embodiment of the application has the following advantages:

1. different switches are designed aiming at hardware, and only necessary configuration parameters are modified without rewriting programs.

2. The cost is low, the flexibility is strong, and the universality is good.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The present embodiments also provide a computer-readable storage medium, on which a computer program is stored, the program being used for executing a method for controlling switch indicator lights when executed by a processor, the method including at least one of the solutions described in the above embodiments.

The computer storage media of the embodiments of the present application may take any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

Computer program code for carrying out operations for aspects of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C + +, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present application and the technical principles employed. It will be understood by those skilled in the art that the present application is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the application. Therefore, although the present application has been described in more detail with reference to the above embodiments, the present application is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present application.

Claims

1. A method for controlling an indicator light of a switch is characterized in that the method is realized by a single chip microcomputer, and the method comprises the following steps:

acquiring configuration data of a switch, wherein the configuration data comprises a corresponding relation between each bit of indicator light state information and the working state of an indicator light, and the bit number of the indicator light state information and the corresponding relation are agreed in advance;

sampling a DO signal according to a clock signal so as to record the state information of an indicator lamp in the DO signal to an indicator lamp state array, wherein the clock signal and the DO signal are both from a switching chip of a switch, and the DO signal carries the state information of the indicator lamps of all service ports in the switch;

generating an indicator lamp state signal according to the corresponding relation and the indicator lamp state array, and outputting the indicator lamp state signal to a corresponding indicator lamp so as to control the indicator lamp in the switch to be turned on according to the corresponding indicator lamp state information; the DO signal and the clock signal are periodically output by the switching chip, each period of the periodic output comprises one DO signal and M clock signals, M is equal to the product of Q and p, Q is the number of service ports of the switch, p is the bit number of the indicating lamp state information, the DO signal comprises indicating lamp state information of Q service ports in the switch, the indicating lamp state information in the DO signal is sequenced according to the identification sequence of the Q service ports, the M clock signals form Q groups of clock signals, the Q groups of clock signals are sequentially output according to the identification sequence of the Q service ports, each group of clock signals in the Q groups of clock signals comprises p continuous clock signals, and the p continuous clock signals are in one-to-one correspondence with p bits in the indicating lamp state information corresponding to the same service port identification.

2. The method of claim 1, wherein sampling the DO signal according to the clock signal from the switch chip comprises: sampling the DO signal in response to a first interrupt generated by an interrupt system of the single-chip microcomputer on a rising edge of the clock signal.

3. The method of claim 2,

the configuration data further comprises a first interruption time length, and the first interruption time length is preset according to the interval time length between the adjacent DO signals;

the method further comprises the following steps: and responding to timer interruption, controlling a timer of the single chip microcomputer to stop counting within a first interruption time length, and controlling the timer to clear the count, wherein the timer is configured to count the first interruption, and the timer interruption is generated when the time length of the first interruption exceeds a clock cycle of the clock signal through the interruption system.

4. The method of claim 3, further comprising:

and entering a configuration mode in response to a predetermined trigger signal from an external system, turning off the timer interrupt and the first interrupt in the configuration mode, and re-acquiring configuration data of the switch.

5. The utility model provides a device of control switch pilot lamp which characterized in that, the device sets up in the treater of singlechip, the device includes:

the indicating lamp control module is configured to generate indicating lamp state signals according to the corresponding relation and the indicating lamp state array, and output the indicating lamp state signals to corresponding indicating lamps so as to control the indicating lamps in the switchboard to be lightened according to the corresponding indicating lamp state information;

the DO signal and the clock signal are periodically output by the switching chip, each period of the periodic output comprises one DO signal and M clock signals, M is equal to the product of Q and p, Q is the number of service ports of the switch, p is the bit number of the indicator light state information, the DO signal comprises the indicator light state information of Q service ports in the switch, the indicator light state information in the DO signal is sequenced according to the identification sequence of the Q service ports, the M clock signals form Q groups of clock signals, the Q groups of clock signals are sequentially output according to the identification sequence of the Q service ports, each group of clock signals in the Q groups of clock signals comprises p continuous clock signals, and the p continuous clock signals are in one-to-one correspondence with p bits in the indicator light state information corresponding to the same service port identification.

6. The apparatus of claim 5, wherein the sampling module is specifically configured to sample the DO signal in response to a first interrupt generated by an interrupt system of the single-chip microcomputer at a rising edge of the clock signal.

7. The apparatus of claim 6,

the configuration data further comprises a first interruption duration, and the first interruption duration is preset according to the interval duration between adjacent DO signals;

the device further comprises: the timer control module is configured to respond to timer interruption, control the timer of the single chip microcomputer to stop counting within a first interruption time length, and control the timer to zero the counting; wherein the timer is configured to count the first interrupt; the timer interrupt is generated by the interrupt system when a duration of the first interrupt exceeds a clock period of the clock signal.

8. The apparatus of claim 7, wherein the configuration module is further configured to enter a configuration mode in response to a predetermined trigger signal from an external system, to shut down the timer interrupt and the first interrupt in the configuration mode, and to reacquire configuration data of the switch.

9. A single chip microcomputer is characterized by comprising:

a processor;

a memory storing program instructions that, when executed by the processor, cause the single-chip microcomputer to implement the method of any one of claims 1 to 4.

10. The single-chip microcomputer according to claim 9, wherein the single-chip microcomputer further comprises one of:

a timer configured to count the first interrupt under control of the processor;

11. A computer-readable storage medium having stored thereon program instructions, which, when executed by a computer, cause the computer to carry out the method of any one of claims 1 to 4.