CN113665011A - Preparation method of silicon wafer, silicon wafer and battery - Google Patents
Preparation method of silicon wafer, silicon wafer and battery Download PDFInfo
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- CN113665011A CN113665011A CN202110878150.2A CN202110878150A CN113665011A CN 113665011 A CN113665011 A CN 113665011A CN 202110878150 A CN202110878150 A CN 202110878150A CN 113665011 A CN113665011 A CN 113665011A
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- B28—WORKING CEMENT, CLAY, OR STONE
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Abstract
The application discloses a preparation method of a silicon wafer, the silicon wafer and a battery, and relates to the technical field of solar photovoltaic. The preparation method of the silicon wafer comprises the following steps: cutting the silicon rod along the direction parallel to the axis of the silicon rod to obtain at least two cuboid square rods; and slicing the cuboid square rod along the direction parallel to the end face of the cuboid square rod to obtain a plurality of rectangular silicon wafers. In the embodiment of the application, in the process of preparing the silicon wafer by the method, the cutting difficulty of the silicon wafer can be effectively reduced, the cutting quality of the silicon wafer is effectively improved, and the silicon wafer is more beneficial to light and thin cutting.
Description
Technical Field
The application belongs to the technical field of solar photovoltaic, and particularly relates to a preparation method of a silicon wafer, the silicon wafer and a battery.
Background
With the development of photovoltaic technology, solar energy is widely popularized as a green, environment-friendly and renewable energy source. Monocrystalline silicon wafers for solar cells are generally cut from silicon rods. In order to take account of the material utilization rate of the silicon rod and ensure the photoelectric efficiency of the subsequent photovoltaic module, a round silicon rod is generally squared to obtain a square rod, and then the square rod is sliced to obtain a silicon wafer so as to prepare a solar cell with a larger size.
In the prior art, the generating efficiency of the photovoltaic module is improved usually by increasing the size of the silicon wafer. However, the larger the size of the wafer, the more difficult it is to cut.
Disclosure of Invention
The embodiment of the application aims to provide a preparation method of a silicon wafer, the silicon wafer and a battery, and can solve the problems of high difficulty and low efficiency in cutting large-size silicon wafers.
In a first aspect, an embodiment of the present application provides a method for preparing a silicon wafer, including:
cutting the silicon rod along the direction parallel to the axis of the silicon rod to obtain at least two cuboid square rods;
and slicing the cuboid square rod along the direction parallel to the end face of the cuboid square rod to obtain a plurality of rectangular silicon wafers.
Optionally, the area of the rectangular silicon wafer is at least 1/10 of the area of the end face of the silicon rod.
Optionally, the step of slicing the cuboid square rod to obtain a plurality of rectangular silicon wafers further comprises:
and under the condition that the end surface of the cuboid square rod is rectangular, the cutting line is parallel to the direction of the short side of the rectangle, and the cuboid square rod is sliced to obtain a plurality of rectangular silicon wafers.
Optionally, when the number of the rectangular square rods is multiple, the length directions of the rectangular square rods are arranged in parallel, and the sum of the short sides of the end faces of the rectangular square rods is smaller than the outer diameter of the silicon rod.
Optionally, the step of slicing the cuboid square rod to obtain a plurality of rectangular silicon wafers further comprises:
and under the condition that the end surface of the cuboid square rod is rectangular, the cutting line is parallel to the direction of the long edge of the rectangle, and the cuboid square rod is sliced to obtain a plurality of rectangular silicon wafers.
Optionally, when the number of the rectangular square rods is multiple, the length directions of the rectangular square rods are arranged in parallel, and the sum of the long edges of the end faces of the rectangular square rods is smaller than the outer diameter of the silicon rod.
Optionally, the thickness of the silicon wafer is 50 μm to 170 μm.
Optionally, the ratio of the short edge to the long edge of the rectangular silicon wafer is 0.1-1.
In a second aspect, embodiments of the present application further provide a silicon wafer, which is prepared by the above preparation method.
In a third aspect, an embodiment of the present application further provides a battery, where the battery is prepared from the above silicon wafer.
In the embodiment of the application, the silicon rod is cut along the direction parallel to the axis of the silicon rod to obtain at least two cuboid square rods; and slicing the cuboid square rod along the direction parallel to the end face of the cuboid square rod to obtain a plurality of rectangular silicon wafers. In practical application, the quality of a cutting surface of a cuboid square rod obtained by cutting along the direction parallel to the axis of the silicon rod is good, and silicon loss can be effectively reduced. By the method, the silicon rod is cut into at least two cuboid square rods, the end surface area of each cuboid square rod is smaller than that of the silicon rod, and therefore the cuboid square rods are sliced along the direction parallel to the end surface direction of each cuboid square rod, the cutting difficulty of the silicon wafer can be effectively reduced, the cutting quality is effectively improved, and the silicon wafer is more beneficial to light and thin cutting.
Drawings
FIG. 1 is a flow chart of the steps of a method for preparing a silicon wafer according to an embodiment of the present application;
FIG. 2 is a schematic end view of a silicon rod cut according to an embodiment of the present disclosure;
FIG. 3 is a schematic cut-away view of a rectangular parallelepiped square bar according to an embodiment of the present application;
FIG. 4 is a schematic view of another cut of a rectangular parallelepiped square bar according to an embodiment of the present application;
FIG. 5 is a schematic view of another cut of a rectangular parallelepiped square bar according to an embodiment of the present application;
FIG. 6 is a schematic view of another cut of a rectangular parallelepiped square bar according to the embodiment of the present application.
Description of reference numerals:
1: a silicon rod; 10: a rectangular parallelepiped square bar; 20: crystal support; 30: a liner plate; 40: cutting the line.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application are capable of operation in sequences other than those illustrated or described herein. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.
In practical applications, with the development of photovoltaic technology, the size of the silicon rod is larger and larger. When cutting after directly squaring the silicon rod for the square rod through having, its single-knife cutting volume also just increases, and the area of monolithic silicon chip is big more, however, the silicon chip area increase leads to the silicon chip cutting degree of difficulty also to increase thereupon, and the breakage rate of silicon chip thickness and faceted pebble also correspondingly increases.
Based on the above problems, in the embodiment of the present application, at least two rectangular square rods are obtained by cutting a silicon rod along a direction parallel to an axial lead of the silicon rod; and then, slicing the cuboid square rod along the direction parallel to the end face of the cuboid square rod to obtain a plurality of rectangular silicon wafers. On the one hand, the cutting plane quality that obtains the cuboid square bar along the cutting of the axial lead direction that is on a parallel with the silicon rod is higher, can reduce steps such as polishing after the cutting, on the other hand, because the terminal surface area of cuboid square bar is less than the terminal surface area of silicon rod, just so can reduce the single-knife cutting volume, effectively reduce the cutting degree of difficulty of silicon chip, be favorable to the reduction of silicon chip thickness and faceted pebble breakage rate, make the silicon chip that the cutting obtained thinner, be favorable to the frivolous design of battery.
The following describes in detail the preparation method of the silicon wafer, the silicon wafer and the battery provided in the embodiments of the present application with reference to the accompanying drawings and the application scenarios thereof.
Referring to fig. 1, a flow chart of steps of a method for manufacturing a silicon wafer according to an embodiment of the present application is shown.
In the embodiment of the present application, the preparation method of the silicon wafer may specifically include:
101, cutting the silicon rod along a direction parallel to the axis of the silicon rod to obtain at least two cuboid square rods.
In the embodiments of the present application, the silicon rod includes, but is not limited to, a columnar silicon rod, and may also be a square rod obtained by slicing and cutting off a flaw-piece from a columnar silicon rod, and the embodiments of the present application explain the silicon rod as an example of a square rod.
In the embodiment of the application, the silicon rod is cut along the direction parallel to the axis of the silicon rod, the quality of the cut surface of the rectangular square rod is good, the subsequent polishing procedures such as rough polishing and fine polishing can be omitted, the silicon rod cutting efficiency is improved, and the silicon rod cutting cost is saved.
In the embodiment of the present application, the number of the cutting lines and the intervals between the cutting lines may be arranged according to the number and size of the rectangular parallelepiped square bars required. For example, when the silicon rod is a square rod (the end surface of the square rod is square), a cutting line can be arranged on any side surface of the square rod, and the square rod is cut into two identical cuboid square rods, so that half-cell batteries can be prepared by slicing the cuboid square rods subsequently; or, when the silicon rod is a square rod, N parallel cutting lines may be uniformly arranged on any one side surface of the square rod at intervals, so that the silicon rod may be divided into N +1 equal rectangular parallelepiped square rods.
It is understood that in two or more rectangular parallelepiped square bars, the end surface area of at least two rectangular parallelepiped square bars may be different. Under the condition that the number of the cuboid square rods is 2, the sum of the end surface areas of the two cuboid square rods is the end surface area of the silicon rod, namely, the end surface area of one cuboid square rod can be 1/N of the end surface area of the silicon rod, the end surface area of the other cuboid square rod is (N-1)/N of the end surface area of the silicon rod, and N is more than or equal to 2. As shown in fig. 2, a schematic end view of the cutting of the silicon rod according to the embodiment of the present application is shown. As shown in fig. 2, when N is equal to 2, the end surface area of the two rectangular parallelepiped square rods is 1/2 of the end surface area of the silicon rod.
In the present embodiment, the number of cutting the silicon rod is not limited, and for example, the step of changing the silicon rod to a rectangular parallelepiped square rod may be divided into two steps: firstly, cutting a silicon rod along a direction parallel to the axis of the silicon rod to obtain a primary square rod; wherein the primary square bar has at least one first rectangular side surface and at least one first arc surface adjacent to the first rectangular side surface; and then, cutting the primary square rod along the direction parallel to the axis of the silicon rod to obtain at least two cuboid square rods. In the embodiment of the application, the silicon rod is cut along the direction parallel to the axis of the silicon rod, the quality of a cutting surface is good, and the cutting efficiency is higher.
And 102, slicing the cuboid square rod along the direction parallel to the end face of the cuboid square rod to obtain a plurality of rectangular silicon wafers.
In the embodiment of the present application, the end surface of the rectangular parallelepiped square rod is a side surface parallel to the end surface of the silicon rod. In the embodiment of the application, because the terminal surface area of cuboid square bar is less than the terminal surface area of silicon rod, consequently, along the terminal surface direction that is on a parallel with cuboid square bar, slice the cuboid square bar, can reduce the cutting volume of singletool, its section degree of difficulty can effectively reduce, like this, both can guarantee the cutting quality, reduce the silicon chip breakage rate, can make the thickness of silicon chip thinner again, more be favorable to cutting bigger size, thinner silicon chip.
In the embodiment of the present application, the ratio of the short side to the long side of the rectangular silicon wafer is 0.1 to 1. Preferably, the ratio of the short side to the long side of the rectangular silicon wafer is 1:2, so that the two rectangular silicon wafers can be spliced into a square silicon wafer, namely two half batteries are spliced into a whole battery at the end of the battery, and the splicing and assembling difficulty is low.
Specifically, the thickness of the silicon wafer is 50-170 μm. In practical application, because the terminal surface area of cuboid square bar is less than the terminal surface area of silicon rod, consequently, when cutting cuboid square bar along the terminal surface direction that is on a parallel with cuboid square bar, the cutting volume of single sword has reduced, and like this, the thickness of silicon chip just can be thinner, more is favorable to the frivolousization of battery piece. In the embodiment of the application, the thickness of the silicon wafer can be positively correlated with the area of the silicon wafer, and in a certain interval, the smaller the area of the silicon wafer is, the thinner the thickness of the silicon wafer is.
The thickness of the silicon wafer prepared by the above method in the examples of the present application may be any value within the range of 50 μm to 170 μm. For example, where the wafer size (length by width) is 52mm 156mm, the thickness of the wafer may be 50 μm; the thickness of the wafer may be 100 μm when the size (length) of the wafer is 78mm 156 mm; when the size (length) of the wafer is 100mm 300mm, the thickness of the wafer may be 170 μm.
In the embodiment of the application, when the silicon rod is a square rod, the square rod is sliced along the direction parallel to the end surface of the square rod to obtain the area of a rectangular silicon wafer, namely 1/N (wherein N is greater than or equal to 2) of the area of the square rod, namely 1/N silicon wafers, so that 1/N small cells can be prepared on the 1/N silicon wafers directly in the follow-up process. In the embodiment of the application, the half or 1/N silicon wafers are prepared by the method, and then the half or 1/N batteries are prepared, compared with the traditional mode that the half battery is prepared by laser scribing on the whole battery piece, because the subsequent whole battery is not needed and then laser scribing is carried out, the problems of low conversion efficiency, fragment breakage, hidden crack and the like caused by the preparation of the half battery piece in the traditional mode are avoided, and thus, the photoelectric conversion efficiency of the half or 1/N batteries can be effectively improved, the battery processing cost is reduced, and the problem of battery processing cost waste is effectively avoided.
Optionally, the area of the rectangular silicon wafer is at least 1/10 of the area of the end face of the silicon rod.
In the embodiment of the application, the area of the rectangular silicon wafer is at least 1/10 of the end surface area of the silicon rod, namely the end surface area of the corresponding cuboid square rod is at least 1/10 of the end surface area of the silicon rod, so that the cutting difficulty can be reduced, and the silicon loss can be reduced. When being two at least cuboid square bars with the silicon rod cutting, because the quantity of cuboid square bar is more, the silicon loss that the cutting leads to is also big more, consequently, preferably, the quantity of the cuboid square bar that the silicon rod cutting obtained can be 2 ~ 4, like this, both can reduce the follow-up degree of difficulty of cutting the silicon chip of cuboid square bar, can reduce the silicon loss that the cutting leads to as far as again.
In practical application, in order to have the beneficial effects of reducing the cutting difficulty of the silicon wafer and reducing silicon loss caused by cutting, preferably, the silicon rod can be cut into two rectangular square rods with equal end surfaces, so that the end surface area of each rectangular square rod is 1/2 of the silicon rod area, and the obtained rectangular silicon wafer is the silicon wafer for preparing the half-cell.
In practical applications, the number of the rectangular parallelepiped square bars cut in step 102 may be one or more (in this embodiment, the number is greater than or equal to 2), that is, one or more rectangular parallelepiped square bars may be sliced at the same time.
Optionally, step 102 may further include: and under the condition that the end surface of the cuboid square rod is rectangular, the cutting line is parallel to the direction of the short side of the rectangle, and the cuboid square rod is sliced to obtain a plurality of rectangular silicon wafers.
Fig. 3 shows a schematic cutting view of a rectangular parallelepiped square bar according to an embodiment of the present application. As shown in figure 3, the cutting line is with the direction that is on a parallel with the minor face of cuboid square bar terminal surface, cuts into slices the cuboid square bar, and like this, cutting fluid gets into the cuboid square bar along with the cutting line more easily, plays better lubrication, cooling effect in cutting process to the cutting quality that makes the silicon chip is higher.
In the embodiment of the application, under the condition that the number of cuboid square rods is a plurality of, the length direction parallel arrangement of a plurality of cuboid square rods, and the minor face sum of a plurality of cuboid square rods is less than the external diameter size of silicon rod. Fig. 4 shows another schematic cutting diagram of a rectangular parallelepiped square bar according to the embodiment of the present application. In the embodiment of the application, when the line of cut is with being on a parallel with minor face direction cutting cuboid square stick, can cut two or more cuboid square sticks simultaneously, because the minor face sum of a plurality of cuboid square sticks is less than the external diameter size of silicon rod, like this, when the line of cut cuts a plurality of cuboid square sticks, the cutting degree of difficulty can effectively reduce, and the silicon chip quantity that the simplex sword cutting obtained then doubles the increase to the production efficiency of silicon chip has been promoted.
Optionally, step 102 may further include: and under the condition that the end surface of the cuboid square rod is rectangular, the cutting line is parallel to the direction of the long edge of the rectangle, and the cuboid square rod is sliced to obtain a plurality of rectangular silicon wafers.
Referring to fig. 5, there is shown a schematic cut view of a rectangular parallelepiped square bar according to an embodiment of the present application. In this application embodiment, because the terminal surface area of cuboid square stick is less than the terminal surface area of silicon rod, consequently, when the line of cut cuts the section with the direction that is on a parallel with the long limit of rectangle cuboid square stick, the cutting volume of its simplex sword also can reduce, and then also can reduce the cutting degree of difficulty of silicon chip, promotes the cutting quality of silicon chip.
Referring to fig. 6, there is shown a schematic diagram of another cutting of a rectangular parallelepiped square bar according to an embodiment of the present application. Like the picture, when the line of cut is sliced the cuboid square rod with the direction that is on a parallel with the long limit of rectangle, the quantity of the square rod of cuboid can be more than or equal to two, like this, can effectively promote the silicon chip quantity that the single-knife cutting obtained, improves the production efficiency of silicon chip. It should be noted that, under the condition that the quantity of cuboid square stick is a plurality of, the length direction parallel arrangement of a plurality of cuboid square sticks, and the long limit sum of a plurality of two cuboid square stick terminal surfaces is less than the external diameter size of silicon rod, like this, can effectively reduce the cutting degree of difficulty of cuboid square stick, promotes the cutting quality of silicon chip.
When the silicon rod or the rectangular parallelepiped square rod is cut, the wire diameter of the cutting wire (diamond wire) used for cutting may be any value within a range of 30 to 50 μm, the tension of the diamond wire is set within a range of 2 to 9N, and the corresponding wire speed may be 600 to 2400 m/min. It can be understood that, when cutting rectangular parallelepiped square rods with different end surface areas, process parameters (wire diameter, wire speed, tension, etc. of the diamond wire) can be selected to match with the rectangular parallelepiped square rods, and the embodiment of the present application does not limit this.
In summary, in the method for preparing a silicon wafer according to the embodiment of the present application, the silicon rod is cut along a direction parallel to an axial lead of the silicon rod to obtain at least two rectangular square rods; and slicing the cuboid square rod along the direction parallel to the end face of the cuboid square rod to obtain a plurality of rectangular silicon wafers. In practical application, the quality of a cutting surface of a cuboid square rod obtained by cutting along the direction parallel to the axis of the silicon rod is good, and silicon loss can be effectively reduced. By the method, the silicon rod is cut into at least two cuboid square rods, the end surface area of each cuboid square rod is smaller than that of the silicon rod, and therefore the cuboid square rods are sliced along the direction parallel to the end surface direction of each cuboid square rod, the cutting difficulty of the silicon wafer can be effectively reduced, the silicon wafer is more beneficial to light and thin cutting, and the cutting quality can be effectively improved.
The embodiment of the application also provides a silicon wafer which is prepared by the preparation method of the silicon wafer.
In the embodiment of the application, the silicon wafer prepared by the method has the advantages of larger size, thinner thickness, lower breakage rate and the like.
It should be noted that, in the embodiments of the present application, the preparation method of the silicon wafer may refer to the above embodiments, and details of the present application are not repeated herein.
The embodiment of the application also provides a battery which is prepared from the silicon wafer.
It should be noted that, in the embodiments of the present application, the preparation method of the silicon wafer may refer to the above embodiments, and details of the present application are not repeated herein.
In the embodiment of the present application, a method for preparing the silicon wafer into the battery is a method for preparing a battery using crystalline silicon as a substrate in the field, for example, an SE-BSF battery, a PERC battery, a double-sided battery, a Topcon battery or an HJT battery, which is not described herein again.
While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A method for preparing a silicon wafer is characterized by comprising the following steps:
cutting the silicon rod along the direction parallel to the axis of the silicon rod to obtain at least two cuboid square rods;
and slicing the cuboid square rod along the direction parallel to the end face of the cuboid square rod to obtain a plurality of rectangular silicon wafers.
2. The method for producing silicon wafers according to claim 1, wherein the area of the rectangular silicon wafer is at least 1/10 times the area of the end face of the silicon rod.
3. The method for preparing a silicon wafer according to claim 1, wherein the step of slicing the rectangular bar to obtain a plurality of rectangular silicon wafers further comprises:
and under the condition that the end surface of the cuboid square rod is rectangular, the cutting line is parallel to the direction of the short side of the rectangle, and the cuboid square rod is sliced to obtain a plurality of rectangular silicon wafers.
4. The method for producing a silicon wafer according to claim 3, wherein when the number of the rectangular parallelepiped square rods is plural, the length directions of the rectangular parallelepiped square rods are arranged in parallel, and the sum of the short sides of the end faces of the rectangular parallelepiped square rods is smaller than the outer diameter of the silicon rod.
5. The method for preparing a silicon wafer according to claim 1, wherein the step of slicing the rectangular bar to obtain a plurality of rectangular silicon wafers further comprises:
and under the condition that the end surface of the cuboid square rod is rectangular, the cutting line is parallel to the direction of the long edge of the rectangle, and the cuboid square rod is sliced to obtain a plurality of rectangular silicon wafers.
6. The method for producing a silicon wafer according to claim 5, wherein when the number of the rectangular parallelepiped square rods is plural, the length directions of the rectangular parallelepiped square rods are arranged in parallel, and the sum of the long sides of the end faces of the rectangular parallelepiped square rods is smaller than the outer diameter of the silicon rod.
7. The method for producing a silicon wafer according to claim 1, wherein the silicon wafer has a thickness of 50 to 170 μm.
8. The method for producing a silicon wafer according to claim 1, wherein the ratio of the short side to the long side of the rectangular silicon wafer is 0.1 to 1.
9. A silicon wafer produced by the production method according to any one of claims 1 to 8.
10. A battery prepared from the silicon wafer of claim 9.
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| CN114750312A (en) * | 2022-04-21 | 2022-07-15 | 青岛高测科技股份有限公司 | Method, cutting equipment and cutting system for cutting silicon rod by single wire and three wires |
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| CN114750312A (en) * | 2022-04-21 | 2022-07-15 | 青岛高测科技股份有限公司 | Method, cutting equipment and cutting system for cutting silicon rod by single wire and three wires |
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