CN113643994A - 用于凸块下金属结构的套环及相关联的系统及方法 - Google Patents

用于凸块下金属结构的套环及相关联的系统及方法 Download PDF

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Publication number
CN113643994A
CN113643994A CN202110934095.4A CN202110934095A CN113643994A CN 113643994 A CN113643994 A CN 113643994A CN 202110934095 A CN202110934095 A CN 202110934095A CN 113643994 A CN113643994 A CN 113643994A
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collar
semiconductor die
ubm
semiconductor
conductive material
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G·马里奥蒂尼
S·瓦德哈维卡
W·黄
A·查杜鲁
M·博斯勒
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Micron Technology Inc
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Micron Technology Inc
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Abstract

本申请涉及用于凸块下金属结构的套环及相关联的系统和方法。一种半导体裸片包含：半导体材料，其具有固态组件；及互连件，其至少部分延伸穿过所述半导体材料。凸块下金属UBM结构形成于所述半导体材料上方且电耦合到对应互连件。套环包围所述UBM结构的侧表面的至少一部分，且焊接材料安置于所述UBM结构的顶面上方。

Description

用于凸块下金属结构的套环及相关联的系统及方法
本申请为发明名称为“用于凸块下金属结构的套环及相关联的系统及方法”、申请号为201680053250.9、申请日为2016年8月3日的中国发明专利申请的分案申请。
技术领域
本发明大体上涉及半导体装置，且更特定来说，在若干实施例中，本发明涉及用于裸片间及/或封装间互连件的凸块下金属(UBM)结构。
背景技术
例如存储器装置、微处理器及发光二极管的微电子装置通常包含安装到衬底且装入塑料保护覆盖层中的一或多个半导体裸片。半导体裸片包含例如存储器单元、处理器电路及互连电路的功能特征。半导体裸片通常还包含电耦合到功能特征的接合垫。接合垫电连接到在保护覆盖层外部延伸的引脚或其它类型的端子以将半导体裸片连接到总线、电路或其它组合件。
半导体裸片制造商在减小由裸片占据的体积且增大所得囊封组合件的容量及/或速度方面承受越来越大压力。为满足这些需求，半导体裸片制造商通常使多个裸片彼此上下堆叠以在裸片安装到其的电路板或其它元件上的有限体积内增大装置的容量或性能。在许多应用中，裸片在被囊封之前彼此上下堆叠以形成三维封装。
堆叠半导体裸片通常由附接到凸块下金属(UBM)结构的焊料凸块或其它电连接器电连接。通常通过将铜晶种结构沉积到晶片上，在所述铜晶种结构上形成具有与裸片上的接合垫对准的开口的掩模，将铜镀覆到所述晶种结构上，且接着将一或多个其它材料镀覆于所述铜上方以形成UBM结构而形成UBM结构。通常选择UBM结构的最上材料来促进用于随后在最上材料上形成互连件的湿润。在形成UBM结构之后，在UBM结构的最上材料上方形成焊接材料的微凸块来充当互连件。在形成UBM结构及微凸块之后，移除掩模且使用合适湿式蚀刻来移除晶种结构的暴露部分以形成隔离的UBM结构及微凸块。本发明涉及改进的UBM结构及制造UBM结构的方法。
发明内容
一方面，本申请提供了一种半导体裸片，所述半导体裸片包括：半导体材料，其具有固态组件；互连件，其至少部分延伸穿过所述半导体材料；凸块下金属UBM结构，其电耦合到所述互连件，其中所述UBM结构具有顶面、底面及在所述顶面与所述底面之间延伸的侧壁，且其中所述UBM结构包括第一导电材料和安置于所述第一导电材料上方的第二导电材料；套环，其包围所述UBM结构的所述侧壁的至少一部分，使得所述套环接触所述第一导电材料的至少一部分，其中所述套环凹入所述UBM结构的所述顶面下方；及焊接材料，其安置于所述UBM结构的所述顶面上方，其中所述套环包括抗湿材料，所述焊接材料不易于在液相中湿润所述抗湿材料。
另一方面，本申请进一步提供了一种半导体裸片，所述半导体裸片包括：半导体材料，其具有固态组件；互连件，其至少部分延伸穿过所述半导体材料；凸块下金属UBM结构，其电耦合到所述互连件，其中所述UBM结构具有顶面、底面及在所述顶面与所述底面之间延伸的侧壁，且其中所述UBM结构包括第一导电材料和安置于所述第一导电材料上方的第二导电材料；套环，其包围所述UBM结构的所述侧壁的至少一部分，使得所述套环接触所述第一导电材料的至少一部分，但不接触所述第二导电材料；及焊接材料，其安置于所述UBM结构的所述顶面上方。
又一方面，本申请进一步提供了一种半导体裸片，所述半导体裸片包括：半导体材料；互连件，其至少部分延伸穿过所述半导体材料；柱结构，其电耦合到所述互连件，其中所述柱结构包括下部分和上部分，所述下部分包括第一导电材料且具有第一侧面，所述上部分包括形成在所述下部分上方的第二导电材料，所述上部分具有第二侧面；套环，其包围所述柱结构的至少一部分，使得所述套环接触所述第一侧面的至少一部分，并从所述柱的顶面凹入；及焊接材料，其安置于所述柱结构的所述顶面上方。
附图说明
可参考以下图式来较好地理解本发明的许多方面。图式中的组件未必按比例绘制，而是代以将重点放在清楚地说明本发明的原理上。
图1是示意性地展示根据本发明的实施例的多个半导体裸片的衬底组合件的横截面图。
图2A到2H是示意性地说明根据本发明的实施例的方法的各种阶段中的半导体裸片的部分的横截面图。
图3A到3G是示意性地说明根据本发明的另一实施例的方法的各种阶段中的半导体裸片的部分的横截面图。
图4是根据本发明的实施例的方法的流程图。
图5是根据本发明的实施例的方法的流程图。
图6是说明根据本发明的实施例的并入半导体装置的系统的框图。
具体实施方式
本文中描述用于制造半导体装置的方法的若干实施例的特定细节及其相关的装置及系统。术语“半导体装置”大体上是指包含一或多种半导体材料的固态装置。半导体装置的实例包含逻辑装置、存储器装置、微处理器及二极管等等。此外，术语“半导体装置”可指制成装置或指变成制成装置之前的各种处理阶段中的组合件或其它结构。取决于其使用背景，术语“衬底”可指晶片级衬底或单粒化裸片级衬底。相关领域的一般技术人员将认识到，可在晶片级或裸片级处执行本文中所描述的方法的合适步骤。此外，除非上下文另有指示，否则可使用常规半导体制造技术来形成本文中所揭示的结构。可(例如)使用化学气相沉积、物理气相沉积、原子层沉积、旋涂及/或其它合适技术来沉积材料。类似地，可(例如)使用等离子体蚀刻、湿式蚀刻、化学机械平面化或其它合适技术来移除材料。
下文将在电耦合到TSV(例如穿硅通孔，其具有在被完成时完全延伸穿过衬底及/或封装材料的导电插塞或连接器)的UBM结构的背景下描述本发明的许多实施例。相关领域的一般技术人员还应了解，本发明可包含用于在衬底组合件的第一侧或第二侧上形成UBM结构的实施例，且可在与半导体组合件相关联的其它电连接器的背景下使用UBM结构。因此，可在没有本文中参考图1到6所描述的实施例的若干细节的情况下实践本发明。为便于参考，使用相同元件符号来识别本发明中的类似或模拟组件或特征，但使用相同元件符号不暗示应将特征解释成相同的。其实，在本文所描述的许多实例中，具有相同元件符号的特征具有彼此结构及/或功能不同的多个实施例。此外，相同阴影可用于指示可具有类似组成物的横截面材料，但除非本文中特别注明，否则使用相同阴影不暗示应将材料解释成相同的。
UBM结构及微凸块使用回流过程来附接到相邻裸片。在安置于UBM结构的顶部上的微凸块的回流期间，微凸块的一些材料(例如锡)可与UBM结构的材料(例如铜)反应，其会对UBM结构与相邻裸片之间的互连产生不利影响。例如，来自微凸块的一些材料可归因于沿UBM结构的侧壁湿润而外流。这可导致在微凸块侧壁上形成金属间化合物。另外，一些微凸块材料(例如锡)可扩散，直到到达UBM结构材料(例如铜)且与UBM结构材料(例如铜)反应，从而导致微凸块中的可用锡的摩尔体积收缩，也称为焊锡缺乏。这两个效应可导致可用于微凸块的中心处的未反应焊接材料耗尽，从而引起焊料接点中的空隙且降低电迁移可靠性。
本发明的若干实施例显著降低微凸块的焊接材料在微凸块的回流期间与UBM结构的材料反应的可能性。例如，本发明的若干实施例围绕UBM结构的第一材料及/或第二材料的至少一部分形成套环(其保护UBM侧壁免于与来自微凸块的焊料反应)。因此，本发明的若干实施例减少微凸块回流期间的微凸块与UBM侧壁之间的反应，如下文将更详细解释。
图1是示意性地说明具有半导体材料110的衬底组合件100的横截面图，半导体材料110具有第一侧112及第二侧114。衬底组合件100进一步包含位于半导体材料110的第二侧114上的电介质材料116。多个半导体裸片120形成于衬底组合件100的离散区域处。尽管图1中说明两个半导体裸片120，但实际上，半导体组合件100通常具有数百个或甚至超过1,000个个别半导体裸片。个别半导体裸片120可包含集成电路122及电耦合到集成电路122的多个互连件124。在图1所展示的实施例中，互连件124是包含电介质衬层126及电介质衬层126内的导电插塞128的TSV。因此，互连件124可完全延伸穿过衬底组合件100。
半导体裸片120进一步包含多个UBM结构130，且个别UBM结构130电耦合到对应互连件124。在若干实施例中，个别UBM结构130包括电耦合到互连件124中的一者的第一材料132及位于第一材料132上方的第二材料134。抗湿材料136形成围绕第一材料132及第二材料134的至少一部分的套环138。半导体裸片120还可包含位于个别UBM结构130的第二材料134上方的微凸块140。
在特定实施例中，第一材料132包括铜，第二材料134包括镍，微凸块140包括锡-银焊接材料，且套环138包括氧化物，例如正硅酸四乙酯(TEOS)或另一氧化物。此实施例形成：Cu/Ni UBM结构130，其具有形成于其上方的微凸块140；及氧化物套环，其包围Ni的暴露侧壁及Cu的至少一部分且未覆盖UBM结构130的顶面(例如第二材料134的顶面)。在其它实施例中，第一材料132及第二材料134可包括任何导电材料，例如金、硅、钨等等。UBM结构130的形状及尺寸可变动。例如，在一些实施例中，UBM结构130大体上呈圆柱形，从而形成柱状结构，但在其它实施例中，UBM结构130可具有其它横截面形状，例如矩形、规则多边形、不规则多边形、椭圆形等等。UBM结构130可具有约1微米到约100微米之间的厚度且可具有约1微米到约100微米之间的高度。
微凸块140可包括焊接材料，例如锡-银、铟或适用于形成UBM结构130与相邻裸片之间的电连接及机械连接的另一焊接材料。在一些实施例中，形成套环138的抗湿材料136可包括防止第一材料132及第二材料134的侧壁上的微凸块140湿润的材料(例如，抗湿材料136对微凸块140的材料提供不可湿润表面)。抗湿材料136可具有对微凸块140的焊接材料的极低或可忽略的扩散性。例如，在一些实施例中，抗湿材料136包括氧化物、氮化物或聚酰亚胺。在一些实施例中，抗湿材料136具有约
Figure BDA0003210485940000051
到约
Figure BDA0003210485940000052
之间的厚度，或在一些实施例中，具有约
Figure BDA0003210485940000053
到约
Figure BDA0003210485940000054
之间的厚度。在若干实施例中，抗湿材料136完全包围第一材料132及/或第二材料134的圆周的至少一部分，但在其它实施例中，抗湿材料136未覆盖整个圆周。抗湿材料136还沿UBM结构130的高度的至少一部分延伸；例如，抗湿材料136覆盖UBM结构130的高度的至少80％。套环138包括抗湿材料136消除或减少沿UBM结构130的第一材料132及第二材料134的侧壁湿润来自微凸块140的焊料。下文将参考图2A到3G来描述根据本发明的形成UBM结构、套环及微凸块的进一步实施例及方面。
图2A到2H是示意性地说明用于形成UBM结构、套环及微凸块的方法的不同阶段期间的衬底组合件100的部分处的半导体裸片120的截面图。参考图2A，在方法的此阶段中，半导体裸片120具有形成于电介质材料116及接近于衬底110的第二侧114的互连件124的部分上的晶种结构240、及晶种结构240上的掩模250。晶种结构240可具有与互连件124的位置相关联的第一区域242及介于第一区域242之间的第二区域244。晶种结构240可为适用于镀覆UBM结构的基底材料或第一材料的单一材料。在若干实施例中，晶种结构240包含势垒材料及所述势垒材料上的晶种材料。所述势垒材料可为钽、氮化钽、钛、钛-钨或防止UBM材料扩散到电介质材料116及衬底100中的另一材料。所述晶种材料可为铜、铜合金、镍或合适使用所属领域中已知的电镀或无电镀覆技术来将第一材料132(图1)镀覆到所述晶种材料上的其它材料。实际上，晶种结构240可与互连件124的导电插塞128集成。
掩模250可为具有与晶种结构240的第一区域242对准的多个开口252的抗蚀剂材料或其它合适掩模材料。如下文将更详细解释，UBM结构形成于掩模250的开口252中。当从图2A中所展示的侧观看时，掩模250的开口252具有T形横截面，其中上部分254具有比下部分256宽的开口。可在光刻或其它合适技术期间使用漏铬掩模来形成掩模250中的此T形开口252。
图2B是示意性地说明第一材料132已形成于晶种结构240的暴露第一区域242(图2A)上之后的半导体裸片120的横截面图。在一个实施例中，晶种结构240包含使用物理气相沉积工艺来沉积的铜晶种材料，且第一材料132包括使用所属领域中已知的电镀或无电镀覆工艺来沉积到所述铜晶种材料上的铜。因此，第一材料132可界定UBM结构的基底材料。在一个实施例中，第一材料132在过程的此阶段中具有第一直径(例如30μm)及高度(30μm)，但第一材料132的所述直径及所述高度可具有取决于特定半导体裸片120的特定配置的任何其它合适尺寸。
图2C是示意性地说明已将第二材料134沉积到开口252中使得第二材料134位于第一材料132上方之后的半导体裸片120的横截面图。第二材料134可包括镍或提供用于在第二材料134上形成互连件的良好湿润表面的其它合适材料。第一材料132及第二材料134可界定UBM结构130。在过程的此阶段中，半导体裸片120具有通过晶种结构240而彼此电耦合的多个UBM结构130。在一些实施例中，可完全省略第二材料，且UBM结构可仅包含第一材料。
图2D是示意性地说明根据本发明的一个实施例的已移除掩模250的部分以界定套环开口258之后的半导体裸片120的横截面图。可使用各向异性干式蚀刻及干洗来蚀刻掩模250。干式蚀刻可横跨半导体裸片120来大体上均匀地移除掩模250，直到完全移除套环开口258中的相邻于UBM结构130的掩模250。套环开口258可界定套环138(图1)的厚度，其(例如)具有约
Figure BDA0003210485940000061
到约
Figure BDA0003210485940000062
之间或约
Figure BDA0003210485940000063
到约
Figure BDA0003210485940000064
Figure BDA0003210485940000065
之间的厚度。干式蚀刻的参数(例如化学性、功率、温度等等)可经调适以在蚀刻期间硬化掩模250以使掩模250准备用于后续沉积步骤。
图2E是示意性地说明根据本发明的一个实施例的已形成抗湿材料136之后的半导体裸片120的横截面图。抗湿材料136可为微凸块140(图1)的焊接材料不易于在液相中湿润(例如，覆盖)其的材料及/或具有针对微凸块140(图1)的焊接材料的低或可忽略扩散性。抗湿材料136可为氧化物、氮化物、聚酰亚胺或其它合适材料。在一个实施例中，抗湿材料136是通过低温(例如，低于150℃)等离子体增强型化学气相沉积或其它合适工艺而形成的正硅酸四乙酯(TEOS)。抗湿材料136经形成为掩模250及开口252上方的毯覆层，其包含覆盖UBM结构130及填充套环开口258(图2D)。
图2F是示意性地说明根据本发明的一个实施例的已移除抗湿材料136的部分之后的半导体裸片120的横截面图。可使用缓冲氧化物蚀刻或间隔物蚀刻及接着湿洗来移除抗湿材料136的部分。如图2F中所展示，已移除大多数抗湿材料136，直到抗湿材料136的剩余部分仅位于套环开口258(图2D)中以形成套环138。在一些实施例中，套环138大体上可与第二材料134共面，而在其它实施例中，套环138可相对于第二材料134而凹入。
图2G是示意性地说明根据本发明的一个实施例的已形成微凸块140之后的半导体裸片120的横截面图。微凸块140可由例如锡-银或铟焊料的焊接材料形成，将微凸块140镀覆到UBM结构130及套环138的顶部上的开口252中。在一些实施例中，微凸块140可具有约3微米到约50微米之间的高度。
图2H是示意性地说明已移除掩模250及晶种结构240的部分以使UBM结构130电隔离之后的半导体裸片120的横截面图。可使用湿抗蚀剂剥离或其它合适技术来移除掩模250，接着，可使用适用于移除晶种结构的材料的湿式蚀刻来移除晶种结构240的第二区域244。此时，使UBM结构彼此电隔离。
图3A到3G是示意性地说明根据本发明的另一实施例的UBM结构、套环及微凸块的不同制造阶段期间的衬底组合件100的部分处的半导体裸片120的横截面图。参考图3A，在方法的此阶段中，半导体裸片120在电介质材料116及接近于衬底110的第二侧114的互连件124的部分上具有晶种结构240，且掩模250位于晶种结构240上。晶种结构240具有与互连件124的位置相关联的第一区域242及介于第一区域242之间的第二区域244。掩模250可为具有与晶种结构240的第一区域242对准的多个开口252的抗蚀剂材料或其它合适掩模材料。如下文将更详细解释，UBM结构形成于掩模250的开口252中。
图3B是示意性地说明根据本发明的一个实施例的已形成抗湿材料136之后的半导体裸片120的横截面图。抗湿材料136可为微凸块140(图1)的焊接材料不易于在液相中湿润(例如，覆盖)其的材料及/或具有对微凸块140(图1)的焊接材料的低或可忽略扩散性。抗湿材料136可为氧化物(例如正硅酸四乙酯(TEOS)或其它氧化物)、氮化物、聚酰亚胺或其它合适材料。在一个实施例中，抗湿材料136是通过低温(例如，低于150℃)等离子体增强型化学气相沉积或其它合适工艺而形成的正硅酸四乙酯(TEOS)。抗湿材料136经形成为掩模250及开口252上方的毯覆层。
图3C是示意性地说明根据本发明的实施例的已移除抗湿材料136的部分之后的半导体裸片120的横截面图。可使用间隔氧化物蚀刻及接着湿洗来移除抗湿材料136的部分。如图3C中所展示，已移除抗湿材料136的上覆部分，直到抗湿材料136的剩余部分仅沿开口252的侧壁。
图3D是示意性地说明已形成第一材料132于晶种结构240的暴露第一区域242(图3C)上且已形成第二材料134于第一材料132上方之后的半导体裸片120的横截面图。在一个实施例中，晶种结构240包含使用物理气相沉积工艺来沉积的铜晶种材料，且第一材料132包括使用所属领域中已知的电镀或无电镀覆工艺来沉积到所述铜晶种材料上的铜。第一材料132及第二材料134可界定由抗湿材料136包围的UBM结构130。在过程的此阶段中，半导体裸片120具有通过晶种结构240而彼此电耦合的多个UBM结构130。在一些实施例中，可完全省略第二材料，且UBM结构可仅包含第一材料。
图3E是示意性地说明已进一步移除抗湿材料136的部分以形成套环138之后的半导体裸片120的横截面图。类似于上文相对于图3B所描述的过程，可使用间隔氧化物蚀刻及接着湿洗来移除抗湿材料136的额外部分。如图3E中所展示，已移除抗湿材料136，直到仅沿开口252的侧壁的剩余抗湿材料136大体上与第二材料134共面且借此形成套环138。
图3F是示意性地说明已形成微凸块140之后的半导体裸片120的横截面图。微凸块140可由例如锡-银或铟焊料的焊接材料形成，将微凸块140镀覆到UBM结构130及套环138的顶部上的开口252中。在一些实施例中，微凸块140可具有约3微米到约50微米之间的高度。
图3G是示意性地说明已移除掩模250及晶种结构240以使UBM结构130电隔离之后的半导体裸片120的横截面图。可使用湿抗蚀剂剥离或其它合适技术来移除掩模250，接着，可使用合适湿式蚀刻来移除晶种结构240的第二区域244以使UBM结构130彼此电隔离。
图4是根据本发明的实施例的用于形成UBM结构于半导体裸片上的方法400的实施例的流程图。在此实施例中，方法400包含：在晶种结构上形成掩模(框402)且将第一材料镀覆到所述晶种结构的暴露区域上(框404)。例如，所述掩模具有暴露所述晶种结构的区域的开口，所述区域电耦合到至少部分延伸穿过半导体衬底的互连件。在若干实施例中，将所述掩模的所述开口叠置于TSV上方。方法400进一步包含：将第二材料沉积到所述开口中的所述第一材料上方以借此形成UBM结构(框406)，且围绕所述UBM结构蚀刻套环区域(框408)。方法接着进行：将抗湿材料形成在所述UBM结构上方且形成到所述套环区域中(框410)，接着蚀刻所述抗湿材料，直到所述抗湿材料大体上与所述套环区域中的所述第二材料共面(框412)。此步骤形成包围所述UBM结构的套环。方法400接着进行：在所述UBM结构上方形成微凸块(框414)。接着，可移除所述掩模，接着通过湿式蚀刻而移除所述UBM结构之间的所述晶种结构的所述暴露部分。
图5是根据本发明的实施例的用于在半导体裸片上形成UBM结构的方法500的实施例的流程图。在此实施例中，方法500包含：在晶种结构上形成掩模(框502)且在所述掩模及所述晶种材料的暴露部分上方形成抗湿材料(框504)。例如，所述掩模具有暴露所述晶种结构的区域的开口，所述区域电耦合到至少部分延伸穿过半导体衬底的互连件。在若干实施例中，将所述掩模的所述开口叠置于TSV上方。方法500进一步包含：蚀刻所述抗湿材料，直到暴露所述晶种结构且剩余抗湿材料界定所述开口中的套环(框506)。例如，可使用缓冲氧化物蚀刻或间隔物蚀刻及接着湿洗来蚀刻所述抗湿材料。方法500接着进行：将第一材料镀覆于所述开口中的所述晶种材料上方(框508)且在所述开口中的所述第一导电材料上方形成第二导电材料，借此形成UBM结构(框510)。接着，方法500移除所述抗湿材料，直到所述套环大体上与所述开口中的所述第二导电材料共面(框512)。方法500接着进行：在所述UBM结构上方形成微凸块(框514)。接着，可移除所述掩模，接着通过湿式蚀刻而移除所述UBM结构之间的所述晶种结构的所述暴露部分。
具有上文参考图1到5所描述的特征的半导体装置中的任一者可并入到大量较大及/或较复杂系统中的任何者中，所述系统的代表实例是图6中示意性地展示的系统600。系统600可包含处理器602、存储器604(例如SRAM、DRAM、快闪存储器及/或其它存储器装置)、输入/输出装置606及/或其它子系统或组件608。上文参考图1到5所描述的半导体装置100可包含于图6中所展示的元件中的任何者中。所得系统600可经配置以执行各种合适计算、处理、存储、感测、成像及/或其它功能中的任何者。因此，系统600的代表实例包含(但不限于)计算机及/或其它数据处理器，例如桌上型计算机、膝上型计算机、因特网设备、手持式装置(例如掌上计算机、可穿戴计算机、蜂窝式或移动电话、个人数字助理、音乐播放器等等)、平板计算机、多处理器系统、基于处理器或可编程消费型电子产品、网络计算机及小型计算机。系统600的额外代表实例包含灯、相机、交通工具等等。关于这些及其它实例，系统600可容置于单个单元中或(例如)通过通信网络而分布于多个互连单元上。因此，系统600的组件可包含本地及/或远程存储存储装置及各种合适计算机可读媒体中的任何者。
应从上文了解，本文中已为了说明而描述本发明的特定实施例，但可在不背离本发明的范围的情况下作出各种修改。因此，本发明仅受限于所附权利要求书。

Claims (20)

1.一种半导体裸片，其包括：
半导体材料，其具有固态组件；
互连件，其至少部分延伸穿过所述半导体材料；
凸块下金属UBM结构，其电耦合到所述互连件，其中所述UBM结构具有顶面、底面及在所述顶面与所述底面之间延伸的侧壁，且其中所述UBM结构包括第一导电材料和安置于所述第一导电材料上方的第二导电材料；
套环，其包围所述UBM结构的所述侧壁的至少一部分，使得所述套环接触所述第一导电材料的至少一部分，其中所述套环凹入所述UBM结构的所述顶面下方；及
焊接材料，其安置于所述UBM结构的所述顶面上方，其中所述套环包括抗湿材料，所述焊接材料不易于在液相中湿润所述抗湿材料。
2.根据权利要求1所述的半导体裸片，其中所述套环包括氧化物、氮化物或聚酰亚胺中的至少一者。
3.根据权利要求1所述的半导体裸片，其中所述套环具有约
Figure FDA0003210485930000012
到约
Figure FDA0003210485930000011
之间的厚度。
4.根据权利要求1所述的半导体裸片，其中所述UBM结构是支柱，且其中所述套环仅部分地覆盖所述支柱的所述侧壁。
5.根据权利要求1所述的半导体裸片，其中所述套环不接触所述第二导电材料。
6.根据权利要求1所述的半导体裸片，其中所述套环未横向延伸越过所述焊接材料。
7.根据权利要求1所述的半导体裸片，其中所述套环的侧面与所述焊接材料的侧面基本上共面。
8.根据权利要求1所述的半导体裸片，基中所述UBM结构具有约1微米到约100微米之间的高度，且其中所述UBM结构具有在约1微米到约100微米之间的厚度。
9.根据权利要求1所述的半导体裸片，其中所述第一导电材料包括铜，所述第二导电材料包括镍。
10.根据权利要求1所述的半导体裸片，其中所述UBM结构包括柱，所述柱包括：
下部分，其包括铜且具有第一侧面；以及
上部分，其包括形成在所述下部分上方的镍，所述上部分具有第二侧面，
其中所述第一侧面与所述第二侧面基本上共面。
11.根据权利要求10所述的半导体裸片，其中套环与所述第一侧面接触，但不与所述第二侧面接触。
12.一种半导体裸片，其包括：
半导体材料，其具有固态组件；
互连件，其至少部分延伸穿过所述半导体材料；
凸块下金属UBM结构，其电耦合到所述互连件，其中所述UBM结构具有顶面、底面及在所述顶面与所述底面之间延伸的侧壁，且其中所述UBM结构包括第一导电材料和安置于所述第一导电材料上方的第二导电材料；
套环，其包围所述UBM结构的所述侧壁的至少一部分，使得所述套环接触所述第一导电材料的至少一部分，但不接触所述第二导电材料；及
焊接材料，其安置于所述UBM结构的所述顶面上方。
13.根据权利要求12所述的半导体裸片，其中所述套环包括抗湿材料，所述焊接材料不易于在液相中湿润所述抗湿材料。
14.根据权利要求12所述的半导体裸片，其中所述套环包括氧化物、氮化物或聚酰亚胺中的至少一者。
15.根据权利要求12所述的半导体裸片，其中所述套环的侧面与所述焊接材料的侧面基本上共面。
16.根据权利要求12所述的半导体裸片，其中所述UBM结构包括柱，所述柱包括：
下部分，其包括铜且具有第一侧面；以及
上部分，其包括形成在所述下部分上方的镍，所述上部分具有第二侧面，
其中所述第一侧面与所述第二侧面基本上共面。
17.根据权利要求16所述的半导体裸片，其中所述套环与所述第一侧面接触，但不与所述第二侧面接触。
18.一种半导体裸片，其包括：
半导体材料；
互连件，其至少部分延伸穿过所述半导体材料；
柱结构，其电耦合到所述互连件，其中所述柱结构包括下部分和上部分，所述下部分包括第一导电材料且具有第一侧面，所述上部分包括形成在所述下部分上方的第二导电材料，所述上部分具有第二侧面，
套环，其包围所述柱结构的至少一部分，使得所述套环接触所述第一侧面的至少一部分，并从所述柱的顶面凹入；及
焊接材料，其安置于所述柱结构的所述顶面上方。
19.根据权利要求18所述的半导体裸片，其中所述套环包括抗湿材料，所述焊接材料在液相中不易于湿润所述抗湿材料。
20.根据权利要求18所述的半导体裸片，其中所述套环的侧面与所述焊接材料的侧面基本上共面。
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