TWI623064B - 凸塊下金屬結構環及其相關之系統及方法 - Google Patents

凸塊下金屬結構環及其相關之系統及方法 Download PDF

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Publication number
TWI623064B
TWI623064B TW105125525A TW105125525A TWI623064B TW I623064 B TWI623064 B TW I623064B TW 105125525 A TW105125525 A TW 105125525A TW 105125525 A TW105125525 A TW 105125525A TW I623064 B TWI623064 B TW I623064B
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Taiwan
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ubm
collar
ubm structure
moisture
semiconductor die
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TW105125525A
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TW201721811A (zh
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喬治 馬利歐提尼
沙彌爾 維哈卡
韋恩 黃
安尼庫瑪 查杜魯
馬克 伯斯樂
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美光科技公司
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Abstract

本發明係針對用於晶粒間及/或封裝間互連件之凸塊下金屬(UBM)結構環之製造及其相關系統。一種半導體晶粒包含：一半導體材料，其具有固態組件；及一互連件，其至少部分延伸穿過該半導體材料。一凸塊下金屬(UBM)結構形成於該半導體材料上方且電耦合至對應互連件。一套環包圍該UBM結構之側表面之至少一部分，且一焊接材料安置於該UBM結構之頂面上方。

Description

凸塊下金屬結構環及其相關之系統及方法
本發明大體上係針對半導體裝置，且更特定言之，在若干實施例中，本發明係針對用於晶粒間及/或封裝間互連件之凸塊下金屬(UBM)結構。
諸如記憶體裝置、微處理器及發光二極體之微電子裝置通常包含安裝至一基板且裝入一塑膠保護覆蓋層中之一或多個半導體晶粒。半導體晶粒包含諸如記憶體胞、處理器電路及互連電路之功能特徵。半導體晶粒通常亦包含電耦合至功能特徵之焊墊。焊墊電連接至在保護覆蓋層外部延伸之接腳或其他類型之端子以將半導體晶粒連接至匯流排、電路或其他總成。 半導體晶粒製造商在減小由晶粒佔據之體積且增大所得囊封總成之容量及/或速度上承受越來越大壓力。為滿足此等需求，半導體晶粒製造商通常使多個晶粒彼此上下堆疊以在晶粒安裝至其之電路板或其他元件上之有限體積內增大裝置之容量或效能。在諸多應用中，晶粒在被囊封之前彼此上下堆疊以形成三維封裝。 堆疊半導體晶粒通常由附接至凸塊下金屬(UBM)結構之焊料凸塊或其他電連接器電連接。通常藉由將一銅晶種結構沈積至一晶圓上，在該銅晶種結構上形成具有與晶粒上之焊墊對準之開口之一遮罩，將銅鍍覆至該晶種結構上，且接著將一或多個其他材料鍍覆於該銅上方以形成UBM結構而形成UBM結構。通常選擇UBM結構之最上材料來促進用於隨後形成互連件於最上材料上之濕潤。在形成UBM結構之後，形成焊接材料之微凸塊於UBM結構之最上材料上方來充當互連件。在形成UBM結構及微凸塊之後，移除遮罩且使用一適合濕式蝕刻來移除晶種結構之曝露部分以形成隔離之UBM結構及微凸塊。本發明係針對改良型UBM結構及製造UBM結構之方法。
本文中描述用於製造半導體裝置之方法之若干實施例之特定細節及其相關之裝置及系統。術語「半導體裝置」大體上係指包含一或多個半導體材料之一固態裝置。半導體裝置之實例包含邏輯裝置、記憶體裝置、微處理器及二極體等等。此外，術語「半導體裝置」可係指一製成裝置或係指變成一製成裝置之前之各種處理階段中之一總成或其他結構。取決於其使用背景，術語「基板」可係指一晶圓級基板或一單粒化晶粒級基板。一般相關技術者將認識到，可在晶圓級或晶粒級處執行本文中所描述之方法之適合步驟。此外，除非內文另有指示，否則可使用習知半導體製造技術來形成本文中所揭示之結構。可(例如)使用化學氣相沈積、物理氣相沈積、原子層沈積、旋轉塗佈及/或其他適合技術來沈積材料。類似地，可(例如)使用電漿蝕刻、濕式蝕刻、化學機械平面化或其他適合技術來移除材料。 下文將在電耦合至TSV (諸如矽通孔，其具有在被完成時完全延伸穿過基板及/或封裝材料之導電插塞或連接器)之UBM結構之背景下描述本發明之諸多實施例。一般相關技術者亦應瞭解，本發明可包含用於形成UBM結構於一基板總成之第一側或第二側上之實施例，且可在與一半導體總成相關之其他電連接器之背景下使用UBM結構。相應地，可在沒有本文中參考圖1至圖6所描述之實施例之若干細節之情況下實踐本發明。為便於參考，使用相同元件符號來識別本發明中之類似或類比組件或特徵，但使用相同元件符號不隱含應將特徵解釋成相同的。其實，在本文所描述之諸多實例中，具有相同元件符號之特徵具有彼此結構及/或功能不同之複數個實施例。此外，相同陰影可用於指示可具有類似組成物之橫截面材料，但除非本文中特別註明，否則使用相同陰影不隱含應將材料解釋成相同的。 UBM結構及微凸塊使用回焊程序來附接至一相鄰晶粒。在安置於一UBM結構之頂部上之一微凸塊之回焊期間，微凸塊之一些材料(例如錫)可與UBM結構之材料(例如銅)反應，其會對UBM結構與相鄰晶粒之間之互連產生不利影響。例如，來自微凸塊之一些材料可歸因於沿UBM結構之側壁濕潤而外流。此可導致形成一金屬間化合物於微凸塊側壁上。另外，一些微凸塊材料(例如錫)可擴散，直至到達UBM結構材料(例如銅)且與UBM結構材料(例如銅)反應以導致微凸塊中之可用錫之莫耳體積收縮，亦指稱焊錫缺乏。此等兩個效應可導致可用於微凸塊之中心處之未反應焊接材料空乏以引起焊料接點中之空洞且降低電遷移可靠性。 本發明之若干實施例顯著降低一微凸塊之焊接材料在微凸塊之回焊期間與一UBM結構之材料反應之可能性。例如，本發明之若干實施例圍繞UBM結構之第一材料及/或第二材料之至少一部分(其保護UBM側壁免於與來自微凸塊之焊料反應)形成一套環。相應地，本發明之若干實施例減少微凸塊回焊期間之微凸塊與UBM側壁之間之反應，如下文將更詳細解釋。 圖1係示意性地繪示具有一半導體材料110之一基板總成100的一橫截面圖，半導體材料110具有一第一側112及一第二側114。基板總成100進一步包含位於半導體材料110之第二側114上之一介電材料116。複數個半導體晶粒120形成於基板總成100之離散區域處。儘管圖1中繪示兩個半導體晶粒120，但實際上，半導體總成100通常具有數百個或甚至超過1,000個個別半導體晶粒。個別半導體晶粒120可包含積體電路122及電耦合至積體電路122之複數個互連件124。在圖1所展示之實施例中，互連件124係包含一介電襯層126及介電襯層126內之一導電插塞128之TSV。相應地，互連件124可完全延伸穿過基板總成100。 半導體晶粒120進一步包含複數個UBM結構130，且個別UBM結構130電耦合至對應互連件124。在若干實施例中，個別UBM結構130包括電耦合至互連件124之一者之一第一材料132及位於第一材料132上方之一第二材料134。一抗濕材料136形成圍繞第一材料132之至少一部分及第二材料134之一套環138。半導體晶粒120亦可包含位於個別UBM結構130之第二材料134上方之微凸塊140。 在一特定實施例中，第一材料132包括銅，第二材料134包括鎳，微凸塊140包括一錫-銀焊接材料，且套環138包括氧化物，例如正矽酸四乙酯(TEOS)或另一氧化物。此實施例形成：一Cu/Ni UBM結構130，其具有形成於其上方之一微凸塊140；及氧化物套環，其包圍Ni之曝露側壁及Cu之至少一部分且未覆蓋UBM結構130之頂面(例如第二材料134之頂面)。在其他實施例中，第一材料132及第二材料134可包括任何導電材料，例如金、矽、鎢等等。UBM結構130之形狀及尺寸可變動。例如，在一些實施例中，UBM結構130實質上呈圓柱形以形成一柱狀結構，但在其他實施例中，UBM結構130可具有其他橫截面形狀，例如矩形、規則多邊形、不規則多邊形、橢圓形等等。UBM結構130可具有約1微米至約100微米之間之一厚度且可具有約1微米至約100微米之間之一高度。 微凸塊140可包括一焊接材料，例如錫-銀、銦或適合用於形成UBM結構130與一相鄰晶粒之間之一電連接及機械連接之另一焊接材料。在一些實施例中，形成套環138之抗濕材料136可包括防止第一材料132及第二材料134之側壁上之微凸塊140濕潤之一材料(例如，抗濕材料136對微凸塊140之材料提供一不可濕潤表面)。抗濕材料136可具有對微凸塊140之焊接材料之一極低或可忽略擴散性。例如，在一些實施例中，抗濕材料136包括氧化物、氮化物或聚醯亞胺。在一些實施例中，抗濕材料136具有約1000 Å至約5000 Å之間之一厚度，或在一些實施例中，具有約2000 Å至約2500 Å之間之一厚度。在若干實施例中，抗濕材料136完全包圍第一材料132及/或第二材料134之圓周之至少一部分，但在其他實施例中，抗濕材料136未覆蓋整個圓周。抗濕材料136亦沿UBM結構130之高度之至少一部分延伸；例如，抗濕材料136覆蓋UBM結構130之高度之至少80%。套環138包括抗濕材料136消除或減少沿UBM結構130之第一材料132及第二材料134之側壁濕潤來自微凸塊140之焊料。下文將參考圖2A至圖3G來描述根據本發明之形成UBM結構、套環及微凸塊之進一步實施例及態樣。 圖2A至圖2H係示意性地繪示用於形成UBM結構、套環及微凸塊之一方法之不同階段期間之基板總成100之一部分處之一半導體晶粒120的截面圖。參考圖2A，在方法之此階段中，半導體晶粒120具有形成於介電材料116及接近於基板110之第二側114之互連件124之部分上之一晶種結構240、及晶種結構240上之一遮罩250。晶種結構240可具有與互連件124之位置相關聯之第一區域242及介於第一區域242之間之第二區域244。晶種結構240可為適合用於鍍覆一UBM結構之基底或第一材料之一單一材料。在若干實施例中，晶種結構240包含一障壁材料及該障壁材料上之一晶種材料。該障壁材料可為鉭、氮化鉭、鈦、鈦-鎢或防止UBM材料擴散至介電材料116及基板100中之另一材料。該晶種材料可為銅、銅合金、鎳或適合使用此項技術中已知之電鍍或無電鍍覆技術來將第一材料132 (圖1)鍍覆至該晶種材料上之其他材料。實際上，晶種結構240可與互連件124之導電插塞128整合。 遮罩250可為具有與晶種結構240之第一區域242對準之複數個開口252之一光阻材料或其他適合遮罩材料。如下文將更詳細解釋，UBM結構形成於遮罩250之開口252中。當自圖2A中所展示之側觀看時，遮罩250之開口252具有一T形橫截面，其中一上部分254具有比一下部分256寬之一開口。可在光微影或其他適合技術期間使用一漏鉻遮罩來形成遮罩250中之此T形開口252。 圖2B係示意性地繪示已形成第一材料132於晶種結構240之曝露第一區域242 (圖2A)上之後之半導體晶粒120的一橫截面圖。在一實施例中，晶種結構240包含使用一物理氣相沈積程序來沈積之一銅晶種材料，且第一材料132包括使用此項技術中已知之電鍍或無電鍍覆程序來沈積至該銅晶種材料上之銅。相應地，第一材料132可界定UBM結構之一基底材料。在一實施例中，第一材料132在程序之此階段中具有一第一直徑(例如30 µm)及一高度(30 µm)，但第一材料132之該直徑及該高度可具有取決於特定半導體晶粒120之特定組態之任何其他適合尺寸。 圖2C係示意性地繪示已將第二材料134沈積至開口252中使得第二材料134位於第一材料132上方之後之半導體晶粒120的一橫截面圖。第二材料134可包括鎳或提供用於形成互連件於第二材料134上之一良好濕潤表面之其他適合材料。第一材料132及第二材料134可界定一UBM結構130。在程序之此階段中，半導體晶粒120具有透過晶種結構240而彼此電耦合之複數個UBM結構130。在一些實施例中，可一起省略第二材料，且UBM結構可僅包含第一材料。 圖2D係示意性地繪示根據本發明之一實施例之已移除遮罩250之一部分以界定套環開口258之後之半導體晶粒120的一橫截面圖。可使用一各向異性乾式蝕刻及乾洗來蝕刻遮罩250。乾式蝕刻可橫跨半導體晶粒120來實質上均勻地移除遮罩250，直至完全移除套環開口258中之相鄰於UBM結構130之遮罩250。套環開口258可界定套環138 (圖1)之一厚度，其(例如)具有約1000 Å至約5000 Å之間或約2000 Å至約2500 Å之間之一厚度。乾式蝕刻之參數(例如化學性、功率、溫度等等)可經調適以在蝕刻期間硬化遮罩250以使遮罩250準備用於後續沈積步驟。 圖2E係示意性地繪示根據本發明之一實施例之已形成抗濕材料136之後之半導體晶粒120的一橫截面圖。抗濕材料136可為微凸塊140 (圖1)之焊接材料不易於在液相中濕潤(例如，覆蓋)其之一材料及/或具有針對微凸塊140 (圖1)之焊接材料之低或可忽略擴散性。抗濕材料136可為氧化物、氮化物、聚醯亞胺或其他適合材料。在一實施例中，抗濕材料136係藉由低溫(例如，低於150°C)電漿增強型化學氣相沈積或其他適合程序而形成之正矽酸四乙酯(TEOS)。抗濕材料136經形成為遮罩250及開口252上方之一毯覆層，其包含覆蓋UBM結構130及填充套環開口258 (圖2D)。 圖2F係示意性地繪示根據本發明之一實施例之已移除抗濕材料136之部分之後之半導體晶粒120的一橫截面圖。可使用一緩衝氧化物蝕刻或一間隔物蝕刻及接著一濕洗來移除抗濕材料136之部分。如圖2F中所展示，已移除大多數抗濕材料136，直至抗濕材料136之剩餘部分僅位於套環開口258 (圖2D)中以形成套環138。在一些實施例中，套環138實質上可與第二材料134共面，而在其他實施例中，套環138可相對於第二材料134而凹入。 圖2G係示意性地繪示根據本發明之一實施例之已形成微凸塊140之後之半導體晶粒120的一橫截面圖。微凸塊140可由例如錫-銀或銦焊料之焊接材料形成，將微凸塊140鍍覆至開口252中之UBM結構130及套環138之頂部上。在一些實施例中，微凸塊140可具有約3微米至約50微米之間之一高度。 圖2H係示意性地繪示已移除遮罩250及晶種結構240之部分以使UBM結構130電隔離之後之半導體晶粒120的一橫截面圖。可使用一濕光阻剝離或其他適合技術來移除遮罩250，接著，可使用適合用於移除晶種結構之材料之一濕式蝕刻來移除晶種結構240之第二區域244。此時，使UBM結構彼此電隔離。 圖3A至圖3G係示意性地繪示根據本發明之另一實施例之UBM結構、套環及微凸塊之不同製造階段期間之基板總成100之一部分處之一半導體晶粒120的橫截面圖。參考圖3A，在方法之此階段中，半導體晶粒120在介電材料116及接近於基板110之第二側114之互連件124之部分上具有晶種結構240，且遮罩250位於晶種結構240上。晶種結構240具有與互連件124之位置相關聯之第一區域242及介於第一區域242之間之第二區域244。遮罩250可為具有與晶種結構240之第一區域242對準之複數個開口252之一光阻材料或其他適合遮罩材料。如下文將更詳細解釋，UBM結構形成於遮罩250之開口252中。 圖3B係示意性地繪示根據本發明之一實施例之已形成抗濕材料136之後之半導體晶粒120的一橫截面圖。抗濕材料136可為微凸塊140 (圖1)之焊接材料不易於在液相中濕潤(例如，覆蓋)其之一材料及/或具有對微凸塊140 (圖1)之焊接材料之低或可忽略擴散性。抗濕材料136可為氧化物(例如正矽酸四乙酯(TEOS)或其他氧化物)、氮化物、聚醯亞胺或其他適合材料。在一實施例中，抗濕材料136係藉由低溫(例如，低於150°C)電漿增強型化學氣相沈積或其他適合程序而形成之正矽酸四乙酯(TEOS)。抗濕材料136經形成為遮罩250及開口252上方之一毯覆層。 圖3C係示意性地繪示根據本發明之一實施例之已移除抗濕材料136之部分之後之半導體晶粒120的一橫截面圖。可使用一間隔氧化物蝕刻及接著一濕洗來移除抗濕材料136之部分。如圖3C中所展示，已移除抗濕材料136之上覆部分，直至抗濕材料136之剩餘部分僅沿開口252之側壁。 圖3D係示意性地繪示已形成第一材料132於晶種結構240之曝露第一區域242 (圖3C)上且已形成第二材料134於第一材料132上方之後之半導體晶粒120的一橫截面圖。在一實施例中，晶種結構240包含使用一物理氣相沈積程序來沈積之一銅晶種材料，且第一材料132包括使用此項技術中已知之一電鍍或無電鍍覆程序來沈積至該銅晶種材料上之銅。第一材料132及第二材料134可界定由抗濕材料136包圍之一UBM結構130。在程序之此階段中，半導體晶粒120具有透過晶種結構240而彼此電耦合之複數個UBM結構130。在一些實施例中，可一起省略第二材料，且UBM結構可僅包含第一材料。 圖3E係示意性地繪示已進一步移除抗濕材料136之部分以形成套環138之後之半導體晶粒120的一橫截面圖。類似於上文相對於圖3B所描述之程序，可使用一間隔氧化物蝕刻及接著一濕洗來移除抗濕材料136之額外部分。如圖3E中所展示，已移除抗濕材料136，直至僅沿開口252之側壁之剩餘抗濕材料136實質上與第二材料134共面且藉此形成套環138。 圖3F係示意性地繪示已形成微凸塊140之後之半導體晶粒120的一橫截面圖。微凸塊140可由例如錫-銀或銦焊料之焊接材料形成，將微凸塊140鍍覆至開口252中之UBM結構130及套環138之頂部上。在一些實施例中，微凸塊140可具有約3微米至約50微米之間之一高度。 圖3G係示意性地繪示已移除遮罩250及晶種結構240以使UBM結構130電隔離之後之半導體晶粒120的一橫截面圖。可使用一濕光阻剝離或其他適合技術來移除遮罩250，接著，可使用一適合濕式蝕刻來移除晶種結構240之第二區域244以使UBM結構130彼此電隔離。 圖4係根據本發明之一實施例之用於形成UBM結構於一半導體晶粒上之一方法400之一實施例之一流程圖。在此實施例中，方法400包含：形成一遮罩於一晶種結構上(區塊402)且將一第一材料鍍覆至該晶種結構之曝露區域上(區塊404)。例如，該遮罩具有曝露該晶種結構之區域之開口，該等區域電耦合至至少部分延伸穿過一半導體基板之互連件。在若干實施例中，將該遮罩之該等開口疊置於TSV上方。方法400進一步包含：將一第二材料沈積至該等開口中之該第一材料上方以藉此形成一UBM結構(區塊406)，且圍繞該UBM結構蝕刻一套環區域(區塊408)。方法接著進行：形成一抗濕材料於該UBM結構上方及至該套環區域中(區塊410)，接著蝕刻該抗濕材料，直至該抗濕材料實質上與該套環區域中之該第二材料共面(區塊412)。此步驟形成包圍該UBM結構之一套環。方法400接著進行：形成一微凸塊於該UBM結構上方(區塊414)。接著，可移除該遮罩，接著藉由濕式蝕刻而移除該等UBM結構之間之該晶種結構之該等曝露部分。 圖5係根據本發明之一實施例之用於形成UBM結構於一半導體晶粒上之一方法500之一實施例之一流程圖。在此實施例中，方法500包含：形成一遮罩於一晶種結構上(區塊502)且形成一抗濕材料於該遮罩及該晶種材料之曝露部分上方(區塊504)。例如，該遮罩具有曝露該晶種結構之區域之開口，該等區域電耦合至至少部分延伸穿過一半導體基板之互連件。在若干實施例中，將該遮罩之該等開口疊置於TSV上方。方法500進一步包含：蝕刻該抗濕材料，直至曝露該晶種結構且剩餘抗濕材料界定該等開口中之一套環(區塊506)。例如，可使用一緩衝氧化物蝕刻或一間隔物蝕刻及接著一濕洗來蝕刻該抗濕材料。方法500接著進行：將一第一材料鍍覆於該開口中之該晶種材料上方(區塊508)且形成一第二導電材料於該開口中之該第一導電材料上方，藉此形成一UBM結構(區塊510)。接著，方法500移除該抗濕材料，直至該套環實質上與該開口中之該第二導電材料共面(區塊512)。方法500接著進行：形成一微凸塊於該UBM結構上方(區塊514)。接著，可移除該遮罩，接著藉由濕式蝕刻而移除該等UBM結構之間之該晶種結構之該等曝露部分。 具有上文參考圖1至圖5所描述之特徵之半導體裝置之任何者可併入至大量較大及/或較複雜系統之任何者中，該等系統之一代表實例係圖6中示意性地展示之系統600。系統600可包含一處理器602、一記憶體604 (例如SRAM、DRAM、快閃記憶體及/或其他記憶體裝置)、輸入/輸出裝置606及/或其他子系統或組件608。上文參考圖1至圖5所描述之半導體裝置100可包含於圖6中所展示之元件之任何者中。所得系統600可經組態以執行各種適合計算、處理、儲存、感測、成像及/或其他功能之任何者。相應地，系統600之代表實例包含(但不限於)電腦及/或其他資料處理器，諸如桌上型電腦、膝上型電腦、網際網路設備、手持式裝置(例如掌上型電腦、可穿戴電腦、蜂巢式或行動電話、個人數位助理、音樂播放器等等)、平板電腦、多處理器系統、基於處理器或可程式化消費型電子產品、網路電腦及小型電腦。系統600之額外代表實例包含燈、相機、車輛等等。關於此等及其他實例，系統600可收容於一單一單元中或(例如)透過一通信網路而分佈於多個互連單元上。相應地，系統600之組件可包含本端及/或遠端記憶體儲存裝置及各種適合電腦可讀媒體之任何者。 應自上文瞭解，本文中已為了說明而描述本發明之特定實施例，但可在不背離本發明之範疇之情況下作出各種修改。相應地，本發明僅受限於隨附專利申請範圍。
100‧‧‧基板總成/半導體總成/半導體裝置
110‧‧‧半導體材料
112‧‧‧第一側
114‧‧‧第二側
116‧‧‧介電材料
120‧‧‧半導體晶粒
122‧‧‧積體電路
124‧‧‧互連件
126‧‧‧介電襯層
128‧‧‧導電插塞
130‧‧‧凸塊下金屬(UBM)結構
132‧‧‧第一材料
134‧‧‧第二材料
136‧‧‧抗濕材料
138‧‧‧套環
140‧‧‧微凸塊
240‧‧‧晶種結構
242‧‧‧第一區域
244‧‧‧第二區域
250‧‧‧遮罩
252‧‧‧開口
254‧‧‧上部分
256‧‧‧下部分
400‧‧‧方法
402‧‧‧區塊
404‧‧‧區塊
406‧‧‧區塊
408‧‧‧區塊
410‧‧‧區塊
412‧‧‧區塊
414‧‧‧區塊
500‧‧‧方法
502‧‧‧區塊
504‧‧‧區塊
506‧‧‧區塊
508‧‧‧區塊
510‧‧‧區塊
512‧‧‧區塊
514‧‧‧區塊
600‧‧‧系統
602‧‧‧處理器
604‧‧‧記憶體
606‧‧‧輸入/輸出裝置
608‧‧‧子系統/組件
可參考以下圖式來較佳地理解本發明之諸多態樣。圖式中之組件未必按比例繪製，而是代以將重點放在清楚地繪示本發明之原理上。 圖1係示意性地展示根據本發明之一實施例之複數個半導體晶粒的一基板總成之一橫截面圖。 圖2A至圖2H係示意性地繪示根據本發明之一實施例之一方法之各種階段中之一半導體晶粒之一部分的橫截面圖。 圖3A至圖3G係示意性地繪示根據本發明之另一實施例之一方法之各種階段中之一半導體晶粒之一部分的橫截面圖。 圖4係根據本發明之一實施例之一方法之一流程圖。 圖5係根據本發明之一實施例之一方法之一流程圖。 圖6係繪示根據本發明之一實施例之併入一半導體裝置之一系統的一方塊圖。

Claims (25)

  1. 一種半導體晶粒，其包括：一半導體材料，其具有固態組件；一互連件，其至少部分延伸穿過該半導體材料；一凸塊下金屬(UBM)結構，其電耦合至該互連件，其中該UBM結構具有一頂面、一底面及在該頂面與該底面之間延伸之一平面側壁，及其中該UBM結構包括包含銅之一第一導電材料及安置於該第一導電材料上方之包含鎳之一第二導電材料；一套環，其包圍該UBM結構之該平面側壁之至少一部分，其中該套環僅沿該UBM結構之該平面側壁之一高度之一部分延伸；及一焊接材料，其安置於該UBM結構之該頂面上方，其中該套環包括該焊接材料不易於在液相中濕潤其之一抗濕材料。
  2. 如請求項1之半導體晶粒，其中該套環包括一種氧化物、一種氮化物或聚醯亞胺之至少一者。
  3. 如請求項1之半導體晶粒，其中該套環具有約2000Å至約2500Å之間之一厚度。
  4. 如請求項1之半導體晶粒，其中該UBM結構係一支柱，且其中該套環僅覆蓋該支柱之該平面側壁。
  5. 如請求項1之半導體晶粒，其中該套環未覆蓋該UBM結構之該頂面。
  6. 如請求項5之半導體晶粒，其中該套環沿該UBM結構之該平面側壁之該高度之至少80%延伸。
  7. 如請求項1之半導體晶粒，其中該套環之一頂面實質上與該UBM結構之該頂面共面。
  8. 如請求項1之半導體晶粒，其中該UBM結構之該高度係在約1微米至約100微米之間，且其中該UBM結構具有約1微米至約100微米之間之一厚度。
  9. 如請求項1之半導體晶粒，其中該套環包括一種氧化物、一種氮化物或聚醯亞胺之至少一者。
  10. 一種半導體晶粒，其包括：一半導體材料，其具有固態組件；一互連件，其至少部分延伸穿過該半導體材料；一凸塊下金屬(UBM)結構，其電耦合至該互連件，其中該UBM結構具有一頂面、一底面及在該頂面與該底面之間延伸之一平面側壁，及其中該UBM結構包括包含銅之一第一導電材料及安置於該第一導電材料上方之包含一非銅材料之一第二導電材料；一套環，其包圍該UBM結構之該平面側壁之至少一部分，其中該環僅沿該UBM結構之該平面側壁之一高度之一部分延伸且未覆蓋該UBM結構之該頂面；及一焊接材料，其安置於該UBM結構之該頂面上方。
  11. 如請求項10之半導體晶粒，其中該套環包括該焊接材料不易於在液相中濕潤其之一抗濕材料。
  12. 如請求項10之半導體晶粒，其中該套環包括一種氧化物、一種氮化物或聚醯亞胺之至少一者。
  13. 如請求項10之半導體晶粒，其中該套環沿該UBM結構之該平面側壁之該高度之至少80%延伸。
  14. 如請求項10之半導體晶粒，其中該套環之一頂面實質上與該UBM結構之該頂面共面。
  15. 一種形成一半導體晶粒之方法，該方法包括：形成一凸塊下金屬(UBM)結構，其中形成該UBM結構包括：形成一遮罩於一晶種結構上，其中該遮罩具有曝露該晶種結構之一區域之一開口，該區域電耦合至至少部分延伸穿過一半導體基板之一互連件；將一第一材料鍍覆至該晶種結構之該曝露區域上；及將一第二材料沈積至該開口中之該第一材料上方；由一抗濕材料形成一套環，其中該套環包圍該UBM結構之一側壁之至少一部分且未覆蓋該UBM結構之一頂面；及將一焊接材料安置於該UBM結構之該頂面上，其中當該焊接材料呈液相時，該焊接材料不易於濕潤該抗濕材料。
  16. 如請求項15之方法，其進一步包括：移除該遮罩之至少一部分以藉此曝露該晶種結構之部分。
  17. 如請求項16之方法，其進一步包括：移除該晶種結構之該等曝露部分。
  18. 如請求項15之方法，其中該第一材料及該第二材料具導電性，且其中該抗濕材料包括一種氧化物、一種氮化物或聚醯亞胺之至少一者。
  19. 如請求項15之方法，其中該遮罩中之該開口具有一上部分及一下部分，其中該上部分比該下部分寬。
  20. 如請求項19之方法，其進一步包括：將該第一材料鍍覆至該開口之該下部分中；將該第二材料沈積至該開口之該下部分中之該第一材料上方以藉此形成該UBM結構於該下部分中；移除該遮罩之一部分以界定包圍該UBM結構之一套環開口；及形成包括該抗濕材料之該套環於該套環開口中。
  21. 如請求項20之方法，其中形成包括該抗濕材料之該套環於該套環開口中包括：將該抗濕材料之一毯覆層沈積於該遮罩及該開口上方；及蝕刻以移除該抗濕材料之一部分且保留該套環開口中之該抗濕材料。
  22. 一種形成一半導體晶粒之方法，該方法包括：由一抗濕材料形成一套環，其中該套環包圍一凸塊下金屬(UBM)結構之一側壁之至少一部分且未覆蓋該UBM結構之一頂面；及將一焊接材料安置於該UBM結構之該頂面上，其中當該焊接材料呈液相時，該焊接材料不易於濕潤該抗濕材料，其中形成該套環包括：形成一遮罩於一晶種結構上，其中該遮罩具有曝露該晶種結構之一區域之一第一開口，該區域電耦合至至少部分延伸穿過一半導體基板之一互連件；及形成該套環於該晶種結構之該曝露區域上方，該套環界定一第二開口。
  23. 如請求項22之方法，其進一步包括：藉由將一第一材料沈積至該第二開口中且將一第二材料沈積於該第一材料上方而形成該UBM結構。
  24. 如請求項22之方法，其進一步包括：將一焊接材料沈積於該套環及該第二材料上方；移除該遮罩之至少一部分以藉此曝露該晶種結構之一部分；及移除該晶種結構之該曝露部分。
  25. 如請求項22之方法，其中形成該套環包括：將該抗濕材料之一毯覆層沈積於該遮罩及該第一開口上方，該抗濕材料塗佈該開口之內側表面；及對該抗濕材料執行一各向異性蝕刻以自該第一開口之一底面移除抗濕材料以藉此形成該第二開口。
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