CN113630957A - PCB with punching target and preparation method thereof - Google Patents

PCB with punching target and preparation method thereof Download PDF

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Publication number
CN113630957A
CN113630957A CN202110983705.XA CN202110983705A CN113630957A CN 113630957 A CN113630957 A CN 113630957A CN 202110983705 A CN202110983705 A CN 202110983705A CN 113630957 A CN113630957 A CN 113630957A
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China
Prior art keywords
target
punching
groove
slot
layer
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CN202110983705.XA
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Chinese (zh)
Inventor
王欣
牛俊杰
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APCB Electronics Shenzhen Co Ltd
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APCB Electronics Shenzhen Co Ltd
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Priority to CN202110983705.XA priority Critical patent/CN113630957A/en
Publication of CN113630957A publication Critical patent/CN113630957A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/005Punching of holes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention discloses a PCB with a punching target and a preparation method thereof. The PCB with the punching target comprises an insulating resin layer and a conducting layer, wherein a first target groove and a second target groove which are mutually crossed are arranged on the conducting layer, and the groove bottoms of the first target groove and the second target groove are both the insulating resin layer; the first target groove and the second target groove form a punching target corresponding to punching, the intersection point of the first target groove and the second target groove is the central point of the punching target, and the central point of the punching target corresponds to the central point of the punching. The PCB with the punching target forms the punching target through the first target groove and the second target groove which are mutually crossed, and by combining data of a test example part, the periphery of the corresponding hole target of the punching target is smooth and neat after punching, and no white edge appears around the corresponding hole target, so that subsequent riveting operation is facilitated, and the production quality is improved.

Description

PCB with punching target and preparation method thereof
Technical Field
The invention relates to the field of PCB processing, in particular to a PCB with a punching target and a preparation method thereof.
Background
In the production process of the PCB, the steps are indispensable in punching. In order to ensure the accuracy of the punching, a punching target is usually disposed on the PCB.
The traditional punching target is in the same shape as the punched hole, but in the actual production process, white edges can appear around the corresponding punching target after punching, and the risk of layer deviation is caused due to resistance caused by rivet punching.
Disclosure of Invention
Based on this, there is a need for a PCB board with a punching target that can solve the above problems.
In addition, a preparation method of the PCB with the punching target is also needed.
A PCB with a punching target comprises an insulating resin layer and a conducting layer arranged on the insulating resin layer, wherein a first target groove and a second target groove which are mutually crossed are arranged on the conducting layer, and the groove bottoms of the first target groove and the second target groove are both the insulating resin layer;
the first target groove and the second target groove form a punching target corresponding to punching, the intersection point of the first target groove and the second target groove is the central point of the punching target, the central point of the punching target corresponds to the central point of the punching, the length of the first target groove is not less than the diameter of the punching, and the length of the second target groove is not less than the diameter of the punching.
The preparation method of the PCB with the punching target comprises the following steps:
providing a conductive substrate comprising an insulating resin layer and a conductive layer disposed on the insulating resin layer; and
etching to form a first target groove and a second target groove which are mutually crossed on the conducting layer to obtain the PCB with the punching target, wherein the groove bottom of the first target groove and the groove bottom of the second target groove are both the insulating resin layer, the first target groove and the second target groove form the punching target corresponding to the punching hole, the intersection point of the first target groove and the second target groove is the central point of the punching target, the central point of the punching target corresponds to the central point of the punching hole, the length of the first target groove is not less than the diameter of the punching hole, and the length of the second target groove is not less than the diameter of the punching hole.
The PCB with the punching target forms the punching target through the first target groove and the second target groove which are mutually crossed, and by combining data of a test example part, the periphery of the corresponding hole target of the punching target is smooth and neat after punching, and no white edge appears around the corresponding hole target, so that subsequent riveting operation is facilitated, and the production quality is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Wherein:
fig. 1 is a schematic front view of a PCB board with a punching target according to an embodiment.
Fig. 2 is a schematic cross-sectional view at a-a of the PCB board with the punching target shown in fig. 1.
Fig. 3 is a flowchart of a method for manufacturing a PCB board with a punching target according to an embodiment.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The PCB with the punching target of one embodiment as shown in fig. 1 and 2 includes an insulating resin layer 10 and a conductive layer 20 disposed on the insulating resin layer 10, wherein a first target groove 32 and a second target groove 34 are disposed on the conductive layer 20 and intersect each other, and both the groove bottom of the first target groove 32 and the groove bottom of the second target groove 34 are the insulating resin layer 10.
The first target slot 32 and the second target slot 34 form a punching target 30 corresponding to a punched hole, the intersection point of the first target slot 32 and the second target slot 34 is the central point of the punching target 30, the central point of the punching target 30 corresponds to the central point of the punched hole, the length of the first target slot 32 is not less than the diameter of the punched hole, and the length of the second target slot 34 is not less than the diameter of the punched hole.
The intersection of first target slot 32 and second target slot 34 is the center point of punch target 30, meaning that the intersection of first target slot 32 and second target slot 34 is the midpoint of first target slot 32 and the intersection of first target slot 32 and second target slot 34 is the midpoint of second target slot 34.
The PCB with the punching target forms the punching target 30 through the first target groove 32 and the second target groove 34 which are mutually crossed, and by combining data of a test example part, the periphery of the corresponding hole target of the punching target 30 is smooth and neat after punching, and no white edge appears around the corresponding hole target, so that the follow-up riveting operation is facilitated, and the production quality is improved.
Preferably, in this embodiment, the first target groove 32 and the second target groove 34 have the same length. The first target groove 32 and the second target groove 34 have the same length, and the quality around the corresponding hole target after punching can be further improved.
Preferably, in the present embodiment, the ratio of the length of the first target groove 32 to the diameter of the punched hole is 1.005 to 1.04: 1.
generally, the length of the first target slot 32 is slightly greater than the diameter of the punched hole.
Specifically, the length of the first target groove 32 is the sum of the diameter of the punched hole and 1mil to 10 mils. Taking a standard punch as an example, the diameter of the standard punch is 3.175mm, the length of the first target slot 32 is 3.175mm +1mil to 3.175mm +10 mil.
Here, it should be noted that 1mm is 39.37 mil.
Preferably, the angle between the first target slot 32 and the second target slot 34 is 30-90 °.
More preferably, the angle between the first target slot 32 and the second target slot 34 is 60 ° to 90 °.
Particularly preferably, in the present embodiment, the angle between the first target groove 32 and the second target groove 34 is 90 °.
In this embodiment, the conductive layer 20 is a copper conductive layer. In other embodiments, the conductive layer 20 may also be an aluminum conductive layer or an iron conductive layer.
Preferably, the ratio of the width of the first target slot 32 to the length of the first target slot 32 is 1: 10-20, wherein the ratio of the width of the second target slot 34 to the length of the second target slot 34 is 1: 10 to 20.
More preferably, the width of first target slot 32 is the same as the width of second target slot 34, and the ratio of the width of first target slot 32 to the length of first target slot 32 is 1: 10 to 20.
With reference to fig. 3, the present invention further discloses a method for manufacturing the PCB board with the punching target according to an embodiment, including the following steps:
and S10, providing a conductive substrate.
The conductive substrate includes an insulating resin layer and a conductive layer disposed on the insulating resin layer 10.
In this embodiment, the conductive substrate is a copper-clad substrate. Specifically, the copper-clad substrate may be a gold-immersion copper substrate, a silver-plating copper substrate, a tin-spraying copper substrate, or an oxidation-resistant copper substrate.
In other embodiments, the conductive layer 20 may be an aluminum substrate or an iron substrate.
And S20, etching the conductive layer 20 to form a first target groove 32 and a second target groove 34 which are intersected with each other, and obtaining the PCB with the punching targets.
The groove bottom of the first target groove 32 and the groove bottom of the second target groove 34 are both insulating resin layers 10, the first target groove 32 and the second target groove 34 form a punching target corresponding to punching, the intersection point of the first target groove 32 and the second target groove 34 is the central point of the punching target 30, the central point of the punching target 30 corresponds to the central point of the punching, the length of the first target groove 32 is not less than the diameter of the punching, and the length of the second target groove 34 is not less than the diameter of the punching.
Preferably, the operation of etching the conductive layer to form the first and second target grooves 32 and 34 crossing each other is:
coating a photo-cured layer on the conductive layer 20, and transferring a photosensitive pattern onto the photo-cured layer by light irradiation (preferably, ultraviolet rays), wherein the photosensitive pattern includes an exposed region and a non-exposed region corresponding to the first and second target grooves 32 and 34 crossing each other;
removing the photocuring layer in the non-exposure area to expose the conductive layer 20 and form an etching area;
removing the conductive layer 20 in the etched region so that the insulating resin layer 10 is exposed, thereby forming a punching target 30 composed of a first target groove 32 and a second target groove 34 in the etched region;
the photocurable layer in the exposed areas is removed.
Specifically, the photocurable layer is a photosensitive ink, and the photosensitive ink can be cured by irradiation of ultraviolet rays.
Specifically, the operation of removing the photocurable layer in the non-exposed region is: through Na2CO3The cleaning solution washes the photosensitive ink in the non-exposed area.
The photosensitive ink in the exposed area is cured under the irradiation of ultraviolet rays, and the photosensitive ink in the non-exposed area is not cured, so that the photosensitive ink can be mixed with Na in the cleaning liquid2CO3A reaction occurs to be washed away by the cleaning liquid, exposing the conductive layer 20.
Specifically, the operation of removing the conductive layer 20 in the etched region is: the conductive layer 20 in the etched region is removed by HCl gas etching.
The HCl gas etches the conductive layer 20 away by redox reaction while preventing damage because the HCl gas does not react with the insulating resin layer 10.
Specifically, the operation of removing the photocurable layer within the exposure area is: the cured photosensitive ink is stripped using a strong base (e.g., NaOH) solution to react with the cured photosensitive ink.
The following are specific examples.
In the embodiment, the conductive substrate is an oxidation-resistant copper substrate produced by Shenzhen high-tech limited, and the punched holes are standard punched holes with the diameter of 3.175 mm.
Example 1
And providing an oxidation-resistant copper substrate, and etching to form a first target groove and a second target groove which are mutually crossed on the copper conducting layer, wherein the first target groove and the second target groove form a punching target, so that the PCB with the punching target is obtained.
Wherein, first target slot and second target slot are perpendicular, and the length of first target slot and second target slot is 3.175mm +1mil, and the width of first target slot and second target slot is 0.25 mm.
Example 2
And providing an oxidation-resistant copper substrate, and etching to form a first target groove and a second target groove which are mutually crossed on the copper conducting layer, wherein the first target groove and the second target groove form a punching target, so that the PCB with the punching target is obtained.
Wherein, first target slot and second target slot are perpendicular, and the length of first target slot and second target slot is 3.175mm +5mil, and the width of first target slot and second target slot is 0.3 mm.
Example 3
And providing an oxidation-resistant copper substrate, and etching to form a first target groove and a second target groove which are mutually crossed on the copper conducting layer, wherein the first target groove and the second target groove form a punching target, so that the PCB with the punching target is obtained.
Wherein, the contained angle of first target slot and second target slot is 60, and the length of first target slot and second target slot is 3.175mm +1mil, and the width of first target slot and second target slot is 0.25 mm.
Comparative example
And providing an oxidation-resistant copper substrate, and etching the copper conducting layer to form a circular punching target to obtain the PCB with the punching target.
The diameter of the circular punch target was 3.175mm +1 mil.
Test example
The PCB boards with the punching targets prepared in examples 1, 2, and 3 and the comparative example were subjected to a punching test, respectively, with a punching diameter of 3.175mm, and observed after punching, to obtain table 1 below.
Table 1: punching test result of four PCB boards with punching targets
Figure BDA0003229847120000061
As can be seen from table 1, the PCB boards with the punching targets prepared in embodiments 1, 2, and 3 have smooth and regular peripheries of the corresponding hole targets after punching, and no white edge appears at the peripheries of the corresponding hole targets, which is helpful for subsequent riveting operation and improves production quality.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. The PCB with the punching target is characterized by comprising an insulating resin layer and a conducting layer arranged on the insulating resin layer, wherein a first target groove and a second target groove which are mutually crossed are arranged on the conducting layer, and the groove bottoms of the first target groove and the second target groove are both the insulating resin layer;
the first target groove and the second target groove form a punching target corresponding to punching, the intersection point of the first target groove and the second target groove is the central point of the punching target, the central point of the punching target corresponds to the central point of the punching, the length of the first target groove is not less than the diameter of the punching, and the length of the second target groove is not less than the diameter of the punching.
2. The PCB board with punch targets of claim 1, wherein the first target slot and the second target slot are the same length.
3. The PCB board with the punching target of claim 2, wherein the ratio of the length of the first target groove to the diameter of the punching hole is 1.005-1.04: 1.
4. the PCB board with punch target of claim 3, wherein the length of the first target slot is the sum of the diameter of the punch hole and 1mil to 10 mils.
5. The PCB with the punching target of any one of claims 1 to 4, wherein the conductive layer is a copper conductive layer, an aluminum conductive layer or an iron conductive layer.
6. The PCB board with punching target of claim 5, wherein the included angle between the first target slot and the second target slot is 60-90 °.
7. The PCB board with punch targets of claim 5, wherein a ratio of a width of the first target slot to a length of the first target slot is 1: 10-20, wherein the ratio of the width of the second target slot to the length of the second target slot is 1: 10 to 20.
8. The PCB board with punch targets of claim 7, wherein the width of the first target slot is the same as the width of the second target slot, and the ratio of the width of the first target slot to the length of the first target slot is 1: 10 to 20.
9. A method for preparing a PCB board with a punching target according to any one of claims 1 to 8, which is characterized by comprising the following steps:
providing a conductive substrate comprising an insulating resin layer and a conductive layer disposed on the insulating resin layer; and
etching to form a first target groove and a second target groove which are mutually crossed on the conducting layer to obtain the PCB with the punching target, wherein the groove bottom of the first target groove and the groove bottom of the second target groove are both the insulating resin layer, the first target groove and the second target groove form the punching target corresponding to the punching hole, the intersection point of the first target groove and the second target groove is the central point of the punching target, the central point of the punching target corresponds to the central point of the punching hole, the length of the first target groove is not less than the diameter of the punching hole, and the length of the second target groove is not less than the diameter of the punching hole.
10. The method for preparing a PCB board with a punching target according to claim 9, wherein the operations of etching the first and second target grooves crossing each other on the conductive layer are:
coating a photocuring layer on the conductive layer, and transferring a photosensitive pattern onto the photocuring layer by illumination, wherein the photosensitive pattern comprises an exposure area and a non-exposure area corresponding to the first target groove and the second target groove which are intersected with each other;
removing the photocuring layer in the non-exposure area to expose the conductive layer to form an etching area;
removing the conductive layer within the etched region so that the insulating resin layer forms a punching target composed of the first target groove and the second target groove within the etched region;
removing the photocurable layer within the exposed area.
CN202110983705.XA 2021-08-25 2021-08-25 PCB with punching target and preparation method thereof Pending CN113630957A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014011403A (en) * 2012-07-02 2014-01-20 Shindo Denshi Kogyo Kk Method of manufacturing wiring board
WO2015096667A1 (en) * 2013-12-27 2015-07-02 广州兴森快捷电路科技有限公司 Drilling method for circuit board
CN205987531U (en) * 2016-08-26 2017-02-22 广州兴森快捷电路科技有限公司 Circuit board with counterpoint target

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014011403A (en) * 2012-07-02 2014-01-20 Shindo Denshi Kogyo Kk Method of manufacturing wiring board
WO2015096667A1 (en) * 2013-12-27 2015-07-02 广州兴森快捷电路科技有限公司 Drilling method for circuit board
CN205987531U (en) * 2016-08-26 2017-02-22 广州兴森快捷电路科技有限公司 Circuit board with counterpoint target

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Application publication date: 20211109