CN117377223A - Production process of multilayer circuit board with high qualification rate and circuit board thereof - Google Patents
Production process of multilayer circuit board with high qualification rate and circuit board thereof Download PDFInfo
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- CN117377223A CN117377223A CN202311463844.5A CN202311463844A CN117377223A CN 117377223 A CN117377223 A CN 117377223A CN 202311463844 A CN202311463844 A CN 202311463844A CN 117377223 A CN117377223 A CN 117377223A
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- circuit board
- circuit
- conductive
- oxidation corrosion
- conductive part
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 56
- 238000012797 qualification Methods 0.000 title claims abstract description 24
- 238000005260 corrosion Methods 0.000 claims abstract description 58
- 230000007797 corrosion Effects 0.000 claims abstract description 52
- 230000003647 oxidation Effects 0.000 claims abstract description 51
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 51
- 238000005553 drilling Methods 0.000 claims abstract description 21
- 238000003466 welding Methods 0.000 claims abstract description 20
- 238000000227 grinding Methods 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 15
- 238000011161 development Methods 0.000 claims abstract description 14
- 238000004458 analytical method Methods 0.000 claims abstract description 13
- 238000004140 cleaning Methods 0.000 claims abstract description 13
- 238000009832 plasma treatment Methods 0.000 claims abstract description 11
- 230000002265 prevention Effects 0.000 claims abstract description 8
- 238000002791 soaking Methods 0.000 claims abstract description 7
- 238000005520 cutting process Methods 0.000 claims abstract description 6
- 238000004381 surface treatment Methods 0.000 claims abstract description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 23
- 229910052802 copper Inorganic materials 0.000 claims description 18
- 239000010949 copper Substances 0.000 claims description 18
- 238000009826 distribution Methods 0.000 claims description 16
- 238000012545 processing Methods 0.000 claims description 14
- 238000010586 diagram Methods 0.000 claims description 13
- 239000011248 coating agent Substances 0.000 claims description 12
- 238000000576 coating method Methods 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 12
- 239000011265 semifinished product Substances 0.000 claims description 9
- 239000007788 liquid Substances 0.000 claims description 7
- 238000007639 printing Methods 0.000 claims description 6
- 239000011889 copper foil Substances 0.000 claims description 4
- 239000007800 oxidant agent Substances 0.000 claims description 3
- 238000005536 corrosion prevention Methods 0.000 claims 1
- 230000002123 temporal effect Effects 0.000 claims 1
- 238000007405 data analysis Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 10
- VLKZOEOYAKHREP-UHFFFAOYSA-N n-Hexane Chemical compound CCCCCC VLKZOEOYAKHREP-UHFFFAOYSA-N 0.000 description 6
- 238000001035 drying Methods 0.000 description 5
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 4
- IMNFDUFMRHMDMM-UHFFFAOYSA-N N-Heptane Chemical compound CCCCCCC IMNFDUFMRHMDMM-UHFFFAOYSA-N 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000002156 mixing Methods 0.000 description 4
- 238000004506 ultrasonic cleaning Methods 0.000 description 4
- 238000003475 lamination Methods 0.000 description 3
- 239000000047 product Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 2
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 2
- CDQSJQSWAWPGKG-UHFFFAOYSA-N butane-1,1-diol Chemical compound CCCC(O)O CDQSJQSWAWPGKG-UHFFFAOYSA-N 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- SBZXBUIDTXKZTM-UHFFFAOYSA-N diglyme Chemical compound COCCOCCOC SBZXBUIDTXKZTM-UHFFFAOYSA-N 0.000 description 2
- 239000003814 drug Substances 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 239000003921 oil Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000004814 polyurethane Substances 0.000 description 2
- 229920002635 polyurethane Polymers 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- UBOXGVDOUJQMTN-UHFFFAOYSA-N trichloroethylene Natural products ClCC(Cl)Cl UBOXGVDOUJQMTN-UHFFFAOYSA-N 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/227—Drying of printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4635—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating flexible circuit boards using additional insulating adhesive materials between the boards
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention belongs to the technical field of circuit board production, in particular to a production process of a multilayer circuit board with high qualification rate and a circuit board thereof, comprising the following steps: cutting and grinding the plate, and step two: drilling and slotting, and a step III: soaking and cleaning, namely, a step four: plasma treatment, step five: surface treatment, namely, step six: and (7) copper-clad development, namely: drilling and stacking, namely, a step eight: etching and welding prevention, namely, step nine: and (3) baking and welding to form, wherein the area of the conductive part of the circuit board is analyzed: obtaining the oxidation corrosion rate of the circuit board production, selecting a proper production environment according to the oxidation corrosion rate of the circuit board production, tracking and analyzing the conductive circuit of the circuit board: the technical problem that the arrangement of the conductive circuit of the circuit board is unreasonable is solved, so that the production qualification rate of the circuit board is improved, and the problem that a complete system for judging whether the production quality of the circuit board is qualified through specific data analysis is not formed in the production flow of the circuit board as a whole through twice analysis of the circuit board data is solved.
Description
Technical Field
The invention belongs to the technical field of circuit board production, and particularly relates to a multilayer circuit board production process with high qualification rate and a circuit board thereof.
Background
Development of integrated circuits: with the advancement of integrated circuit technology, the number of components on a single chip is increasing, which requires that the circuit density of PCBs must be increased. Multilayer circuit board technology has been developed that can effectively solve this problem.
Upgrading and updating of electronic products: with the development of technology, there is an increasing demand for electronic products, which requires that the electronic products have higher performance, lower power consumption and smaller structural dimensions. Multilayer circuit board technology may achieve these objectives.
One patent application with publication number 201310545451 discloses a production process of a multilayer circuit board, which comprises inner layer cutting, inner layer grinding, silk-screen wet film, drying, exposure, development, etching, film stripping, AOI inspection, browning, typesetting, lamination, edge milling, drilling, grinding, copper deposition, oxidation prevention treatment, plate surface electroplating, circuit grinding, film pasting, circuit exposure, circuit development, tin electroplating, film stripping, etching, tin stripping, etching inspection, green oil grinding, green oil, silk-screen white word, surface treatment, molding processing, testing, FQC and packaging.
In the prior art, only a process for producing the circuit board exists, and a complete system for judging whether the production quality of the circuit board is qualified or not through specific data analysis is not formed in the production flow of the circuit board.
Therefore, the invention provides a production process of a multilayer circuit board with high qualification rate and the circuit board thereof.
Disclosure of Invention
In order to overcome the deficiencies of the prior art, at least one technical problem presented in the background art is solved.
The technical scheme adopted for solving the technical problems is as follows: the invention relates to a production process of a multilayer circuit board with high qualification rate and a circuit board thereof, comprising the following steps: and the defects existing in the production flow of the circuit board are found out through specific analysis of the copper-clad development step and the etching solder mask step, so that the qualification rate of the production of the circuit board is improved.
The production process of the multilayer circuit board with high qualification rate and the circuit board thereof provided by the embodiment of the invention comprise the following steps:
step one: cutting and grinding the plate, and step two: drilling and slotting, and a step III: soaking and cleaning, namely, a step four: plasma treatment, step five: surface treatment, namely, step six: and (7) copper-clad development, namely: drilling and stacking, namely, a step eight: etching and welding prevention, namely, step nine: baking and welding to form;
in the first step, a plurality of circuit board base material materials are selected according to requirements, and are processed through a dividing machine to form a plurality of circuit board base materials with proper sizes;
in the second step, after the division of the plurality of base materials is completed, positioning holes are respectively drilled on the plurality of base materials by using drilling equipment, slotting processing is respectively carried out on the plurality of circuit boards at proper positions by using a slotting machine according to design requirements, board grinding processing is respectively carried out on two sides of the circuit boards by using a board grinding machine after the slotting processing is completed, and the circuit boards after the board grinding processing are placed for standby;
in the third step, after the circuit board grinding in the second step is completed, respectively placing the circuit board into an ultrasonic cleaner filled with cleaning liquid for ultrasonic cleaning, wherein the cleaning liquid is formed by mixing trichloroethylene, hexane, heptane, diethylene glycol dimethyl ether, isopropanol and butanediol according to the mass part ratio of 2.5:1:2:1:1:1, the cleaning time of the ultrasonic cleaner is 2-3min, soaking for a period of time after the cleaning is completed, and then washing cleanly for standby;
in the fourth step, after the ultrasonic cleaning of the circuit board in the third step is completed, respectively performing plasma treatment on the surface of the circuit board by using a plasma machine, wherein the plasma treatment time is 10-20min, and the circuit board is ready for use after completion;
in the fifth step, after the plasma treatment of the circuit board in the fourth step is completed, coating an anti-corrosion layer on the surface of the circuit board respectively, and mixing acrylic acid, polyurethane, organic silicon, UV resin and epoxy resin according to a proportion, carrying out anti-corrosion treatment on the circuit board, and reserving after the anti-corrosion treatment is completed;
in the sixth step, after the corrosion-resistant treatment of the circuit board in the fifth step is completed, printing ink on the parts of the plurality of circuit boards, which need to be paved with copper, respectively, covering copper foil on the printing ink to form a copper-clad conductive layer, coating the parts of the plurality of circuit boards, which are not needed, with a developing solution, exposing the developing solution to an oxidizing agent for oxidation corrosion, and corroding the parts, which are not needed, to expose the conductive parts;
wherein the conductive portions are analyzed in terms of different time dimensions and spatial environment dimensions; the method comprises the following specific steps:
s101, after the unnecessary part of the circuit board subjected to oxidation corrosion in the step six is obtained, the area of the original exposed conductive part is marked as a i;
s102, presetting a time period to be one month, marking the time period as f i, wherein the time period unit is a day;
s103, placing the circuit board in different space environments, analyzing the areas of the conductive parts to obtain oxidation corrosion rates of the conductive parts of the circuit board in different space dimensions, and comparing the oxidation corrosion rates to obtain a more suitable space environment for circuit board production and standby placement, thereby improving the qualification rate of circuit board production;
the specific process of step S103 is as follows:
s301, placing the circuit board in a dry environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the dry environment as bi;
s302, placing the circuit board in a wet environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the wet environment as ci;
s303, placing the circuit board in a high-temperature environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the high-temperature environment as d i;
preferably, the circuit board may be placed in an environment with a variety of different combinations of conditions, such as: high temperature drying, high temperature humidity, low temperature drying, low temperature humidity, etc.;
performing difference processing on the obtained area of the conductive part of the circuit board placed in different environments and the original area of the conductive part to obtain the oxidation corrosion area of the conductive part of the circuit board;
the oxidation corrosion areas of the conductive parts of the circuit board are marked as Ki, wherein the oxidation corrosion areas of the conductive parts of the corresponding circuit board under various environments are Ki 1, ki2 and Ki 3.
The area of the conductive part of the circuit board is less than or equal to the area of the original conductive part of the circuit board;
s304, marking the oxidation corrosion area of the obtained conductive part of the circuit board as Ki, and performing ratio processing (oxidation corrosion area Ki/time period f i) on the obtained conductive part of the circuit board with a preset time period f i to obtain the oxidation corrosion rate of the conductive part of the circuit board, and marking the oxidation corrosion rate of the conductive part of the circuit board as g i;
s305, calculating oxidation corrosion rate marks g i of the conductive parts of the circuit board under different environments according to the obtained oxidation corrosion areas of the conductive parts of the circuit board under various environments being Ki 1, ki2 and Ki 3.
Comparing oxidation corrosion rates of the conductive parts of the circuit board in different environments, and selecting a space environment corresponding to the oxidation corrosion rate gi of the conductive part of the minimum circuit board as a production and standby placement environment of the circuit board;
in the seventh step, after the development copper coating in the sixth step is completed, drilling positions of the plurality of circuit boards to be drilled respectively by using a drilling machine, coating prepregs among the plurality of drilled circuit boards after the drilling is completed, bonding the circuit boards together, performing drilling and dredging again after the bonding is firm, performing pressing treatment after the bonding is completed, and bonding the plurality of single circuit boards into a multilayer circuit board semi-finished product;
in the eighth step, after the multilayer circuit board semi-finished product is manufactured by lamination in the seventh step, the copper layer on the multilayer circuit board semi-finished product is further etched according to the pattern by using the etching liquid medicine, the copper layer serving as a circuit is reserved, and then the two surfaces of the multilayer circuit board semi-finished product are coated with the anti-welding ink layer;
in the step nine, after the coating of the solder mask ink layer in the step eight is completed, a baking and welding treatment is performed by using a baking and welding machine, the baking temperature of the baking and welding machine is 105-115 ℃, the baking time is 2-3 hours, and the wires with different layers are baked together at a high temperature to prepare the multilayer circuit board.
In a first comparative example, another way of improving the yield of circuit boards according to the present invention is: in the eighth step of the first embodiment, the copper layer conductive line of the circuit board is tracked and analyzed, so that the technical problem of unreasonable arrangement of the conductive line of the circuit board is solved, and the production qualification rate of the circuit board is improved;
specifically, tracking the conductive circuit of the circuit board to obtain a circuit distribution diagram of the circuit board, and judging whether the circuit has a disconnection condition or not and whether the arrangement among the circuits meets the requirement standard or not based on the circuit distribution diagram;
wherein the analysis steps are as follows:
s110, checking whether broken interfaces exist between the lines and each branch based on the line distribution diagram, and if the broken interfaces exist in the lines, reworking the circuit board, and readjusting the lines;
if the line has no broken interface, the next analysis is carried out;
s120, based on the line without a break interface, marking each branch of the line as l i, l i2, l i 3.
The distance between the branches is the distance between the branches which are parallel to each other;
the spacing between the branches is denoted o i;
presetting a standard spacing threshold value between each branch as p i according to requirements;
if o i is more than or equal to p i, the distribution of the conductive lines of the circuit board is reasonable, and the next analysis can be performed;
if o i is less than p i, the distribution of the conductive lines of the circuit board is unreasonable, the circuit board is reworked according to the branch marks, and the conductive lines of the circuit board are rearranged according to the use requirement;
s130, analyzing based on a circuit board with reasonable distribution of the conductive lines, and judging whether the circuit is short-circuited or not by comparing the current and the voltage of the conductive lines;
specifically, for a series circuit, measuring the current of each branch in the circuit, judging whether the circuit is short-circuited by comparing whether the currents of all branches in the circuit are equal, and carrying out reworking adjustment on the specific branch with the short circuit condition;
for the parallel circuit, measuring the voltages at the two ends of each branch in the circuit, judging whether the circuit is short-circuited by comparing whether the voltages at the two ends of each branch in the circuit are equal, and carrying out reworking adjustment on the specific branch with the short-circuit condition;
the beneficial effects of the invention are as follows:
1. according to the production process of the multilayer circuit board with high qualification rate and the circuit board, the area of the conductive part of the circuit board is analyzed under different time and space dimensions: the oxidation corrosion rate of the conductive part in the production of the circuit board is obtained, and the proper production environment of the circuit board can be selected according to the oxidation corrosion rate of the conductive part in the production of the circuit board, so that the production qualification rate of the circuit board is improved.
2. According to the production process of the multilayer circuit board with high qualification rate and the circuit board, disclosed by the invention, the technical problem of unreasonable arrangement of the circuit board conductive lines is solved by tracking and analyzing the circuit board conductive lines, so that the production qualification rate of the circuit board is improved.
3. According to the production process of the multilayer circuit board with high qualification rate and the circuit board, the problem that a complete system for judging whether the production quality of the circuit board is qualified or not through specific data analysis is not formed in the production flow of the circuit board by analyzing the data of the circuit board twice is solved.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a step diagram of a first embodiment of the present invention;
FIG. 2 is an analysis diagram of a conductive portion in accordance with a first embodiment of the present invention;
FIG. 3 is a process diagram of a second embodiment of the present invention;
fig. 4 is a circuit board diagram of the present invention.
Detailed Description
The invention is further described in connection with the following detailed description in order to make the technical means, the creation characteristics, the achievement of the purpose and the effect of the invention easy to understand.
Example 1
As shown in fig. 1, the production process of the multilayer circuit board with high qualification rate and the circuit board thereof according to the embodiment of the invention comprise the following steps:
step one: cutting and grinding the plate, and step two: drilling and slotting, and a step III: soaking and cleaning, namely, a step four: plasma treatment, step five: surface treatment, namely, step six: and (7) copper-clad development, namely: drilling and stacking, namely, a step eight: etching and welding prevention, namely, step nine: baking and welding to form;
in the first step, a plurality of circuit board base material materials are selected according to requirements, and are processed through a dividing machine to form a plurality of circuit board base materials with proper sizes;
in the second step, after the division of the plurality of base materials is completed, positioning holes are respectively drilled on the plurality of base materials by using drilling equipment, slotting processing is respectively carried out on the plurality of circuit boards at proper positions by using a slotting machine according to design requirements, board grinding processing is respectively carried out on two sides of the circuit boards by using a board grinding machine after the slotting processing is completed, and the circuit boards after the board grinding processing are placed for standby;
in the third step, after the circuit board grinding in the second step is completed, respectively placing the circuit board into an ultrasonic cleaner filled with cleaning liquid for ultrasonic cleaning, wherein the cleaning liquid is formed by mixing trichloroethylene, hexane, heptane, diethylene glycol dimethyl ether, isopropanol and butanediol according to the mass part ratio of 2.5:1:2:1:1:1, the cleaning time of the ultrasonic cleaner is 2-3min, soaking for a period of time after the cleaning is completed, and then washing cleanly for standby;
in the fourth step, after the ultrasonic cleaning of the circuit board in the third step is completed, respectively performing plasma treatment on the surface of the circuit board by using a plasma machine, wherein the plasma treatment time is 10-20min, and the circuit board is ready for use after completion;
in the fifth step, after the plasma treatment of the circuit board in the fourth step is completed, coating an anti-corrosion layer on the surface of the circuit board respectively, and mixing acrylic acid, polyurethane, organic silicon, UV resin and epoxy resin according to a proportion, carrying out anti-corrosion treatment on the circuit board, and reserving after the anti-corrosion treatment is completed;
in the sixth step, after the corrosion-resistant treatment of the circuit board in the fifth step is completed, printing ink on the parts of the plurality of circuit boards, which need to be paved with copper, respectively, covering copper foil on the printing ink to form a copper-clad conductive layer, coating the parts of the plurality of circuit boards, which are not needed, with a developing solution, exposing the developing solution to an oxidizing agent for oxidation corrosion, and corroding the parts, which are not needed, to expose the conductive parts;
as shown in fig. 2, wherein the conductive portions are analyzed in terms of different time dimensions as well as spatial environment dimensions; the method comprises the following specific steps:
s101, after the unnecessary part of the circuit board subjected to oxidation corrosion in the step six is obtained, the area of the original exposed conductive part is marked as a i;
s102, presetting a time period to be one month, marking the time period as f i, wherein the time period unit is a day;
s103, placing the circuit board in different space environments, analyzing the areas of the conductive parts to obtain oxidation corrosion rates of the conductive parts of the circuit board in different space dimensions, and comparing the oxidation corrosion rates to obtain a more suitable space environment for circuit board production and standby placement, thereby improving the qualification rate of circuit board production;
the specific process of step S103 is as follows:
s301, placing the circuit board in a dry environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the dry environment as b i;
s302, placing the circuit board in a wet environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the wet environment as c i;
s303, placing the circuit board in a high-temperature environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the high-temperature environment as d i;
preferably, the circuit board may be placed in an environment with a variety of different combinations of conditions, such as: high temperature drying, high temperature humidity, low temperature drying, low temperature humidity, etc.;
performing difference processing on the obtained area of the conductive part of the circuit board placed in different environments and the original area of the conductive part to obtain the oxidation corrosion area of the conductive part of the circuit board;
the oxidation corrosion areas of the conductive parts of the circuit board are marked as Ki, wherein the oxidation corrosion areas of the conductive parts of the corresponding circuit board under various environments are Ki 1, ki2 and Ki 3.
The area of the conductive part of the circuit board is less than or equal to the area of the original conductive part of the circuit board;
s304, marking the oxidation corrosion area of the obtained conductive part of the circuit board as Ki, and performing ratio processing (oxidation corrosion area Ki/time period f i) on the obtained conductive part of the circuit board with a preset time period f i to obtain the oxidation corrosion rate of the conductive part of the circuit board, and marking the oxidation corrosion rate of the conductive part of the circuit board as g i;
s305, calculating oxidation corrosion rate marks g i of the conductive parts of the circuit board under different environments according to the obtained oxidation corrosion areas of the conductive parts of the circuit board under various environments being Ki 1, ki2 and Ki 3.
Comparing oxidation corrosion rates of the conductive parts of the circuit board in different environments, and selecting a space environment corresponding to the oxidation corrosion rate gi of the conductive part of the minimum circuit board as a production and standby placement environment of the circuit board;
in the seventh step, after the development copper coating in the sixth step is completed, drilling positions of the plurality of circuit boards to be drilled respectively by using a drilling machine, coating prepregs among the plurality of drilled circuit boards after the drilling is completed, bonding the circuit boards together, performing drilling and dredging again after the bonding is firm, performing pressing treatment after the bonding is completed, and bonding the plurality of single circuit boards into a multilayer circuit board semi-finished product;
in the eighth step, after the multilayer circuit board semi-finished product is manufactured by lamination in the seventh step, the copper layer on the multilayer circuit board semi-finished product is further etched according to the pattern by using the etching liquid medicine, the copper layer serving as a circuit is reserved, and then the two surfaces of the multilayer circuit board semi-finished product are coated with the anti-welding ink layer;
in the step nine, after the coating of the solder mask ink layer in the step eight is completed, a baking and welding treatment is performed by using a baking and welding machine, the baking temperature of the baking and welding machine is 105-115 ℃, the baking time is 2-3 hours, and the wires with different layers are baked together at a high temperature to prepare the multilayer circuit board.
Example two
As shown in fig. 3, in a first comparative example, another way of improving the yield of circuit boards according to the present invention is as follows: in the eighth step of the first embodiment, the copper layer conductive line of the circuit board is tracked and analyzed, so that the technical problem of unreasonable arrangement of the conductive line of the circuit board is solved, and the production qualification rate of the circuit board is improved;
specifically, tracking the conductive circuit of the circuit board to obtain a circuit distribution diagram of the circuit board, and judging whether the circuit has a disconnection condition or not and whether the arrangement among the circuits meets the requirement standard or not based on the circuit distribution diagram;
wherein the analysis steps are as follows:
s110, checking whether broken interfaces exist between the lines and each branch based on the line distribution diagram, and if the broken interfaces exist in the lines, reworking the circuit board, and readjusting the lines;
if the line has no broken interface, the next analysis is carried out;
s120, based on the line without a break interface, marking each branch of the line as l i, l i2, l i 3.
The distance between the branches is the distance between the branches which are parallel to each other;
marking the interval between each branch as oi;
presetting a standard interval threshold value between each branch as pi according to requirements;
if o i is more than or equal to p i, the distribution of the conductive lines of the circuit board is reasonable, and the next analysis can be performed;
if o i is less than p i, the distribution of the conductive lines of the circuit board is unreasonable, the circuit board is reworked according to the branch marks, and the conductive lines of the circuit board are rearranged according to the use requirement;
s130, analyzing based on a circuit board with reasonable distribution of the conductive lines, and judging whether the circuit is short-circuited or not by comparing the current and the voltage of the conductive lines;
specifically, for a series circuit, measuring the current of each branch in the circuit, judging whether the circuit is short-circuited by comparing whether the currents of all branches in the circuit are equal, and carrying out reworking adjustment on the specific branch with the short circuit condition;
for the parallel circuit, measuring the voltages at the two ends of each branch in the circuit, judging whether the circuit is short-circuited by comparing whether the voltages at the two ends of each branch in the circuit are equal, and carrying out reworking adjustment on the specific branch with the short-circuit condition;
preferably, the method in step 130 can also be used to solve the problem of detecting whether the conductive line has a break interface in step 110.
The invention relates to a production process of a multilayer circuit board with high qualification rate, which comprises the following steps: step one: cutting and grinding the plate, and step two: drilling and slotting, and a step III: soaking and cleaning, namely, a step four: plasma treatment, step five: surface treatment, namely, step six: and (7) copper-clad development, namely: drilling and stacking, namely, a step eight: etching and welding prevention, namely, step nine: and (3) baking, welding and forming, namely specifically analyzing the copper-clad development step and the etching and welding prevention step to find out defects in the production flow of the circuit board, so that the qualification rate of the circuit board production is improved.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (10)
1. A production process of a multilayer circuit board with high qualification rate is characterized by comprising the following steps: comprising the following steps:
step one: cutting and grinding a plate;
step two: drilling and grooving;
step three: soaking and cleaning;
step four: plasma treatment;
step five: surface treatment;
step six: copper-clad development;
copper coating treatment is carried out on the plurality of circuit boards processed in the fifth step to form a copper-coated conductive layer, and unnecessary copper foil parts of the plurality of circuit boards are coated with developing solution and subjected to oxidation corrosion treatment to expose conductive parts of the circuit boards;
and analyzing the exposed conductive parts of the circuit board in different time dimensions and space environment dimensions to obtain oxidation corrosion rates of the conductive parts of the circuit board under different space environment conditions, and judging the proper environment for circuit board production based on the oxidation corrosion rates of the conductive parts of the circuit board.
Step seven: stacking drilling holes;
step eight: etching and welding prevention;
step nine: and (5) baking, welding and forming.
2. The high-yield multilayer circuit board production process according to claim 1, wherein: the copper-clad development is as follows:
and (3) after the circuit board is subjected to corrosion prevention treatment in the step five, printing ink on the parts of the circuit boards, which need to be paved with copper, respectively, covering copper foils on the printing ink to form a copper-clad conductive layer, coating the parts of the unnecessary copper foils of the circuit boards with developing solution, exposing the developing solution to an oxidizing agent for oxidation corrosion, and corroding the unnecessary parts to expose the conductive parts.
3. The high-yield multilayer circuit board production process according to claim 1, wherein: the different dimensions include a temporal dimension and a spatial environment dimension.
4. The high-yield multilayer circuit board production process according to claim 1, wherein: the method for analyzing the exposed conductive parts of the circuit board in different dimensions comprises the following specific analysis steps:
s101, after the unnecessary part of the circuit board subjected to oxidation corrosion in the step six is obtained, the area of the original exposed conductive part is marked as ai;
s102, presetting a time period to be one month, wherein the time period unit is a day, and marking the time period as fi;
s103, placing the circuit board in different space environments, and analyzing the areas of the conductive parts to obtain the oxidation corrosion rates of the conductive parts of the circuit board in different space dimensions.
5. The high-yield multilayer circuit board production process according to claim 4, wherein: the specific process of step S103 is as follows:
s301, placing the circuit board in a dry environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the dry environment as bi;
s302, placing the circuit board in a wet environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the wet environment as ci;
s303, placing the circuit board in a high-temperature environment, and at the end of a time period, obtaining the area of a conductive part of the circuit board, and marking the area of the conductive part of the circuit board in the high-temperature environment as di;
and performing difference treatment on the obtained area of the conductive part of the circuit board placed in different environments and the original area of the conductive part to obtain the oxidation corrosion area of the conductive part of the circuit board.
6. The high-yield multilayer circuit board production process according to claim 5, wherein: the specific process of step S103 further includes:
and marking the obtained oxidation corrosion area of the conductive part of the circuit board as Ki, and performing ratio processing (oxidation corrosion area Ki/time period fi) on the obtained oxidation corrosion area of the conductive part of the circuit board, so as to obtain the oxidation corrosion rate of the conductive part of the circuit board, and marking the oxidation corrosion rate of the conductive part of the circuit board as gi.
7. The high-yield multilayer circuit board production process according to claim 1, wherein: the process for judging the proper environment for producing the circuit board comprises the following steps:
through the obtained oxidation corrosion areas of the corresponding conductive parts of the circuit board under various environments;
calculating oxidation corrosion rate marks gi of conductive parts of the circuit board under different environments;
comparing oxidation corrosion rates of the conductive parts of the circuit board in different environments, and selecting a space environment corresponding to the oxidation corrosion rate gi of the conductive part of the minimum circuit board as a manufacturing and standby placement environment of the circuit board.
8. The high-yield multilayer circuit board production process according to claim 7, wherein: the etching liquid is used for further etching the copper layer on the semi-finished product of the multilayer circuit board according to the graph, the copper layer serving as a circuit is reserved, the copper layer conductive circuit of the circuit board is tracked, the distance, the current and the voltage of each branch of the conductive circuit are analyzed, and the technical problem that the conductive circuit of the circuit board is unreasonably arranged is solved.
9. The high-yield multilayer circuit board production process according to claim 8, wherein: the method comprises the following steps of tracking and analyzing a copper layer conductive circuit of a circuit board in etching and welding prevention to obtain a circuit diagram of the circuit board, judging whether the circuit has a disconnection condition or not and whether the arrangement among the circuits meets the requirement standard or not based on the circuit diagram, wherein the specific steps are as follows:
s110, checking whether broken interfaces exist between the lines and each branch based on the line distribution diagram, and if the broken interfaces exist in the lines, reworking the circuit board, and readjusting the lines;
if the line has no broken interface, the next analysis is carried out;
s120, calculating the distance between each branch based on the line without the broken interface;
marking the interval between each branch as oi;
presetting a standard interval threshold value between each branch as pi according to requirements;
if oi is more than or equal to pi, the distribution of the conductive lines of the circuit board is reasonable, and the next analysis can be performed;
if oi is less than pi, the distribution of the conductive lines of the circuit board is unreasonable, reworking is carried out on the circuit board according to the branch marks, and the conductive lines of the circuit board are rearranged according to the use requirement;
s130, analyzing based on a circuit board with reasonable distribution of the conductive lines, and judging whether the circuit is short-circuited or not by comparing the current and the voltage of the conductive lines;
for the series circuit, measuring the current of each branch in the circuit, judging whether the circuit is short-circuited or not by comparing whether the currents of the branches in the circuit are equal, and carrying out reworking adjustment on the specific branch with the short-circuit condition;
for the parallel circuit, the voltages at the two ends of each branch in the circuit are measured, whether the circuit is short-circuited is judged by comparing whether the voltages at the two ends of each branch in the circuit are equal, and reworking adjustment is carried out on the specific branch with the short circuit condition.
10. A multilayer circuit board with high qualification rate is characterized in that: the circuit board is prepared by the production process of any one of claims 1-9, and comprises all production steps and analysis of the production process steps of the circuit board, so that the multi-layer circuit board with high qualification rate is manufactured.
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