CN113611741A - GaN HMET device with fin-shaped structure - Google Patents
GaN HMET device with fin-shaped structure Download PDFInfo
- Publication number
- CN113611741A CN113611741A CN202110879949.3A CN202110879949A CN113611741A CN 113611741 A CN113611741 A CN 113611741A CN 202110879949 A CN202110879949 A CN 202110879949A CN 113611741 A CN113611741 A CN 113611741A
- Authority
- CN
- China
- Prior art keywords
- gan
- conductive material
- fin
- along
- barrier layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- FFEARJCKVFRZRR-UHFFFAOYSA-N methionine Chemical compound CSCCC(N)C(O)=O FFEARJCKVFRZRR-UHFFFAOYSA-N 0.000 title claims description 15
- 230000004888 barrier function Effects 0.000 claims abstract description 33
- 239000004020 conductor Substances 0.000 claims description 36
- 238000002161 passivation Methods 0.000 claims description 15
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 claims description 7
- 238000005468 ion implantation Methods 0.000 claims description 7
- 229910002704 AlGaN Inorganic materials 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 3
- 230000005684 electric field Effects 0.000 abstract description 8
- 230000005533 two-dimensional electron gas Effects 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 238000009825 accumulation Methods 0.000 abstract description 2
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 239000004047 hole gas Substances 0.000 abstract description 2
- 230000015556 catabolic process Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 230000010287 polarization Effects 0.000 description 2
- 241001354791 Baliga Species 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
Abstract
The invention belongs to the technical field of power semiconductors, and relates to a GaN HMET (high electron mobility transistor) device with a multi-fin structure. The invention is mainly characterized in that: when the device is conducted, the electron accumulation layers are arranged on the periphery of the fin-shaped GaN layers which are distributed discontinuously along the vertical direction of the device, and two-dimensional electron gas (2DEG) with high concentration and high mobility exists on the heterogeneous interface of the GaN channel layer and the barrier layer along the transverse direction of the device, so that the conduction current of the device can be improved, and the conduction resistance can be reduced; two-dimensional hole gas (2DHG) is introduced through a heterostructure formed by the fin-shaped GaN layer and the barrier layer, a conducting path between the source electrode and the two-dimensional electron gas in the vertical direction is cut off, and the enhancement type GaN HMET device is realized; compared with the large transverse distance between the gate sources in the traditional GaN HMET, the source electrode is positioned on the top of the fin-shaped GaN, so that the area of the device is reduced; the terminal region positioned on one side of the source gate structure can reduce the peak of the electric field at the edge of the gate and introduce a new peak of the electric field, thus being beneficial to improving the withstand voltage of the device.
Description
Technical Field
The invention belongs to the technical field of power semiconductors, and relates to a GaN HMET device with a fin-shaped structure.
Background
Compared with the first-generation semiconductor material Si, the third-generation wide bandgap semiconductor material GaN has more excellent material physical characteristics, and the physical parameters such as the forbidden band width, the electron mobility, the electron saturation rate, the critical breakdown electric field, the thermal conductivity and the high/low frequency Baliga excellent value are far higher than those of the Si material. The GaN HEMT (high electron mobility transistor) device has wide application prospect in the application field of high-current, low-power consumption and high-voltage switching devices.
The conventional GaN HEMT is a depletion mode device because the AlGaN/GaN heterojunction has strong spontaneous polarization and piezoelectric polarization effects, and a heterojunction interface spontaneously forms high-concentration two-dimensional electron gas (2 DEG). However, in practical circuit applications, the depletion mode device needs a negative voltage power supply to turn off the device, which not only increases the risk of false turn-on of the circuit, but also increases the power consumption of the whole circuit and the design difficulty of the driving circuit. Therefore, the enhancement mode GaN HEMT device is more suitable for power electronic circuits. Typical ways to implement enhancements today include: groove gate technology, P-GaN technology, Cascode cascade technology, fluorine ion implantation technology, thin barrier technology and the like.
In addition, although the GaN material has the advantage of high critical breakdown electric field, for the AlGaN/GaN HEMT device, the device breaks down in advance due to the existence of electric field sharp edges at the edge of the gate, excessive leakage current and the like, and the withstand voltage of the device is far from the theoretical limit of the GaN material. For this reason, various technical means are used to improve the breakdown voltage of the device, mainly including: the method comprises the following steps of field plate technology, fluorine ion implantation, terminal technology, polarized super junction technology, compensation doping technology and the like.
Disclosure of Invention
The invention provides a GaN HMET device with a fin-shaped structure based on the application requirement of a HEMT device.
The technical scheme of the invention is as follows:
a GaN HMET device with a fin-shaped structure comprises a substrate layer 1, a GaN buffer layer 2, a GaN channel layer 3, a barrier layer 4 and a passivation layer 5 which are sequentially stacked from bottom to top along the vertical direction of the device; along the transverse direction of the device, one end of the device is a source gate structure which penetrates through the passivation layer 5 along the vertical direction of the device, and the other end of the device is a first conductive material 6 which penetrates through the passivation layer 5 along the vertical direction of the device;
the first conductive material 6 is in contact with the upper surface of the barrier layer 4 along the vertical direction of the device, the contact is ohmic contact, and a drain electrode is led out from the upper surface;
the source gate structure is characterized by comprising a plurality of fin-shaped GaN layers 7 which are discontinuously distributed along the longitudinal direction of the device, a source electrode and an insulated gate structure; the fin-shaped GaN layer 7 is positioned above the barrier layer 4 along the vertical direction of the device and is in contact with the upper surface of the barrier layer 4; the source electrode is made of a second conductive material 8, is in contact with the upper surface of the fin-shaped GaN layer 7, and is in ohmic contact; the insulated gate structure is composed of an insulated gate dielectric 9 and a third conductive material 10, wherein the insulated gate dielectric 9 is positioned above the barrier layer 4 along the vertical direction of the device, is in contact with the upper surface of the barrier layer 4, and covers the side walls of the fin-shaped GaN layer 7 and the second conductive material 8; the side wall and the bottom of the third conductive material 10 are in contact with the upper surface of the insulated gate dielectric 9 and are not in contact with the second conductive material 8; a grid is led out of the upper surface of the third conductive material 10;
further, the barrier layer 4 is made of one or a combination of AlN, AlGaN, InGaN, and InAlN.
According to the GaN HMET device with the multi-fin structure, when the device is conducted, the electron accumulation layers are arranged on the periphery of the fin-shaped GaN layers which are distributed discontinuously along the vertical direction of the device, and two-dimensional electron gas (2DEG) with high concentration and high mobility exists on the heterogeneous interface of the GaN channel layer and the barrier layer along the transverse direction of the device, so that the conduction current of the device can be improved, and the conduction resistance can be reduced; two-dimensional hole gas (2DHG) is introduced through a heterostructure formed by the fin-shaped GaN layer and the barrier layer, a conducting path between the source electrode and the two-dimensional electron gas in the vertical direction is cut off, and the enhancement type GaN HMET device is realized; compared with the large transverse distance between the gate sources in the traditional GaN HMET, the source electrode is positioned on the top of the fin-shaped GaN, so that the area of the device is reduced; the terminal region positioned on one side of the source gate structure can reduce the peak of the electric field at the edge of the gate and introduce a new peak of the electric field, thus being beneficial to improving the withstand voltage of the device.
Drawings
FIG. 1 is a schematic three-dimensional structure of example 1;
FIG. 2 is a cross-sectional view along AA' of the structure of example 1;
FIG. 3 is a schematic three-dimensional structure of example 2;
FIG. 4 is a schematic three-dimensional structure of example 3;
FIG. 5 is a schematic three-dimensional structure of example 4;
Detailed Description
The technical scheme of the invention is described in detail in the following with reference to the accompanying drawings and embodiments:
example 1
As shown in fig. 1, the HEMT device of this example includes a substrate layer 1, a GaN buffer layer 2, a GaN channel layer 3, a barrier layer 4, and a passivation layer 5, which are sequentially stacked from bottom to top in the vertical direction of the device; along the transverse direction of the device, one end of the device is a source gate structure which penetrates through the passivation layer 5 along the vertical direction of the device, and the other end of the device is a first conductive material 6 which penetrates through the passivation layer 5 along the vertical direction of the device;
the first conductive material 6 is in contact with the upper surface of the barrier layer 4 along the vertical direction of the device, the contact is ohmic contact, and a drain electrode is led out from the upper surface;
the source gate structure is characterized by comprising a plurality of fin-shaped GaN layers 7 which are discontinuously distributed along the longitudinal direction of the device, a source electrode and an insulated gate structure; the fin-shaped GaN layer 7 is positioned above the barrier layer 4 along the vertical direction of the device and is in contact with the upper surface of the barrier layer 4; the source electrode is made of a second conductive material 8, is in contact with the upper surface of the fin-shaped GaN layer 7, and is in ohmic contact; the insulated gate structure is composed of an insulated gate dielectric 9 and a third conductive material 10, wherein the insulated gate dielectric 9 is positioned above the barrier layer 4 along the vertical direction of the device, is in contact with the upper surface of the barrier layer 4, and covers the side walls of the fin-shaped GaN layer 7 and the second conductive material 8; the side wall and the bottom of the third conductive material 10 are in contact with the upper surface of the insulated gate dielectric 9 and are not in contact with the second conductive material 8; a grid is led out of the upper surface of the third conductive material 10;
compared with the traditional GaN HMET device, the GaN HMET device has the advantages of large conduction current, high breakdown voltage, smaller device area under the same voltage withstanding level and the like.
Example 2
The difference between this example and embodiment 1 is that, in this example, the third conductive material 10 extends toward one side of the first conductive material 6 along the lateral direction of the device and covers the passivation layer 5 to form a gate field plate 11, and the gate field plate 11 has a gap from the first conductive material 6; compared with embodiment 1, the advantage of this example is that the gate field plate 11 further optimizes the electric field distribution of the device in the withstand voltage, and improves the breakdown voltage of the device.
Example 3
The difference between this example and example 1 is that in this example, a fluorine ion implantation terminal 12 is embedded in the passivation layer 5, and the fluorine ion implantation terminal 12 is not in contact with the barrier layer 4 in the device vertical direction; in the device lateral direction, with a spacing from the first conductive material 6; compared with embodiment 2, the advantage of this example is that the fluorine ion implantation terminal 12 can improve the device withstand voltage, and does not introduce additional parasitic capacitance, which leads to the degradation of the dynamic performance of the device.
Example 4
The difference between this example and embodiment 1 is that, in this example, along the lateral direction of the device, the barrier layer 4 located between the source-gate structure and the first conductive material 6 has a groove, and does not contact with the lower surface of the barrier layer 4, and the passivation layer 5 covering the barrier layer 4 also has a groove to form a groove terminal, and the groove terminal has a distance from the first conductive material 6 and the source-gate structure along the lateral direction of the device; compared with embodiment 3, the advantage of this example is that the groove terminal 13 is simple in implementation process, low in cost and free of any high temperature process.
Claims (5)
1. A GaN HMET device with a fin-shaped structure comprises a substrate layer (1), a GaN buffer layer (2), a GaN channel layer (3), a barrier layer (4) and a passivation layer (5) which are sequentially stacked from bottom to top along the vertical direction of the device; along the transverse direction of the device, one end of the device is a source gate structure which penetrates through the passivation layer (5) along the vertical direction of the device, and the other end of the device is a first conductive material (6) which penetrates through the passivation layer (5) along the vertical direction of the device;
the first conductive material (6) is in contact with the upper surface of the barrier layer (4) along the vertical direction of the device, the contact is ohmic contact, and a drain electrode is led out from the upper surface;
the source gate structure is characterized by comprising a plurality of fin-shaped GaN layers (7) which are discontinuously distributed along the longitudinal direction of the device, a source electrode and an insulated gate structure; the fin-shaped GaN layer (7) is positioned above the barrier layer (4) along the vertical direction of the device and is in contact with the upper surface of the barrier layer (4); the source electrode is made of a second conductive material (8), is in contact with the upper surface of the fin-shaped GaN layer (7), and is in ohmic contact; the insulated gate structure is composed of an insulated gate dielectric (9) and a third conductive material (10), wherein the insulated gate dielectric (9) is positioned above the barrier layer (4) along the vertical direction of the device, is in contact with the upper surface of the barrier layer (4), and covers the side walls of the fin-shaped GaN layer (7) and the second conductive material (8); the side wall and the bottom of the third conductive material (10) are in contact with the upper surface of the insulated gate dielectric (9) and are not in contact with the second conductive material (8); a grid is led out of the upper surface of the third conductive material (10);
the device longitudinal direction is a third dimension direction which is simultaneously vertical to both the device transverse direction and the device vertical direction.
2. The GaN HMET device with a fin structure as claimed in claim 1, wherein the third conductive material (10) extends along the lateral direction of the device to one side of the first conductive material (6) and covers the passivation layer (5) to form a gate field plate (11), and the gate field plate (11) is spaced apart from the first conductive material (6).
3. The GaN HMET device with fin structure as claimed in claim 1, wherein the passivation layer (5) is embedded with fluorine ion implantation terminal (12), and the fluorine ion implantation terminal (12) is not in contact with the barrier layer (4) along the vertical direction of the device; in the device lateral direction, a spacing is provided with the first conductive material (6).
4. A GaN HMET device with fin structure according to claim 1, wherein the barrier layer (4) between the source gate structure and the first conductive material (6) is recessed along the lateral direction of the device and does not contact the lower surface of the barrier layer (4), and the passivation layer (5) covering the barrier layer (4) is also recessed to form a recess termination, the recess termination being spaced from the first conductive material (6) and the source gate structure along the lateral direction of the device.
5. The GaN HMET device with a fin structure according to any of claims 1-4, wherein the barrier layer (4) is made of one or more of AlN, AlGaN, InGaN and InAlN.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110879949.3A CN113611741B (en) | 2021-08-02 | 2021-08-02 | GaN HMET device with fin structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110879949.3A CN113611741B (en) | 2021-08-02 | 2021-08-02 | GaN HMET device with fin structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113611741A true CN113611741A (en) | 2021-11-05 |
| CN113611741B CN113611741B (en) | 2023-04-28 |
Family
ID=78339019
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110879949.3A Active CN113611741B (en) | 2021-08-02 | 2021-08-02 | GaN HMET device with fin structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113611741B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006253559A (en) * | 2005-03-14 | 2006-09-21 | Nichia Chem Ind Ltd | Field-effect transistor and its manufacturing method |
| CN102403347A (en) * | 2010-09-14 | 2012-04-04 | 三星Led株式会社 | Gallium nitride based semiconductor devices and methods of manufacturing the same |
| US20130099283A1 (en) * | 2011-10-21 | 2013-04-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | III-V Multi-Channel FinFETs |
| CN103681836A (en) * | 2012-09-21 | 2014-03-26 | 罗伯特·博世有限公司 | Vertical microelectronic component and corresponding production method |
| CN105810728A (en) * | 2016-05-06 | 2016-07-27 | 西安电子科技大学 | Enhanced fin-type insulated gate high-electronic mobility transistor |
| CN106611781A (en) * | 2015-10-27 | 2017-05-03 | 上海新昇半导体科技有限公司 | Quantum well device and forming method therefor |
| WO2019139624A1 (en) * | 2018-01-12 | 2019-07-18 | Intel Corporation | Vertical field effect transistors having extended drain regions and methods of manufacturing the same |
-
2021
- 2021-08-02 CN CN202110879949.3A patent/CN113611741B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006253559A (en) * | 2005-03-14 | 2006-09-21 | Nichia Chem Ind Ltd | Field-effect transistor and its manufacturing method |
| CN102403347A (en) * | 2010-09-14 | 2012-04-04 | 三星Led株式会社 | Gallium nitride based semiconductor devices and methods of manufacturing the same |
| US20130099283A1 (en) * | 2011-10-21 | 2013-04-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | III-V Multi-Channel FinFETs |
| CN103681836A (en) * | 2012-09-21 | 2014-03-26 | 罗伯特·博世有限公司 | Vertical microelectronic component and corresponding production method |
| CN106611781A (en) * | 2015-10-27 | 2017-05-03 | 上海新昇半导体科技有限公司 | Quantum well device and forming method therefor |
| CN105810728A (en) * | 2016-05-06 | 2016-07-27 | 西安电子科技大学 | Enhanced fin-type insulated gate high-electronic mobility transistor |
| WO2019139624A1 (en) * | 2018-01-12 | 2019-07-18 | Intel Corporation | Vertical field effect transistors having extended drain regions and methods of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113611741B (en) | 2023-04-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10985270B2 (en) | Nitride power transistor and manufacturing method thereof | |
| US10304931B2 (en) | Polarization-doped enhancement mode HEMT | |
| CN105140270B (en) | A kind of enhanced HEMT device | |
| CN100524809C (en) | A field effect transistor semiconductor device | |
| CN110392929A (en) | Gallium nitride transistor | |
| EP2955757B1 (en) | Nitride power component and manufacturing method therefor | |
| CN106920844B (en) | A kind of RESURF HEMT device with N-type floating buried layer | |
| CN107482059B (en) | Vertical reverse conducting field effect transistor of gaN heterojunction | |
| CN110649096B (en) | High-voltage n-channel HEMT device | |
| CN109461774B (en) | HEMT device containing high dielectric coefficient dielectric block | |
| CN105118859A (en) | Tunneling enhancement type HEMT device | |
| CN105097911A (en) | HEMT device with junction type semiconductor layer | |
| CN110660851A (en) | High-voltage n-channel HEMT device | |
| CN114447102A (en) | Gallium nitride heterojunction field effect transistor with compound semiconductor layer on substrate | |
| US20230036698A1 (en) | Reverse blocking gallium nitride high electron mobility transistor | |
| CN111739934A (en) | Gallium nitride high electron mobility transistor with junction field plate | |
| CN103227199B (en) | Semi-conductor electronic device | |
| WO2023273900A1 (en) | Low-dynamic-resistance enhanced gan device | |
| CN112864243B (en) | GaN HMET device with passivation layer gradual change fluorine ion terminal | |
| CN116913951A (en) | Double-channel enhanced GaN HEMT device with P-type buried layer | |
| CN110649097A (en) | High-voltage p-channel HEMT device | |
| CN110660843A (en) | High-voltage p-channel HEMT device | |
| CN113611742B (en) | GaN power device integrated with Schottky tube | |
| CN113611741B (en) | GaN HMET device with fin structure | |
| CN109817711B (en) | Gallium nitride transverse transistor with AlGaN/GaN heterojunction and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |