CN113611738A - Groove type GaN insulated gate bipolar transistor with heterojunction injection - Google Patents

Groove type GaN insulated gate bipolar transistor with heterojunction injection Download PDF

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CN113611738A
CN113611738A CN202110914932.7A CN202110914932A CN113611738A CN 113611738 A CN113611738 A CN 113611738A CN 202110914932 A CN202110914932 A CN 202110914932A CN 113611738 A CN113611738 A CN 113611738A
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metal contact
collector
gan
emitter
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CN113611738B (en
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黄义
王礼祥
秦海峰
许峰
陈伟中
王�琦
张红升
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Chongqing University of Post and Telecommunications
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The invention relates to a heterojunction-injected groove type GaN insulated gate bipolar transistor, and belongs to the field of power semiconductor devices. The transistor is of a bilateral symmetry structure, and the left half structure comprises a P + collector, an N-drift region, a P-channel region, an N + emitter substrate, an insulating medium layer, a grid metal contact region, a collector metal contact region, an emitter metal contact region I, an emitter metal contact region II and an Al component gradient region. On the basis of an N + type GaN substrate material, the invention adopts a groove type IGBT vertical device structure with P/N/P/N from top to bottom, can realize higher hole injection ratio of P + AlGaN/GaN through a lower doped P + AlGaN collector layer, and simultaneously introduces Al with gradually changed x at a P + AlGaN/GaN heterojunction interfacexGa1‑xN graded layer to reduce device conduction voltage drop and improve device outputAnd (4) streaming.

Description

Groove type GaN insulated gate bipolar transistor with heterojunction injection
Technical Field
The invention belongs to the field of power semiconductor devices, and relates to a heterojunction-injected groove type GaN insulated gate bipolar transistor.
Background
The new generation of semiconductor material gallium nitride (GaN) material has many advantages, such as large forbidden bandwidth, high critical breakdown field strength, large electron packet and velocity, low dielectric constant, and high operating temperature. The method comprises the following steps that firstly, the forbidden band width is large, the forbidden band width is 3.39eV and is more than 3 times of the forbidden band width of a silicon material, so that the working temperature of a semiconductor device made of a GaN material can be higher than that of semiconductor materials such as GaAs and Si; the critical breakdown field intensity of the gallium nitride is as high as 3.4MV/cm, which is higher than Si and GaAs by one order of magnitude, so that the gallium nitride device can bear high voltage and high power; the high saturation electron migration velocity reaches 3 multiplied by 107cm/s, which is much larger than semiconductor materials such as GaAs, Si, 4H-SiC and the like, allows the GaN material to be used for manufacturing high-frequency electronic devices; the low dielectric constant, GaN, is smaller than GaAs, Si, and 4H-SiC, which allows the device to operate at high frequencies and speeds.
An Insulated Gate Bipolar Transistor (IGBT) is a Bipolar semiconductor power device in which an IGBTFET and a BJT are combined, has the advantages of reduced on-state voltage, low driving power consumption, high operating frequency, and the like, is widely used in the fields of communication technology, new energy devices, and various consumer electronics, and is a core device of an electronic power system.
With the increasing demand in recent years, power electronic devices with higher operating frequencies, smaller cell sizes, and lower power consumption are in constant need of innovation. To date, AlGaN/GaN interface two-dimensional electron gas has been mostly used in HEMT devices because of its ultra-high electron mobility, but conventional HFET devices are depletion-mode (normally-on) devices. To date, researchers have proposed various solutions in device structures and processes, and commercial GaN power devices mainly implement enhancement mode GaN devices in a Cascode cascade with enhancement mode Si IGBTFETs and depletion mode GaN devices. Other solutions mainly include a P-type gate structure, a thin barrier layer structure, a groove gate structure, a fluorine-based plasma processing technology, a groove MIS-HFET structure, a field tunneling structure and the like. The invention provides a heterojunction injection groove type GaN insulated gate bipolar transistor structure, which is used for the existing IGBT and adopts Si or SiC materials as a P type substrate, and aims to develop a GaN power switch device with larger output current and higher power and promote the GaN materials to be applied to the field of IGBT devices.
Disclosure of Invention
In view of this, an object of the present invention is to provide a heterojunction-injected trench-type GaN insulated gate bipolar transistor, which is based on an N + type GaN substrate material, and adopts a trench-type IGBT vertical device structure with P/N/P/N from top to bottom, so that a higher hole injection ratio of P + AlGaN/GaN can be achieved through a lower-doped P + AlGaN collector layer, and meanwhile, Al with gradually changed x is introduced at a P + AlGaN/GaN heterojunction interfacexGa1-xAnd the N graded layer is used for reducing the conduction voltage drop of the device and improving the output current of the device.
In order to achieve the purpose, the invention provides the following technical scheme:
the utility model provides a ditch slot type GaN insulated gate bipolar transistor that heterojunction was injected, this transistor is bilateral symmetry structure, and the structure of left side includes: the device comprises a P + collector 1, an N-drift region 2, a P-channel region 3, an N + emitter substrate 4, an insulating dielectric layer 5, a grid metal contact region 6, a collector metal contact region 7, an emitter metal contact region I8, an emitter metal contact region II 9 and an Al component gradient region 10.
The P + collector 1 is positioned on the lower surface of the collector metal contact region 7 and is in contact with the upper surface of the Al component gradient region 10; and the material of the P + collector 1 is Al0.2Ga0.8And N, the doping concentration is 17 th power.
The upper surface of the N-drift region 2 is in contact with the lower surface of the Al component gradient region 10, the lower surface of the N-drift region is in contact with the upper surface of the P-channel region 3, and the right lower surface of the N-drift region is in contact with the left upper surface of the insulating medium layer 5; and the doping concentration of the N-drift region 2 is 16 th power.
The lower surface of the P-channel region 3 is in contact with the upper surface of the N + emitter substrate 4 and the upper surface of the emitter metal contact region II 9, and the right surface of the P-channel region is in contact with the middle part of the left surface of the insulating medium layer 5; and the doping concentration of the P-channel region 3 is 17 th power.
The N + emitter substrate 4 is positioned on the lower surface of the P-channel region 3 and the lower surface of the insulating medium layer 5, and the lower surface of the N + emitter substrate is in contact with the upper surface of the emitter metal contact region I8; and the N + emitter substrate 4 doping concentration is 18 th power.
The left surface of the insulating medium layer 5 is in contact with the right lower surface of the N-drift region 2, the right surface of the P-channel region 3 and the upper and middle surfaces of the N + emitter substrate 4; and the insulating medium layer 5 is made of Al2O3The doping concentration is 18 th power.
The grid metal contact region 6 is positioned on the upper surface of the insulating medium layer 5; and the emitter metal contact area II 9 is embedded in the N + emitter substrate 4, the upper surface of the emitter metal contact area II is in contact with the lower surface of the P-channel area 3, and the lower surface of the emitter metal contact area II is in contact with the upper surface of the emitter metal contact area I8.
Preferably, the P + collector 1 is doped with P-type impurities at a concentration of 5 × 1017cm-3The N-drift region 2 is doped with N-type impurity at a concentration of 1X 1016cm-3P-channel region 3 doped with P-type impurity at a concentration of 1X 1017cm-3N + emitter substrate 4 doped with N-type impurity at a concentration of 2X 1018cm-3The doping concentration of the Al component gradient region 10 is 5 multiplied by 1017cm-3The Al component is varied within a range of 0 to 0.2. Wherein the doping concentrations of the P + collector 1, the N-drift region 2, the P-channel region 3, the N + emitter substrate 4 and the N + drain region 11 can be changed as required.
Preferably, the material adopted by the Al component gradual change region 10 is AlxGa1-xAnd N, wherein the value of x gradually changes from top to bottom within the range of 0.2-0.
Preferably, the material adopted by the P + collector electrode 1 is Al0.2Ga0.8N。
Preferably, the material used for the N-drift region 2 is GaN.
Preferably, the material adopted by the P-channel region 3 is Al2O3Or SiN, AlN, MgO, Ga2O3、AlHfOxAnd HfSiON, or a combination of several of them.
Preferably, the material used for the collector metal contact region 7 includes Al, Au or Pt.
Preferably, the material adopted by the emitter metal contact area I8 comprises Ti/Al/Ti/Au alloy, Ti/Al/Ni/Au alloy or Ti/Al/Mo/Au alloy.
Preferably, the material adopted by the emitter metal contact area II 9 comprises Ni/Ti, Al/Ti or Pt/Ti.
Preferably, the transistor structure is suitable for a trench type MOS transistor, namely, the P + collector 1 is replaced by an N + drain region 11, and the collector metal contact region 7 is replaced by a drain metal contact region 12.
The invention has the beneficial effects that: the trench type GaN insulated gate bipolar transistor structure provides a new structure for promoting the application of GaN semiconductor materials in the field of IGBT devices, N type GaN is used as a substrate, a trench gate IGBT new structure with a P/N/P/N sandwich structure is used, the advantages of wide bandgap semiconductor GaN materials are more fully exerted, the withstand voltage of the devices can be improved by reducing the doping concentration of a drift region, the specific on-resistance of the devices is reduced, and the influence of the reduction of the concentration of the drift region on the turn-off speed of the devices is not obvious. At the same time, Al is introduced into the new structure0.2Ga0.8N/GaN heterojunction with Al0.2Ga0.8The higher hole injection ratio can be realized by doping N with lower concentration so as to enhance the conductance modulation effect of a drift region of the device, improve the output current of the device, and introduce Al with gradually changed x at a P + AlGaN/GaN heterojunction interfacexGa1-xAnd the N is a graded layer to reduce the conduction voltage drop of the device. Compared with the GaN IGBT with the same size, the output current of the IGBT1 is improved by 25 percent and the specific on-resistance is reduced by 0.07V when the doping concentration of the drift region and the collector region (drain region) is consistent, and compared with the GaN IGBT with the same size, the output current of the IGBT1 is improved by 177.8 percent and the specific on-resistance is reduced by 50 percent, meanwhile, Al is introduced into the structure provided by the inventionxGa1-xCompared with the GaN IGBT with the same size, the voltage resistance of the device is improved by 100V by the N/GaN heterojunction, and the GaN materialThe pressure resistance grade of the material reaches 137.5V/mu m.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the means of the instrumentalities and combinations particularly pointed out hereinafter.
Drawings
For the purposes of promoting a better understanding of the objects, aspects and advantages of the invention, reference will now be made to the following detailed description taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic view of an N-GaN substrate trench-type insulated gate bipolar transistor structure (IGBT1) of example 1, in which AlGaN with a gradually changed Al composition is introduced;
fig. 2 is a schematic diagram of a heterojunction-injected trench-type GaN insulated gate bipolar transistor structure (IGBT 2) of example 2;
FIG. 3 shows the structure of a GaN MOS transistor (same size as example 2) of example 4;
FIG. 4 is a graph showing the threshold voltage curves of the GaN IGBT and the MOS transistor of example 1(IGBT1) and example 3 (example 4);
FIG. 5 is a schematic view of an output characteristic curve of embodiment 1(IGBT 1);
fig. 6 is a schematic diagram showing output characteristic curves of a GaN IGBT (example 3) and a MOS transistor (example 4) having the same size as that of example 1(IGBT 1);
FIG. 7 shows the gate voltage V in the forward conduction modegThe electron concentration profiles of example 1(IGBT1) at coordinates 9.92 μm ≦ x ≦ 10.05 μm, and y ═ 9 μm (straight line BB' in fig. 1) for 5V, 6V, 7V, 8V, and 9V, respectively;
FIG. 8 shows the gate voltage V in the forward conduction modegThe coordinates of the GaN IGBT and the MOS tube are respectively 5V, 6V, 7V, 8V and 9V, the same size is that x is less than or equal to 10.05 μm and y is 9 μm (the straight line B in figure 3)1B1' and line B in FIG. 42B2') a transverse profile of electron concentration over the range;
FIG. 9 shows the gate voltage V in the forward conduction modegThe cavity concentration profile in example 1(IGBT1) was plotted longitudinally over the range of coordinates x 4 μm, y 0 μm ≦ y 8 μm (line CC in fig. 1) for 5V, 6V, 7V, 8V, and 9V, respectively;
FIG. 10 shows the gate voltage V in the forward conduction modegThe same size GaN IGBTs (example 3) have coordinates x of 4 μm, 0 μm and y of 8 μm (straight line C in fig. 1) for 5V, 6V, 7V, 8V, and 9V, respectively1C1') longitudinal profile of hole concentration over a range;
FIG. 11 is a schematic diagram showing forward withstand voltage curves of example 1(IGBT1), a GaN IGBT (example 3) and a MOS transistor (example 4) with the same size;
in the case of forward breakdown voltage shown in fig. 12, in example 1(IGBT1), GaN IGBT (example 3) of the same size, and MOS transistor (example 4), x is 7.99 μm, and y is 0 μm ≦ y ≦ 10 μm (line AA' in fig. 1 and line a in fig. 3)2A2') field concentration profile longitudinally within the range;
FIG. 13 shows the doping concentrations of N-drift regions of example 1(IGBT1) and GaN IGBT of the same size (example 3) at 5X 1015cm-3To 4X 1016cm-3When the voltage changes, the device breakdown voltage changes and contrasts with the curve chart;
FIG. 14 is a graph showing the turn-on voltage drop curves of example 1(IGBT1), a GaN IGBT (example 3) and a MOS transistor (example 4) with the same size;
FIG. 15 shows the doping concentrations of N-drift regions of example 1(IGBT1) and GaN IGBT of the same size (example 3) at 5X 1015cm-3To 4X 1016cm-3When the voltage changes, the on-state voltage drop of the device is changed by a comparison curve;
FIG. 16 shows the doping concentrations of N-drift regions of example 1(IGBT1) and GaN IGBT (example 3) and MOS transistor (example 4) with the same size15cm-3To 4X 1016cm-3When the change is carried out, comparing the change of the specific on-resistance of the device with a curve diagram;
fig. 17 is a schematic view of the turn-off characteristic curve of embodiment 1(IGBT 1);
fig. 18 is a schematic view of the main process flow of example 1(IGBT 1);
reference numerals: the device comprises a 1-P + collector, a 2-N-drift region, a 3-P-channel region, a 4-N + emitter substrate, a 5-insulating dielectric layer, a 6-grid metal contact region, a 7-collector metal contact region, an 8-emitter metal contact region I, a 9-emitter metal contact region II, a 10-Al component gradient region, an 11-N + drain region and a 12-drain metal contact region.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention in a schematic way, and the features in the following embodiments and examples may be combined with each other without conflict.
Wherein the showings are for the purpose of illustrating the invention only and not for the purpose of limiting the same, and in which there is shown by way of illustration only and not in the drawings in which there is no intention to limit the invention thereto; to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The same or similar reference numerals in the drawings of the embodiments of the present invention correspond to the same or similar components; in the description of the present invention, it should be understood that if there is an orientation or positional relationship indicated by terms such as "upper", "lower", "left", "right", "front", "rear", etc., based on the orientation or positional relationship shown in the drawings, it is only for convenience of description and simplification of description, but it is not an indication or suggestion that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes, and are not to be construed as limiting the present invention, and the specific meaning of the terms may be understood by those skilled in the art according to specific situations.
Example 1:
as shown in fig. 1, in the present embodiment, a trench-type GaN insulated gate bipolar transistor structure (IGBT1) with AlGaN introduced with a gradually-changed Al composition is designed, the device structure is bilaterally symmetric, and a left half structure includes a P + collector 1, an N-drift region 2, a P-channel region 3, an N + emitter substrate 4, and an insulating dielectric layer (Al) in the left half structure2O3)5, a grid metal (Al) contact region 6, a collector metal (Al) contact region 7, an emitter metal (Ti/Al/Ti/Au) contact region I8, an emitter metal (Ni/Al) contact region II 9 and an Al component gradient region 10.
P + collector 1 is arranged between the lower surface of collector metal Ni contact region 7 and the upper surface of Al composition gradient region 10, and P + collector 1 is Al with thickness h1 ═ 0.5 μm and width w1 ═ w3 ═ 8 μm0.2Ga0.8N, and the doping concentration of the P + collector electrode 1 is selected to be 17 th power;
the N-drift region 2 is positioned on the lower surface of the Al component gradient region 10 and is in contact with the upper surface of the right part of the P-channel region 3, the lower right surface is in contact with the upper part of the left surface of the insulating medium layer 5, the N-drift region 2 is GaN with the thickness h3 being 8 mu m, the width w1 being w3 being 8 mu m, and the doping concentration of the N-drift region 2 is selected to be 16 power;
the P-channel region 3 is arranged between the lower surface of the N-drift region 2 and the upper surface of the N + emitter substrate 4, the right surface of the P-channel region is in contact with the middle part of the left surface of the insulating medium layer 5, the thickness h4 of the P-channel region 3 is 1 mu m, the width of the P-channel region is 10 mu m, and the doping concentration of the P-channel region 3 is selected to be 17 th power;
the N + emitter substrate 4 is positioned on the lower surface of the P-channel region 3 and the lower surface of the insulating medium layer 5 and is in contact with the upper surface of the emitter metal contact region I8, the N + emitter substrate 4 is GaN with the thickness h5 being 2 micrometers and the width w1+ w2+ w3 being 24 micrometers, and the doping concentration of the N + emitter substrate 4 is selected to be 18 times;
the insulating medium layer 5 is in contact with the right lower surface of the N-drift region 2, the right surface of the P-channel region 3 and the upper middle surface of the N + emitter substrate 4, and the thickness of the insulating medium layer is 0.1 mu m;
an Al composition gradient region 10 is arranged between the upper surface of the N-drift region 2 and the lower surface of the P + collector 1, and the Al composition gradient region 10 is Al with the thickness h2 being 50nm and the width being 8 μmxGa1-xN，AlxGa1-xThe value of x of N is gradually changed within the range of 0.2-0 from top to bottomAnd the doping concentration of the Al composition gradient region 10 is selected to be 17 th power.
Example 2:
as shown in fig. 2, the present embodiment designs a heterojunction-implanted trench-type GaN insulated gate bipolar transistor structure, the device structure is bilaterally symmetric, and the left half structure includes a P + collector 1, an N-drift region 2, a P-channel region 3, an N + emitter substrate 4, and an insulating medium layer (Al) in the left half structure2O3)5, a grid metal (Al) contact area 6, a collector metal (Al) contact area 7, an emitter metal (Ti/Al/Ti/Au) contact area I8 and an emitter metal (Ni/Al) contact area II 9.
Based on the structure of example 1, this example structure omits the Al composition gradient region 10 in example 1, and the rest of the structure is the same as example 1.
Example 3:
in this embodiment, a structure diagram of a GaN IGBT with the same size as that of embodiment 2(IGBT 2) is designed, the structure of the device is bilaterally symmetric, and the left half structure includes a P + collector 1, an N-drift region 2, a P-channel region 3, an N + emitter substrate 4, and an insulating dielectric layer (Al)2O3)5, a gate metal (Al) contact region 6, a collector metal (Ni) contact region 7, an emitter metal (Ti/Al/Ti/Au) contact region 8, and an emitter metal (Ni/Al) contact region 9.
Example 4:
as shown in fig. 3, this embodiment designs a GaN MOS structure with the same size as that of embodiment 2(IGBT 2), the device structure is symmetric from left to right, and the left half structure includes an N + drain region 11, an N-drift region 2, a P-channel region 3, an N + emitter substrate 4, and an insulating dielectric layer (Al) in the form of a gate electrode, a source electrode, and a drain electrode2O3)5, a grid metal (Al) contact area 6, a drain metal (Ti/Al/Ti/Au) contact area 12, an emitter metal (Ti/Al/Ti/Au) contact area I8 and an emitter metal (Ni/Al) contact area II 9.
Based on the structure of embodiment 2, this embodiment structure replaces the P + collector 1 in embodiment 2 with the N + drain region 11, replaces the collector metal contact region 7 with the drain metal contact region 12, and the rest of the structure remains unchanged. The thickness h6 of the drain metal contact region 12 is 0.1 μm, the width W1 is W3 is 8 μm, and the doping concentration is selected to be 17 th power.
And (3) comparing and analyzing the structural performances:
fig. 4 shows that T is 300K at room temperature and the concentration in N-drift region 2 is 1 × 1016cm-3The doping concentration of the P-channel region 3 is 1 multiplied by 1017cm-3In the embodiment 1(IGBT1), the same size GaN IGBT and MOS transistor threshold voltage curve, and the data result obtained by the Silvaco simulation is plotted by the Origin tool as shown in fig. 4, it can be seen that when the doping concentration of the P-channel region 3 is the same as the thickness of the oxide layer, the threshold voltage is basically the same, the threshold voltage is about 4.3V, the threshold voltage of the MOS transistor is about 5.5V, and the threshold voltage of the MOS transistor is higher than that of the IGBT by 1.2V.
Fig. 5 shows that T is 300K at room temperature and the concentration in the drift region 2 is 1 × 1016cm-3The doping concentration of the P-channel region 3 is 1 x 1017cm-3In the meantime, the output characteristic curve of embodiment 1(IGBT1) is plotted by the Origin tool, and the data result obtained by the silvero simulation is shown in fig. 5, which shows that V is the output characteristic curve of IGBT1gWhen the device is started at 5V, an inversion layer is formed on one side of the channel layer at the contact surface of the P-channel region 3 and the insulating medium layer 5, so that the N-drift region 2 and the N + emitter substrate 4 are conducted, electrons move from the N + emitter substrate 4 to the N-drift region 2 to form electron current, and the electron current promotes the P + collector 1 to inject holes into the N-drift region 2 to form a conductance modulation effect. As can be seen from fig. 5, after the channel is turned on, the output current increases first and then gradually reaches saturation as the voltage of the P + collector 1 increases, and the saturation current also gradually increases as the gate voltage increases. It can be seen from the figure that at VdWhen the voltage is less than 3V, no current is formed although the channel is opened, because a PN junction is formed between the P + collector 1 and the N-drift region 2, the current can be formed when the collector voltage is greater than the junction voltage of the PN junction.
FIG. 6 shows the concentration of 1 × 10 in the drift region at room temperature with T300K16cm-3The doping concentration of the P-channel region 3 is 1 multiplied by 1017cm-3Meanwhile, the GaN IGBT (fig. 6(a)) and the MOS transistor (fig. 6(b)) of the same size output characteristic curves. As can be seen from fig. 6, in example 1(IGBT1) and the GaN IGBT, when the channel concentration and the drift region concentration are the same, the gate and the collector are applied with the respective phasesAt the same voltage, the maximum output current of the IGBT1 is increased by 25% compared with the maximum output current of the GaN IGBT and by 177.8% compared with the maximum output current of the GaN MOS, which is mainly due to the introduction of Al in example 1xGa1-xAn N/GaN heterojunction, and an Al composition gradient region 10 is provided in embodiment 1, compared with GaN IGBT, the heterojunction AlxGa1-xThe N/GaN hole injection ratio to the drift region is larger, and only one electron carrier forms current in the MOS tube.
FIG. 7 shows the concentration of 1 × 10 in the drift region at room temperature with T300K16cm-3The doping concentration of the P-channel region 3 is 1 multiplied by 1017cm-3In example 1(IGBT1), the electron concentration profile in the range of coordinate y 9 μm, 9.92 μm ≦ x ≦ 10.04 μm (indicated by the straight line BB' in fig. 1), i.e., the electron concentration at the channel inversion layer, at different gate voltages. As is clear from the analysis of fig. 5, it is obvious that the larger the voltage applied to the gate electrode is, the higher the concentration of electrons at the inversion layer is, and the wider the inversion layer is formed at the side of the channel layer at the boundary between the insulating dielectric layer 5 and the P-channel region 3, so that the larger the number of electrons passing through the channel region per unit time is, the larger the saturation current of electrons is.
FIG. 8 shows the concentration of 1 × 10 in the drift region at room temperature with T300K16cm-3The doping concentration of the P-channel region 3 is 1 multiplied by 1017cm-3In the case of the GaN IGBT (fig. 8(a)) and the MOS transistor (fig. 8(B)) under different gate voltages, the coordinate y is 9 μm, 9.92 μm ≦ x ≦ 10.04 μm (straight line B in fig. 2)1B1' and line B in FIG. 32B2' shown) electron concentration lateral profile, i.e., the electron concentration at the channel inversion layer. As is clear from analysis in conjunction with fig. 7, it is clear that the larger the voltage applied to the gate electrode is, the higher the concentration of electrons at the inversion layer is, and the wider the inversion layer is formed at the side of the channel layer at the boundary between the insulating dielectric layer 5 and the P-channel region 3, so that the larger the number of electrons passing through the channel region per unit time is, the larger the saturation current of electrons is. Comparing fig. 7 and fig. 8, it can be found that the electron concentration of the GaN IGBT is slightly higher than that of both example 1(IGBT1) and the GaN MOS transistor.
FIG. 9 shows T300K in the drift region at room temperatureThe concentration is 1X 1016cm-3The doping concentration of the P-channel region 3 is 1 multiplied by 1017cm-3In example 1(IGBT1), the vertical distribution of hole concentration in the range of 0 μm or less and y or less 8 μm (indicated by the line AA' in fig. 1) at different gate voltages is shown in fig. 9, and it can be seen that the hole concentration gradually increases and is higher than the intrinsic doping concentration in the range of 0 μm or less and y or less and 0.55 μm because Al is present in the IGBT1xGa1-xAt the N/GaN heterojunction, a large number of holes are accumulated in AlGaN. When the device is conducted, because the electron concentration of the emitter is higher than that of the drift region, electrons flow to the drift region, so that holes in the collector region are injected into the drift region to generate a conductivity modulation effect, and it can be seen from the figure that the concentration of the holes injected by the collector is gradually reduced in the range of the drift region with y being more than or equal to 0.55 mu m and less than or equal to 8 mu m. As the gate voltage increases, the amount of electrons flowing from the emitter to the drift region gradually increases, and the amount of holes injected from the collector to the drift region also gradually increases.
Fig. 10 shows the concentration of T300K in the drift region at room temperature of 1 × 1016cm-3The doping concentration of the P-channel region 3 is 1 multiplied by 1017cm-3In the GaN IGBT, under different gate voltages, the vertical distribution of hole concentration within the range of x being 4 μm and y being 0 μm or more and y being 8 μm or less (indicated by the line AA' in fig. 1) is shown, and as can be seen from fig. 10, the hole concentration injected by the collector gradually decreases within the range of the drift region where y is 0.5 μm or more and y is 8 μm or less. As the gate voltage increases, the amount of electrons flowing from the emitter to the drift region gradually increases, and the amount of holes injected from the collector to the drift region also gradually increases. As can be seen by comparing FIG. 9, there is no Al in the GaN IGBTxGa1-xThe N/GaN heterojunction, so that within the range that y is more than or equal to 0 μm and less than or equal to 0.5 μm, the hole concentration of the IGBT1 is higher than that of the GaN IGBT, and the hole injection amount is also higher than that of the GaN IGBT, so that the output current of the IGBT1 is higher than that of the GaN IGBT. Also, since hole injection, i.e., conductance modulation, exists in example 1(IGBT1) and the GaN IGBT, the output current of the IGBT device is larger than that of the MOS transistor.
Fig. 11 is a graph showing the forward breakdown voltage of example 1(IGBT1), GaN IGBT, and GaN MOS transistor at room temperature when T is 300K. For IGBT, P + collector 1Applying a positive voltage, the PN junction J of the P + collector 1 and the N-drift region 21PN junction J of forward biased, N-drift region 2 and P-channel region 32Reverse bias, since the doping concentration of the channel region 3 of the N-drift region is higher than that of the channel region 2 of the N-drift region, the doping concentration of the channel region is higher than that of the channel region2The depletion region is expanded towards the N-drift region 2, and the withstand voltage of the device is mainly determined by the size and doping concentration of the drift region 2. The MOS transistor withstand voltage is also at the PN junction between the N-drift region 2 and the P-channel region 3, and it can be seen from fig. 11 that as the collector voltage gradually increases, the collector current of the device suddenly and significantly increases at a certain point, at which time the device undergoes avalanche breakdown, and the doping concentration of the IGBT1 and GaN IGBT in the N-drift region 2 is 1 × 1016cm-3The concentration of the P-channel region 3 is 1X 1017cm-3In the process, the withstand voltage of the IGBT1 reaches 1100V, which is 40V higher than the withstand voltage of the GaN IGBT and the MOS tube, mainly because a heterojunction exists in the IGBT1 to form a built-in electric field, so that the withstand voltage of the IGBT1 device is slightly higher.
Fig. 12 shows that T is 300K at room temperature, and when the forward breakdown voltage of example 1(IGBT1), GaN IGBT, and GaN MOS is equal to 7.99 μm in coordinate x, y is equal to or less than 0 μm and equal to or less than 10 μm (line AA' in fig. 1, line a in fig. 2)1A1' and line A in FIG. 32A2' shown) electric field concentration profile in the range. As can be seen from fig. 12, in the ranges of the coordinate x being 7.99 μm and the coordinate y being 0 μm being 0.55 μm, the electric field of the IGBT1 is higher than that of the GaN IGBT and MOS transistor, and the domination is due to the introduction of Al into the IGBT1xGa1-xThe N/GaN heterojunction forms a built-in electric field, so that the voltage resistance of the IGBT1 of the device is higher than that of a GaN IGBT and a MOS tube. The electric field concentration of each of the three devices reached a peak at y-6.5 μm, where the electric field concentration was 4MV/μm, and a breakdown phenomenon occurred. Breakdown occurs here because the structure proposed in this patent is where x is 8 μm and y is 6.5 μm, which is the corner of the drift region 2, resulting in a relatively concentrated electric field. It can also be seen from fig. 12 that the electric field of IGBT1 is higher than that of GaN IGBT at y 6.5 μm, mainly because the injection amount of holes into P + collector 1 of IGBT1 to N-drift region 2 is higher than that of GaN IGBT.
Fig. 13 shows that T is 300K at room temperature and the doping concentration in the P-channel region 3 is 1 × 1017cm-3Doping concentration of the N-drift region 2At 5X 1015cm-3To 4X 1016cm-3Comparative graph of the variation curves of the breakdown voltages of example 1(IGBT1) and GaN IGBT when varied. As can be seen from fig. 13, the breakdown voltage decreases with increasing doping concentration of the N-drift region 2, and in the given data, the doping concentration in the N-drift region 2 has a minimum value of 5 × 1015cm-3When the breakdown voltage of the IGBT1 and the GaN IGBT reaches the maximum value, the breakdown voltage reaches about 1388V, the voltage withstanding level of the GaN material can reach 173.5V/mum at the moment, but the N-type doping with too low concentration cannot be realized due to the limitation of the GaN material, so the N-drift region 2 has the doping concentration of 1 multiplied by 1016cm-3. PN junction J of N-drift region 2 and P-channel region 3 with increasing concentration of N-drift region 22The depth of the N-drift region 2 is gradually reduced, so that the withstand voltage of the device is gradually reduced. It can also be seen from fig. 13 that the doping concentration in the drift region is higher than 1 × 1016cm-3In the process, the voltage resistance of the IGBT1 is about 100V higher than that of the GaN IGBT, and the heterojunction is introduced into the IGBT1, so that a built-in electric field is formed at the heterojunction between the P + collector 1 and the N-drift region 2, and the voltage resistance of the device is improved.
Fig. 14 shows that T is 300K at room temperature and the doping concentration in the P-channel region 3 is 1 × 1017cm-3The doping concentration of the drift region 2 is 5 multiplied by 1015cm-3To 4X 1016cm-3When varied, the conduction voltage drop curves of example 1(IGBT1) and the GaN IGBT and MOS transistors of the same size. As can be seen from FIG. 14, the voltage is applied to the voltage V from the beginning at the collectorcBefore reaching 3V, no collector current is output, mainly because the PN junction voltage of the P + collector 1 and the N-drift region 2 is influenced when V iscAfter more than 3V, the collector current IcThe current is increased rapidly and reaches 100A/cm for IGBT2When the device is on, V at this timedI.e., the on-state voltage drop of the IGBT device, the on-voltage V of example 1(IGBT1)on1About 3.81V, the turn-on voltage V of the GaN IGBTon2About 3.88V. For MOS tube, the current reaches 20A/cm2The device is turned on, so that the turn-on voltage V of the MOS transistoron2About 0.32V. Of IGBT1The starting voltage is lower than that of the GaN IGBT because the heterojunction in the IGBT1 improves the hole injection amount of the device, strengthens the conductance modulation effect of the drift region of the device, finally improves the collector current of the device and reduces the conduction voltage drop of the device.
Fig. 15 shows that T is 300K at room temperature, and the doping concentration in the channel region 3 is 1 × 1017cm-3The doping concentration of the N-drift region 2 is 1 multiplied by 1016cm-3The IGBT tube conduction voltage drop curve was the same as that of example 1(IGBT 1). As can be seen from fig. 15, as the doping concentration of the N-drift region 2 increases, the turn-on voltage drop of the IGBT device decreases gradually, and mainly, the injection quantity of minority carrier holes from the P + collector region to the drift region increases gradually during forward turn-on, so that the conductance modulation effect in the IGBT is enhanced, the resistance of the drift region is reduced, and the turn-on voltage drop of the device is reduced. Because Al is introduced into the IGBT1xGa1-xThe N/GaN heterojunction enhances the hole injection amount of the P + collector 1 to the N-drift region 2, so that the conduction voltage drop of the IGBT1 is smaller than that of the GaN IGBT.
Fig. 16 shows that T is 300K at room temperature and the doping concentration in the P-channel region 3 is 1 × 1017cm-3The doping concentration of the N-drift region 2 is 5 multiplied by 1015cm-3To 4X 1016cm-3Variation curves of specific on-resistance of the embodiment 1(IGBT), GaN IGBT and MOS devices during variation. As can be seen from fig. 16, as the doping concentration of the drift region increases, the turn-on voltage drop of the IGBT device gradually decreases, because as the doping concentration of the drift region gradually increases, the quantity of minority carrier holes injected from the collector region into the drift region during forward conduction also gradually increases, so that the conductance modulation effect in the IGBT is enhanced, the resistance of the drift region is reduced, and the turn-on voltage drop of the device is reduced. The on-resistance of the MOS transistor is also gradually reduced because the carrier concentration of the drift region 2 is increased with the increase of the doping concentration, thereby reducing the specific on-resistance of the device. As can be seen from the analysis in fig. 7, 8, 9, and 10, the hole injection amount in the drift region of the IGBT1 is higher, and the conductance modulation effect is stronger, so that the output current of the device is improved more, and the specific on-resistance of the device is finally reduced better. Compared with a GaN MOS tube, the IGBT1 is proportional to the conductanceThe on-resistance is reduced by 50%.
Fig. 17 shows that T is 300K at room temperature and the concentration in the N-drift region 2 is 1 × 1016cm-3The doping concentration of the P-channel region 3 is 1 multiplied by 1017cm-3In the case of the turn-off characteristic curve of the IGBT1 of example 1, the data result obtained by the silveraco simulation is plotted by the Origin tool. At time T2X 10-6At s, the gate voltage is decreased from 12V to 0V, and the collector voltage is decreased from 10V to 0V. As can be seen from fig. 17, when T is 2 × 10-6s, the gate voltage becomes 0V, the channel is closed, the collector current is rapidly reduced, the turn-off time is calculated by the time taken for the current to be reduced from 90% to 10% of the maximum current, and the turn-off time of the IGBT is 14 ns.
The invention provides a heterojunction-injected groove type GaN insulated gate bipolar transistor structure, which takes a schematic diagram 1 as an example, and the main process flow is shown in FIG. 18. The method mainly comprises the following steps:
(1) forming an N-GaN layer in the emitter region through an ion implantation process;
(2) a layer of GaN material is further extended on the surface of the whole N-GaN layer, and then P-GaN is formed through an ion implantation process;
(3) a layer of GaN material is extended on the surface of the P-GaN again, and an N-GaN channel layer is formed through an ion implantation process;
(4) continuously extending Al with l layer x changing within 0-0.2 on the surface of the whole N-GaN channel layerxGa1-xN material, and then extending a layer of Al with x equal to 0.2xGa1-xN material, forming P-Al by two times of ion implantation processxGa1-xN；
(5) Etching the device and manufacturing a gate oxide layer;
(6) and depositing a metal electrode.
In the implementation process, according to the design requirements of specific devices, the substrate material of the N-substrate trench type GaN insulated gate bipolar transistor structure provided by the invention can be silicon carbide (SiC) material and can also be sapphire and other materials to replace bulk silicon carbide (SiC) during specific manufacturing.
Finally, the above embodiments are only intended to illustrate the technical solutions of the present invention and not to limit the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions, and all of them should be covered by the claims of the present invention.

Claims (10)

1. The utility model provides a ditch slot type GaN insulated gate bipolar transistor that heterojunction was injected, its characterized in that, this transistor is bilateral symmetry structure, and half structure on the left side includes: the device comprises a P + collector (1), an N-drift region (2), a P-channel region (3), an N + emitter substrate (4), an insulating dielectric layer (5), a grid metal contact region (6), a collector metal contact region (7), an emitter metal contact region I (8), an emitter metal contact region II (9) and an Al component gradient region (10);
the P + collector (1) is positioned on the lower surface of the collector metal contact region (7) and is in contact with the upper surface of the Al component gradient region (10); the upper surface of the N-drift region (2) is in contact with the lower surface of the Al component gradient region (10), the lower surface of the N-drift region is in contact with the upper surface of the P-channel region (3), and the right lower surface of the N-drift region is in contact with the left upper surface of the insulating medium layer (5); the lower surface of the P-channel region (3) is in contact with the upper surface of the N + emitter substrate (4) and the upper surface of the emitter metal contact region II (9), and the right surface of the P-channel region is in contact with the middle part of the left surface of the insulating medium layer (5); the N + emitter substrate (4) is positioned on the lower surface of the P-channel region (3) and the lower surface of the insulating medium layer (5), and the lower surface of the N + emitter substrate is in contact with the upper surface of the emitter metal contact region I (8); the left surface of the insulating medium layer (5) is in contact with the right lower surface of the N-drift region (2), the right surface of the P-channel region (3) and the upper middle surface of the N + emitter substrate (4); the grid metal contact region (6) is positioned on the upper surface of the insulating medium layer (5); the emitter metal contact area II (9) is embedded in the N + emitter substrate (4), the upper surface of the emitter metal contact area II is in contact with the lower surface of the P-channel area (3), and the lower surface of the emitter metal contact area II is in contact with the upper surface of the emitter metal contact area I (8).
2. The heterojunction-implanted trench GaN insulated-gate bipolar transistor of claim 1, wherein said Al composition is gradedThe material adopted by the variable region (10) is AlxGa1-xAnd N, wherein the value of x gradually changes from top to bottom within the range of 0.2-0.
3. The heterojunction-implanted trench-type GaN igbt according to claim 1, wherein the P + collector (1) is made of Al0.2Ga0.8N。
4. The heterojunction-implanted trench-type GaN insulated gate bipolar transistor according to claim 1, wherein the N-drift region (2) is made of GaN.
5. The heterojunction-implanted trench-type GaN igbt according to claim 1, wherein the P-channel region (3) is made of Al2O3Or SiN, AlN, MgO, Ga2O3、AlHfOxAnd HfSiON, or a combination of several of them.
6. The heterojunction-implanted trench-type GaN insulated gate bipolar transistor according to claim 1, wherein the collector metal contact region (7) is made of a material comprising Al, Au or Pt.
7. The heterojunction injection trench GaN insulated gate bipolar transistor of claim 1, wherein the emitter metal contact region i (8) is made of a material comprising Ti/Al/Ti/Au alloy, Ti/Al/Ni/Au alloy or Ti/Al/Mo/Au alloy.
8. The heterojunction-implanted trench-type GaN insulated gate bipolar transistor according to claim 1, wherein the emitter metal contact region ii (9) is made of a material comprising Ni/Ti, Al/Ti or Pt/Ti.
9. A heterojunction-implanted trench-type GaN insulated gate bipolar transistor according to claim 1, wherein the doping concentrations of the P + collector (1), N-drift region (2), P-channel region (3), N + emitter substrate (4) and N + drain region (11) are varied as required.
10. The heterojunction-implanted trench-type GaN insulated gate bipolar transistor according to any of claims 1 to 9, wherein the transistor structure is suitable for trench-type MOS transistors, i.e. replacing the P + collector (1) with an N + drain region (11) and the collector metal contact region (7) with a drain metal contact region (12).
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