CN113608930A

CN113608930A - System chip and electronic device

Info

Publication number: CN113608930A
Application number: CN202110977669.6A
Authority: CN
Inventors: 廖佳伟; 张逸凡
Original assignee: Xiamen Ziguang Zhanrui Technology Co ltd
Current assignee: Xiamen Ziguang Zhanrui Technology Co ltd
Priority date: 2021-08-24
Filing date: 2021-08-24
Publication date: 2021-11-05
Anticipated expiration: 2041-08-24
Also published as: CN113608930B; WO2023024863A1

Abstract

The application provides system on chip and electronic equipment, this system on chip includes: at least one service processing module and a nonvolatile storage module; the nonvolatile storage module is electrically connected with the service processing module; the service processing module is used for processing the corresponding service; and after receiving the abnormal power failure signal, storing the verification data of the corresponding service in a nonvolatile storage module, wherein the verification data is used for verifying the service data generated by the corresponding service. According to the method and the device, the nonvolatile storage module is integrated on the system chip, the check data on the service processing module can be stored in the nonvolatile storage module after the system chip is abnormally powered down, the check data are prevented from being lost, and the service processing module can still normally work after being powered on next time after the abnormal power down.

Description

System chip and electronic device

Technical Field

The present application relates to the field of computer technologies, and in particular, to a system chip and an electronic device.

Background

In general, when an electronic device is normally powered off, user data in a system chip is stored in a nonvolatile memory (flash) from a dynamic random access memory (DDR), and then the relevant user data can be recovered when the electronic device is powered on next time.

However, various abnormal power failures may occur in the electronic device during use, for example, a sudden power failure, an abnormal battery of the electronic device, or an abnormal shut-down of an electric switch. Under these conditions, the dynamic random access memory and the nonvolatile memory stop working, so that the dynamic random access memory cannot store the user data into the nonvolatile memory, and the electronic device cannot work normally when being started next time.

Disclosure of Invention

The application provides a system chip and electronic equipment for solve the system chip when the unusual power failure, the problem that check-up data is lost.

In a first aspect, the present application provides a system chip, comprising: at least one service processing module and a nonvolatile storage module; the nonvolatile storage module is electrically connected with the service processing module;

the service processing module is used for processing the corresponding service; and after receiving the abnormal power failure signal, storing the verification data of the corresponding service in a nonvolatile storage module, wherein the verification data is used for verifying the service data generated by the corresponding service.

Optionally, the system chip further comprises: the service processing module is connected with the application processor and the power management module; the power management module is used for detecting whether the service processing module and the nonvolatile storage module are powered down or not after receiving the abnormal power down signal; if the service processing module and/or the nonvolatile storage module are powered off, transmitting an abnormal power-off signal to the application processor; and the application processor is used for responding to the received abnormal power failure signal and controlling the power supply management module to power on the power-failure service processing module and/or the nonvolatile storage module.

Optionally, the service processing module includes: the device comprises a random storage unit and an operation unit, wherein check data are stored in a target stack of the random storage unit; the operation unit is a unit which is in an operation state before abnormal power failure; and the application processor is specifically used for controlling the power management module to power on the target stack and the operation unit.

Optionally, the service processing module is specifically configured to: and storing the verification data in the target stack in the nonvolatile storage module through the operation unit.

Optionally, the system chip further comprises: a control module; the power management module is connected with the control modules and is also used for powering off the plurality of control modules after receiving the abnormal power failure signal.

Optionally, the service processing module is further configured to: after the verification data is stored in the nonvolatile storage module, generating a storage completion identifier, and transmitting the storage completion identifier to the application processor; the application processor is also used for receiving the storage completion identification transmitted by the service processing module and controlling the power supply management module to power off the system chip according to the storage completion identification.

Optionally, the service processing module is further configured to: after detecting that the electronic equipment is restarted, acquiring verification data from the nonvolatile storage module; and operating the service processing module according to the verification data.

Optionally, the service processing module is specifically configured to: and after the electronic equipment is detected to be restarted, if the verification data acquisition from the random storage unit fails, acquiring the verification data from the nonvolatile storage module.

Optionally, the nonvolatile memory module is integrated in the service processing module.

Optionally, the nonvolatile memory module includes: a one-time programmable memory.

A second aspect of the present application provides an electronic device, including the system chip as in any one of the above, the electronic device further including: the device comprises a battery, a power management chip, a nonvolatile memory and a dynamic random access memory; the battery is connected with the power management chip, the power management chip is connected with the system chip, the nonvolatile memory is connected with the application processor, and the dynamic random access memory is used for being connected with the service processing module.

Drawings

In order to more clearly illustrate the technical solutions in the present application or the prior art, the drawings needed to be used in the description of the embodiments or the prior art are briefly introduced below, it is obvious that the drawings in the following are some embodiments of the present invention, and it will be obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic view of an application scenario of a system chip provided in the present application;

FIG. 2 is a block diagram of a system chip provided in the present application;

FIG. 3 is a block diagram of another electronic device according to the present application;

FIG. 4 is a block diagram of another electronic device according to the present application;

FIG. 5 is a flow chart illustrating steps performed by a system chip according to the present application during normal power down;

FIG. 6 is a schematic flow chart illustrating steps executed by a system chip in an abnormal power failure condition according to the present application;

fig. 7 is a flowchart illustrating steps executed by a system chip after being restarted according to the present disclosure.

Detailed Description

For the purpose of making the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the present application will be described clearly and completely with reference to the drawings in the present application, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without any inventive step, are within the scope of the present invention.

First, for the sake of understanding, terms are explained in this application:

PMIC: a Power Management Integrated Circuit Power Management chip is a chip that plays roles in converting, distributing, detecting, and other Power Management functions in an electronic device system.

SoC: the System On Chip, a System Chip, is an integrated circuit that integrates a computer or electronic System into a single Chip.

PMU: the Power Management Unit in the SOC is responsible for Power supply and Power down of each module in the SOC, low Power Management, and the like.

Wdg: watchdog, a module that monitors the operating state of an electronic device that triggers when abnormal. The electronic equipment is integrated on the system chip, the electronic equipment operates Wdg at preset time intervals when in normal operation, and if Wdg does not operate after the preset time is exceeded, the electronic equipment is determined to be abnormal.

7s Reset: when the electronic equipment is pressed for 7 seconds, the PMIC is forced to power off the system chip, and then power is supplied again.

OTP: over-temperature Protection refers to the action of protecting an electronic device by adopting a special means when the temperature of the running electronic device exceeds a set temperature.

And (3) OVP: over-voltage Protection refers to a Protection method for disconnecting a power supply or reducing the voltage of an electronic device when the line voltage of the electronic device exceeds a set voltage.

Efuse: the one-time programmable memory is an electronic fuse, and can realize data updating and permanent storage for thousands of times through hardware special design optimization.

AON: always on means that the corresponding module is always on-line/powered.

APDU: application Protocol Data Unit, is the external legal Data/communication channel of the service module

AP: an Application processor is a very large scale integrated circuit which expands an audio function and a dedicated interface on the basis of a low power consumption CPU (central processing unit).

Fig. 1 is a schematic view of an application scenario of a system chip provided in the present application, specifically, the system chip is disposed in an electronic device, for example, a mobile phone, a tablet computer, a smart watch, or a smart home. In addition, the system chip is battery powered, as shown in FIG. 1. In fig. 1, an electronic apparatus 100 includes: system-on-chip 10, battery 20, power management chip 30, non-volatile memory 40, and dynamic random access memory 50. The system chip 10 includes a power management module 11, an application processor 12, and a service processing module 13. The service processing module 13 includes a random access memory unit 131.

In fig. 1, the service processing module 13 is a processing module set for a specific service, for example, a banking service, an insurance service, a communication service, and the like. The service processing module 13 generates service data and check data during operation. The service data is encrypted and verified and then output to the dynamic random access memory 50. Further, the application processor 12 transmits the service data in the dynamic random access memory 50 to the nonvolatile memory 40, so as to realize access according to service requirements. And the check data generated by the service processing module 13 is stored in the random access memory unit 131. Under the condition that the service processing module 13 is powered off but the random access memory unit 131 is always powered on, after the service processing module 13 is powered on again, the check data can be directly read from the random access memory unit 131, so that the service processing module can run in real time, and the efficiency of service processing is improved.

When the normal program is used for powering off, the service processing module 13 stores the check data in the random access memory unit 131 in the dynamic random access memory 50, and then the application processor 12 transfers the check data to the nonvolatile memory 40, so that the check data can be obtained from the nonvolatile memory 40 when the service processing module 13 is powered on next time, and the service processing module 13 is operated.

The check data is used for checking the service data to ensure that the service processing module works normally. Illustratively, in banking, business data such as fingerprint data, bank card amount, change log records, and the like. The check data is comparison data corresponding to the service data and is used for comparing the integrity and the correctness of the service data.

However, under the condition of abnormal power failure, the nonvolatile memory 40 and the dynamic random access memory 50 usually stop working, so that the check data in the random access memory unit 131 cannot be stored in the nonvolatile memory 40, and further, the service processing module 13 cannot obtain the check data when the power is turned on next time, and thus, the service processing module cannot work normally.

In order to solve the above problem, the present application provides a system chip, where a nonvolatile storage module is disposed in the system chip, and the check data in the random storage unit can be stored in the nonvolatile storage module after the electronic device is abnormally powered off, so that the check data can be directly obtained from the nonvolatile storage module after the system chip is powered on next time, and normal operation of the service processing module is realized.

The technical solution of the present invention will be described in detail below with specific examples. The following specific embodiments may be combined, and details of the same or similar concepts or processes may be omitted for some embodiments.

Fig. 2 is a block diagram of a system chip provided in the present application, and as shown in fig. 2, the system chip 10 includes: at least one service processing module 13 and a non-volatile memory module 14; the nonvolatile storage module 14 is electrically connected with the service processing module 13; a service processing module 13, configured to process a corresponding service; and after receiving the abnormal power failure signal, storing the verification data of the corresponding service in the nonvolatile storage module 14, wherein the verification data is used for verifying the service data generated by the corresponding service.

Wherein the nonvolatile memory module includes: one time programmable memory (Efuse). The eFUSE is simple to initialize, and corresponding check data can be stored permanently under the condition of abnormal power failure. The Efuse has a certain service life and can be permanently stored and updated for thousands of times, but the Efuse can be used only under the condition of abnormal power failure in the application. The abnormal power down frequency of the electronic device is low under normal conditions, so that the Efuse is enough to support the storage of the verification data of the electronic device when the electronic device is abnormally powered down during the service life of the electronic device.

In addition, before the storing the check data of the corresponding service in the nonvolatile storage module, the method further includes: the stored data in the nonvolatile memory module 14 is cleared. And then storing the check data of the corresponding service in a nonvolatile storage module. In the embodiment of the present application, when the check data is stored in the nonvolatile memory module 14, the storage data in the nonvolatile memory module 14 is emptied in advance. The check data stored in the nonvolatile memory module 14 can be the check data that needs to be used after the electronic device is restarted next time and can be directly acquired.

Specifically, the system chip includes a plurality of modules, such as the power management module 11, the application processor 12, the service processing module 13, and the other control module 15 in fig. 3. In normal operation of the electronic device, the power management module 11 is always in an on state (AON), and the other modules (the application processor 12, the service processing module 13, and the other control modules 15) are in an on state only during operation and in an off state.

Furthermore, each hardware of the electronic device can monitor various abnormal power failures and then send an abnormal power failure signal to the service processing module. For example, referring to fig. 2, the system chip 10 may be connected to a circuit board of the battery 20 through the power management chip 30, and after the battery 20 of the electronic device is unplugged, the circuit board of the battery 20 may detect that the battery 20 is unplugged, and generate an abnormal power down signal to be sent to the service processing module 13. In addition, when the user presses the electronic device for 7 seconds (7s Reset), the system chip 10 can monitor the corresponding operation and send an abnormal power down signal to the service processing module 13. Wdg are not running for a preset time, Wdg sends an abnormal power down signal to each traffic processing module 13. The system-on-chip 10 further includes: the system comprises a temperature sensor and a voltage sensor, wherein the temperature sensor monitors whether over-temperature protection (OTP) is needed or whether overvoltage protection (OVP) is needed or not, and if the temperature sensor or the voltage sensor is needed, an abnormal power failure signal is sent to the service processing module 13. In the embodiment of the application, any hardware in the electronic device may also monitor whether an abnormal power failure exists through other methods, and if so, send a corresponding abnormal power failure signal to the service processing module, which is not limited herein.

In the embodiment of the present application, referring to fig. 2 to 4, the system chip 10 further includes: the system comprises a power management module 11 and an application processor 12, wherein the application processor 12 is connected with the power management module 11, and a service processing module 13 is connected with the application processor 12 and the power management module 11; the power management module 11 is used for detecting whether the service processing module 13 and the nonvolatile storage module 14 are powered down or not after receiving the abnormal power down signal; if the service processing module 13 and/or the nonvolatile storage module 14 is powered off, transmitting an abnormal power-off signal to the application processor 12; and the application processor 12 is used for controlling the power management module 11 to power on the power-down service processing module 13 and/or the nonvolatile storage module 14 in response to receiving the abnormal power-down signal.

Specifically, the abnormal power failure in the present application means that the battery stops supplying power to the electronic device or the battery has a small electric quantity, which is not enough to support the power supply to the whole electronic device. Wherein, after the battery stops to the electronic equipment power supply, because power management chip includes: the capacitor, which can store a part of the electric quantity, continues to supply power to the system chip 10. In addition, because the power in the capacitor is limited, after the abnormal power failure, the service processing module 13 may be in a power-on state or a power-off state.

If the service processing module 13 and the nonvolatile storage module 14 are in the power-on state, the hardware sends the corresponding abnormal power-down signal to the service processing module 13, the service processing module 13 stores the verification data of the corresponding service in the nonvolatile storage module 14, and the verification data is used for verifying the service data generated by the corresponding service. If the service processing module 13 and/or the nonvolatile storage module 14 are in a power-off state, the hardware sends a corresponding abnormal power-down signal to the power management module 11 and the service processing module 13, and after the power management module 11 powers on the service processing module 13 and/or the nonvolatile storage module 14, the service processing module 13 stores the verification data in the nonvolatile storage module 14.

Further, referring to fig. 3, the service processing module 13 includes: a random storage unit 131 and an operation unit 132, wherein the target stack of the random storage unit 131 stores check data; the operation unit 132 is a unit that is in an operation state before the abnormal power-off; the application processor 12 is specifically configured to control the power management module 11 to power up the target stack and execution unit 132.

The service processing module 13 is specifically configured to: the verification data in the target stack is saved in the nonvolatile memory module 14 by the execution unit 132.

Specifically, during the operation of the service processing module 13, the service processing module 13 only operates a part of the operation units 132. The check data is also stored in a part of the stack space of the random access memory unit 131, and the part of the stack space is the target stack. Controlling the power management module 11 to power up the service processing module 13 means to power up only the target stack and execution unit 132.

In the embodiment of the present application, since the battery 20 supplies power to the system chip 10 only by using the capacitor in the power management chip 30 after the power supply to the system chip 10 is abnormally interrupted, since the power of the capacitor in the power management chip 30 is limited, only the target stack and the operation unit 132 need to be supplied with power, and the waste of power caused by supplying power to unnecessary part of the stack and other operation units is avoided.

Referring to fig. 4, the system chip 10 further includes: a control module 15; the power management module 11 is connected to the control modules 15, and the power management module 11 is further configured to power off the plurality of control modules 15 after receiving the abnormal power-down signal.

Specifically, referring to fig. 4, the control module a is a module for controlling the operation of the nonvolatile memory 40, and the control module B is a module for controlling the operation of the dynamic random access memory 50. The control module 15 in the embodiment of the present application may also be any module on the system chip 10 except the power management module 11, the application processor 12, the service processing module 13, and the nonvolatile memory module 14. Such as a wireless module, an audio module, a video module, etc.

In the embodiment of the present application, the power of each control module 15 is cut off, so that the waste of the electric quantity of the power management chip 30 under the condition of abnormal power failure can be avoided.

Wherein, the service processing module is further configured to: after the verification data is stored in the nonvolatile storage module, generating a storage completion identifier, and transmitting the storage completion identifier to the application processor; the application processor is also used for receiving the storage completion identification transmitted by the service processing module and controlling the power supply management module to power off the system chip according to the storage completion identification.

Specifically, after the verification data is stored in the nonvolatile memory module 14, the verification data is stored, and the entire system chip may be powered off.

Wherein, the service processing module is further configured to: after detecting that the electronic equipment is restarted, acquiring verification data from the nonvolatile storage module; and operating the service processing module according to the verification data.

It will be appreciated that electronic device reboots are detected with reference to detecting an abnormal power loss. For example, after the battery 20 of the electronic device is plugged, the circuit board of the battery 20 may detect that the battery 20 is plugged, and generate a restart signal to be sent to the service processing module 13. Wdg, will be running again within a preset time, Wdg will restart sending traffic handling modules 13 etc.

The service processing module is specifically configured to: and after the electronic equipment is detected to be restarted, if the verification data acquisition from the random storage unit fails, acquiring the verification data from the nonvolatile storage module.

Referring to fig. 4, the nonvolatile memory module 14 is integrated in the service processing module 13. In the embodiment of the application, the nonvolatile storage module 14 is integrated in the service processing module 13, and the check data can be more efficiently stored in the nonvolatile storage module 14.

Fig. 5 is a flowchart illustrating specific working steps of the system chip provided by the present application under a normal power condition. The method specifically comprises the following steps:

and S101, the power management module receives the normal electric signal and sends the normal electric signal to the application processor.

The normal electric signal is a signal triggered by a user after the electronic equipment is normally closed. The power management module receives the normal electric signal and sends the normal electric signal to the application processor.

And S102, the application processor determines whether the power management module works normally, and controls the power management module to power on the service processing module or awaken the service processing module.

The application processor can acquire the working state of the power management module in real time, wherein the working state is acquired whether the power management module powers on the service processing module or whether the service processing module is in a low power consumption state, and if so, the power management module is controlled to power on the service processing module or wake up the service processing module.

And S103, the power management module powers on the service processing module or wakes up the service processing module.

And S104, initializing the service processing module, performing self-checking operation and recovering the low-power consumption state.

The initialization refers to channel initialization of an APDU (application protocol data unit), and the self-checking operation refers to state self-checking of security and the like of the service processing module. The service processing module executes complete power-on or service processing module initialization, self-checking operation, and low power consumption state recovery, which consumes much time and electric quantity.

And S105, the application processor sends a normal complete power-off instruction to the service processing module.

The application processor initiates a normal complete power-down instruction to the service processing module through an APDU (application protocol data unit) to request the service processing module to execute a complete power-down operation.

And S106, the service processing module responds to the command of 'normal complete power-off' and stores the check data into the random dynamic memory.

After the service processing module is initialized, the APDU channel instruction is analyzed and a normal complete power-off instruction is responded, the complete power-off process is carried out, and the check data is output to a random dynamic memory (DDR) after being subjected to protection processing (encryption, generation of message check codes and the like).

S107, the service processing module sends a power-off instruction for waiting normal power-off to the application processor.

And the service processing module feeds back information of the power-off indication waiting for normal power-off to the application processor through the APDU channel again.

S108, the application processor judges whether the power-off indication is 'normal power-off', if so, executes S109.

S109, the application processor stores the verification data from the random dynamic memory to the nonvolatile memory.

And the application processor stores the verification data random dynamic memory after protection processing into the nonvolatile memory according to the response of the transaction system.

S110, the application processor sends a complete power-off instruction to the power management module.

Wherein, completely powering off means to the whole service processing module, including: random access memory unit, operation unit, nonvolatile memory module, etc.

The application processor then proceeds to perform other power down procedures.

And S111, the power management module cuts off power supply to the service processing module.

In addition, the power management module also cuts off the power supply to other modules in the system chip so as to completely power down the electronic equipment.

The system chip provided by the application can execute the normal power-off process, and can still store the verification data when the system chip is normally powered off, so that the system chip can be used when the electronic equipment is started next time.

However, when the power supply is abnormal, only the capacitor in the PMIC cannot meet the electric quantity required by all hardware, modules or systems including the AP, the DDR, the flash, the service processing module, and the like to execute a complete current-down process. In practical tests, DDR and flash are found to consume a large amount of electricity for normal work. Other hardware triggers a power down when the electronic device is essentially in an abnormal (unstable, untrusted) state. DDR, flash and other necessary modules are hung up, and the storage operation of the check data cannot be completed. Therefore, multiple objective factors in an abnormal power failure scene may cause that the check data cannot be stored in the flash in time, and if the service processing module executes some transaction services, the service processing module may be abnormal and crashed, thereby causing user data loss and fund loss.

Fig. 6 is a flowchart illustrating specific working steps of the system chip provided by the present application in an abnormal power condition. The method specifically comprises the following steps:

s201, the power management module receives an abnormal power failure signal sent by hardware.

S202, the service processing module receives an abnormal power failure signal sent by hardware.

After detecting the abnormal power failure, the hardware generates an abnormal power failure signal to the service processing module and the power management module, and sends the abnormal power failure signal to the power management module and the service processing module.

The hardware referred to herein includes: battery circuit board, Wdg, voltage sensor, temperature sensor, etc.

And S203, the power management module sends the abnormal power failure signal to the application processor.

And S204, the application processor controls the power management module to power on the service processing module and controls the other control modules to power off.

The power management module is used for controlling a control module (a power-off control module is a non-necessary module or a non-necessary system which does not run on the system chip) on the system chip through different power domains, and the power management module is used for powering off the control module and reserving electric quantity for the data storage of the service processing module.

And S205, if the service processing module is in a power-off state, executing S206, and if the service processing module is in a power-on state, executing S207.

And S206, the power management module powers on the service processing module.

The power management module preferentially powers on a target stack and an operation unit in the service processing module. If the service processing module is in a low power consumption state, the power management module wakes up the service processing module.

And S207, after the service processing module is powered on, initializing the service processing module or recovering the low-power consumption state and enabling the abnormal power-down interruption program.

If the service processing module is in a power-off state before, after power-on, the target stack and the running unit running before abnormal power failure are initialized preferentially. If the service processing module is in the power-on state previously, after receiving the abnormal power-down signal, other units in the service processing module can be initialized, and self-checking operation is performed. The target stack and the execution unit are also preferably initialized after wake-up if the service processing module was previously in a low power state.

And S208, the service processing module initializes the nonvolatile storage module and stores the verification data to the nonvolatile storage module.

If the service processing module finds the power failure again after S208, steps S201 to S208 are not triggered again, that is, the process is ended. And avoiding the steps of powering on the service processing module again and repeatedly storing the check data.

Specifically, when the service processing module is in normal operation, the normal operation of the service processing module is interrupted due to abnormal power failure. In the system chip, the code interrupting the normal operation is an interrupt code. The application S201 to S208 is designed at the tail part of the interrupt code. It is avoided that after exiting the interrupt code, S201 to S208 are continuously executed, and the related data read/write behavior is generated.

S209, the service processing module generates an abnormal power-off identification and sends the abnormal power-off identification to the application processor.

S210, the application processor judges whether the abnormal power-off mark is received, if so, S211 is executed.

S211, the application processor executes other power-down procedures.

In the embodiment of the application, under the abnormal power failure scene, the DDR and the flash work are abnormal under the normal condition, and the state is unstable and unreliable. The system chip cannot save the check data to the DDR and the flash. If the business processing module and the Efuse are not abnormal, check data (small amount but important) can be saved to the Efuse urgently. In general, after the battery power supply is abnormal or the PMIC is powered off, part of electric quantity is still stored in a capacitor in the PMIC. The voltage reduction of the capacitor is a continuous process, and before the voltage is gradually reduced to the lowest voltage which cannot maintain the work of the application processor, the service processing module and the Efuse thereof, the application can complete corresponding hardware and software operations to store the verification data.

Fig. 7 is a flowchart illustrating specific working steps in a case where the system chip provided by the present application restarts the electronic device after a normal or abnormal power-off. The method specifically comprises the following steps:

s301, if the nonvolatile memory has the check data, the application processor transfers the check data to the random dynamic memory.

S302, the application processor monitors the power management module and controls the power management module to power on the service processing module.

And S303, the power management module powers on the service processing module.

S304, initializing the service processing module, performing self-checking operation and recovering the low-power consumption state.

S305, the service processing module acquires the check data from the random storage unit, if so, S308 is executed, and if not, S306 is executed.

Specifically, the service processing module obtains the check data from the random access memory unit, if the check data is obtained, the check data is checked, and if the check data passes, the check data is the required check data, and then S308 is executed. If the verification fails or no verification data is obtained, S306 is executed.

S306, the service processing module acquires the check data from the random dynamic memory, if so, S308 is executed, and if not, S307 is executed.

Specifically, the service processing module obtains the verification data from the random dynamic memory, if the verification data is obtained, the verification is performed on the verification data, and if the verification passes, it indicates that the verification data is the required verification data, and then S308 is executed.

If the verification fails or the verification data is not obtained, S307 is executed.

And S307, the service processing module acquires the check data from the nonvolatile storage module, if so, the S308 is executed, and if not, the process is ended.

Specifically, the service processing module obtains the verification data from the nonvolatile storage module, if the verification data is obtained, the verification is performed on the verification data, and if the verification passes, it indicates that the verification data is the required verification data, and then S308 is executed.

And if the verification fails or the verification data is not obtained, the service processing module rushes to finish the flow.

S308, the service processing module works normally.

In the embodiment of the application, in the next complete power-on of the electronic device, the application processor transmits the processed check data and the processed service data from the flash to the DDR. And after the service processing module is electrified, the service processing module detects that the random storage unit does not have the check data, and acquires the check data from the DDR. And if the verification process finds that the verification data in the DDR is not the latest version data, the verification fails. And further acquiring corresponding check data from the Efuse, checking the correct check and performing initialization operation.

In the embodiment of the application, the eFUSE can save and update data for about thousands of times. Besides the testing environment of research personnel, users cannot intentionally make abnormal power-down scenes. Therefore, the service life of the eFUSE is enough to be used in the life cycle of the electronic equipment for thousands of times, and the validity of the stored verification data is improved.

Referring to fig. 3 and 4, an electronic device 100 provided by the present application is shown, including the system chip 10 according to any one of the above, and further including: a battery 20, a power management chip 30, a nonvolatile memory 40, and a dynamic random access memory 50; the battery 20 is connected with the power management chip 30, the power management chip 30 is connected with the system chip 10, the nonvolatile memory 40 is connected with the application processor 12, and the dynamic random access memory 50 is used for being connected with the service processing module 13.

In the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship; in the formula, the character "/" indicates that the preceding and following related objects are in a relationship of "division". "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.

It is to be understood that the various numerical references referred to in the embodiments of the present application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of the present application. In the embodiment of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiment of the present application.

Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A system chip, comprising: at least one service processing module and a nonvolatile storage module; the nonvolatile storage module is electrically connected with the service processing module;

the service processing module is used for processing corresponding services; and after receiving the abnormal power failure signal, storing check data of the corresponding service in the nonvolatile storage module, wherein the check data is used for checking service data generated by the corresponding service.

2. The system-on-chip of claim 1, further comprising: the service processing module is connected with the application processor and the power management module;

the power management module is used for detecting whether the service processing module and the nonvolatile storage module are powered off or not after receiving the abnormal power-off signal; if the service processing module and/or the nonvolatile storage module are powered off, transmitting the abnormal power-off signal to the application processor;

and the application processor is used for responding to the received abnormal power failure signal and controlling the power management module to power on the power-failure service processing module and/or the nonvolatile storage module.

3. The system-on-chip of claim 2, wherein the traffic processing module comprises: the target stack of the random storage unit is stored with the check data; the operation unit is a unit which is in an operation state before abnormal power failure;

the application processor is specifically configured to control the power management module to power up the target stack and the operation unit.

4. The soc of claim 3, wherein the service processing module is specifically configured to: and saving the check data in the target stack in the nonvolatile storage module through the operation unit.

5. The system-on-chip of any one of claims 2 to 4, further comprising: a control module;

the power management module is connected with the control module and is also used for powering off the control module after receiving the abnormal power failure signal.

6. The system-on-chip of claim 3 or 4, wherein the traffic processing module is further configured to:

after the check data are stored in the nonvolatile storage module, generating a storage completion identifier, and transmitting the storage completion identifier to the application processor;

the application processor is further configured to receive a storage completion identifier transmitted by the service processing module, and control the power management module to power off the system chip according to the storage completion identifier.

7. The system-on-chip of claim 6, wherein the traffic processing module is further configured to:

after detecting that the electronic equipment is restarted, acquiring the verification data from the nonvolatile storage module;

and operating the service processing module according to the check data.

8. The soc of claim 7, wherein the service processing module is specifically configured to:

and after the restart of the electronic equipment is detected, if the verification data is failed to be acquired from the random storage unit, acquiring the verification data from the nonvolatile storage module.

9. The system-on-chip of any one of claims 1 to 4, wherein the non-volatile storage module is integrated into the business processing module.

10. The system-on-chip of any one of claims 1 to 4, wherein the non-volatile storage module comprises: a one-time programmable memory.

11. An electronic device comprising the system-on-chip of any one of claims 1 to 10, the electronic device further comprising: the device comprises a battery, a power management chip, a nonvolatile memory and a dynamic random access memory;

the battery is connected with the power management chip, the power management chip is connected with the system chip, the nonvolatile memory is connected with the application processor, and the dynamic random access memory is used for being connected with the service processing module.