CN113608100A - Open circuit failure analysis method and system - Google Patents
Open circuit failure analysis method and system Download PDFInfo
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- CN113608100A CN113608100A CN202110713903.4A CN202110713903A CN113608100A CN 113608100 A CN113608100 A CN 113608100A CN 202110713903 A CN202110713903 A CN 202110713903A CN 113608100 A CN113608100 A CN 113608100A
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- 238000004458 analytical method Methods 0.000 title claims abstract description 60
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- 230000002159 abnormal effect Effects 0.000 claims description 33
- 238000012545 processing Methods 0.000 claims description 15
- 230000003287 optical effect Effects 0.000 claims description 14
- 238000002347 injection Methods 0.000 claims description 10
- 239000007924 injection Substances 0.000 claims description 10
- 238000003466 welding Methods 0.000 claims description 7
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- 238000012360 testing method Methods 0.000 abstract description 2
- 230000001066 destructive effect Effects 0.000 description 8
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- 238000003384 imaging method Methods 0.000 description 2
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- 239000002184 metal Substances 0.000 description 2
- 229910052755 nonmetal Inorganic materials 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2803—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] by means of functional tests, e.g. logic-circuit-simulation or algorithms therefor
Abstract
The application relates to the technical field of printed circuit board testing, and particularly discloses an open circuit failure analysis method and system. The method comprises the following steps: injecting a radio frequency detection signal to a circuit of a circuit board to be detected; receiving a reflection signal, and performing time domain conversion on the reflection signal to obtain a time domain curve; and analyzing the time domain curve to determine an open circuit position point of the circuit board to be tested. The circuit board to be tested does not need to be damaged, damage to a failure position is avoided, an open circuit position point cannot be found, the open circuit position of any open circuit state circuit can be analyzed through analysis of a time domain curve, accuracy is high, and in addition, compared with an external field electromagnetic field scanning positioning method, the failure analysis method is low in cost.
Description
Technical Field
The invention relates to the technical field of printed circuit board testing, in particular to an open circuit failure analysis method and system.
Background
The failure modes of the printed circuit board mainly comprise open circuit, short circuit, board burning, layering and the like, wherein the open circuit is the main reason of the failure of the printed circuit board, and the accurate positioning of the open circuit position is beneficial to determining the failure modes and failure mechanisms of the printed circuit board and is an important link of failure analysis.
The traditional method is to judge the open circuit phenomenon of the lead on the printed circuit board through multimeter electrical measurement, but the specific position of the open circuit cannot be accurately positioned. In order to improve the positioning accuracy, the existing analytical methods in the industry mainly comprise destructive positioning and nondestructive positioning, wherein the destructive positioning is to sample a circuit board, grind a metallographic section, and observe the open-circuit position through naked eyes or a microscope, the nondestructive positioning is to judge through the imaging difference of X rays on different materials such as metal, nonmetal and the like, and in addition, a radio frequency signal can be applied, an electromagnetic field excited by an external field probe is used for scanning a circuit to be detected, and the open-circuit position is judged through the change of field intensity.
However, destructive positioning methods may destroy the failure location during sampling or grinding, and thus open points cannot be found; the nondestructive method based on X-ray can only position the open circuit of the large crack, and can not distinguish the micro crack; with respect to the external field electromagnetic field scanning method, the equipment cost is expensive.
Therefore, how to design a more complete and lower-cost open circuit failure analysis method is one of the problems that those skilled in the art are urgently required to solve.
Disclosure of Invention
In view of the above, it is necessary to provide an open circuit failure analysis method and system.
An open-circuit failure analysis method is used for analyzing open-circuit failure of a circuit board to be tested, and comprises the following steps:
injecting a radio frequency detection signal to a circuit of a circuit board to be detected;
receiving a reflection signal, and performing time domain conversion on the reflection signal to obtain a time domain curve;
and analyzing the time domain curve to determine an open circuit position point of the circuit board to be tested.
In one embodiment, the step of analyzing the time domain curve and determining the open circuit position point of the circuit board to be tested includes:
acquiring a time domain curve corresponding to a normal circuit board circuit;
comparing the time domain curve of the normal circuit board circuit with the time domain curve of the circuit board circuit to be detected, and determining an abnormal position point on the time domain curve of the circuit board circuit to be detected;
and determining the open circuit position point of the circuit board to be tested according to the position of the abnormal position point on the time domain curve.
In one embodiment, the step of determining an open-circuit position point of the circuit board to be tested according to the position of the abnormal position point on the time domain curve includes:
determining the time length of a first section of curve and the time length of a second section of curve which take the abnormal position point as a dividing point on the time domain curve;
determining the proportion of the time length of the first section of curve to the time length of the second section of curve, and recording as a first proportion;
and determining the position point of the two lines of which the length proportion is the first proportion, which is obtained by dividing the circuit board line to be tested, and determining the position point as an open circuit position point.
In one embodiment, before the step of obtaining the time domain curve corresponding to the normal circuit board line, the open circuit failure analysis method further includes:
acquiring a time domain curve corresponding to a circuit of a light panel circuit board;
comparing the time domain curve of the circuit board circuit to be tested with the time domain curve of the circuit board circuit of the light plate;
if the similarity of the time domain curve of the circuit board circuit to be tested and the time domain curve of the optical board circuit meets a preset condition, determining that the open-circuit position point is located at the device welding position on the circuit board circuit to be tested; otherwise, executing the step of obtaining the time domain curve corresponding to the normal circuit board line.
An open circuit failure analysis system for performing open circuit failure analysis on a circuit of a circuit board to be tested, the open circuit failure analysis system comprising:
the signal injection device is connected with the circuit board to be detected and injects a radio frequency detection signal to the circuit board to be detected;
the signal processing device is connected with the circuit board to be tested, receives the reflected signal of the circuit board to be tested, and performs time domain conversion on the reflected signal to obtain a time domain curve; and analyzing the time domain curve to determine an open circuit position point of the circuit board to be tested.
In one embodiment, the signal injection device includes a signal source and a radio frequency probe, the signal source is connected to the radio frequency probe through a radio frequency cable, the signal source provides the radio frequency detection signal, and the radio frequency probe is used for connecting to the circuit board to be detected and injecting the radio frequency detection signal into the circuit board to be detected.
In one embodiment, the radio frequency probe comprises at least two probes, and the distance between every two probes is adjustable.
In one embodiment, the signal source and the signal processing device are integrated in a network analyzer.
In one embodiment, the signal processing apparatus is configured to:
acquiring a time domain curve corresponding to a normal circuit board circuit;
comparing the time domain curve of the normal circuit board circuit with the time domain curve of the circuit board circuit to be detected, and determining an abnormal position point on the time domain curve of the circuit board circuit to be detected;
and determining the open circuit position point of the circuit board to be tested according to the position of the abnormal position point on the time domain curve.
In one embodiment, the determining, by the signal processing device, the open-circuit position point of the circuit board line to be tested according to the position of the abnormal position point on the time domain curve includes:
determining the time length of a first section of curve and the time length of a second section of curve which take the abnormal position point as a dividing point on the time domain curve;
determining the proportion of the time length of the first section of curve to the time length of the second section of curve, and recording as a first proportion;
and determining the position point of the two lines of which the length proportion is the first proportion, which is obtained by dividing the circuit board line to be tested, and determining the position point as an open circuit position point.
The open-circuit failure analysis method comprises the steps of firstly injecting a radio frequency detection signal into a circuit of a circuit board to be detected, then receiving a reflection signal of the circuit board to be detected, carrying out time domain conversion on the reflection signal to obtain a time domain curve, and finally analyzing the time domain curve to determine an open-circuit position point of the circuit board to be detected. The circuit board to be tested does not need to be damaged, damage to a failure position is avoided, an open circuit position point cannot be found, the open circuit position of any open circuit state circuit can be analyzed through analysis of a time domain curve, accuracy is high, and in addition, compared with an external field electromagnetic field scanning positioning method, the failure analysis method is low in cost.
Drawings
Fig. 1 is a block flow diagram of an open circuit failure analysis method according to an embodiment of the present disclosure;
fig. 2 is a flowchart of step S600 in the open-circuit failure analysis method according to an embodiment of the present application;
FIG. 3 is a comparison graph of time domain curves of a normal circuit board line and a circuit board line to be tested;
fig. 4 is a flowchart of step S630 in the open-circuit failure analysis method according to an embodiment of the present application;
fig. 5 is a block flow diagram of another implementation manner of an open-circuit failure analysis method according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an open-circuit failure analysis system according to a second embodiment of the present application;
fig. 7 is a schematic structural diagram of an open-circuit failure analysis system according to a second embodiment of the present application.
Description of reference numerals:
100. a circuit board circuit to be tested; 200. a signal injection device; 210. a radio frequency probe; 211. a probe; 220. a radio frequency cable; 300. a signal processing device.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As described in the background, failure modes of printed circuit boards include mainly open circuits, short circuits, burn-in, delamination, etc., where open circuits are the main cause of printed circuit board failure.
In the traditional technology, an open circuit phenomenon of a lead on a printed circuit board is often judged by adopting a multimeter electrical measurement mode, but the method cannot prepare for positioning a specific position of the open circuit. To determine the specific location of an open circuit, two types of methods are currently used in the industry, namely destructive and non-destructive localization analysis. The destructive positioning analysis needs to sample the circuit board and carry out processing methods such as metallographic section grinding and the like so as to expose the open circuit position under the naked eye or a microscope; the nondestructive positioning analysis can judge the open-circuit position through the difference between the imaging of X-rays on metal and nonmetal materials (such as Si), and can also judge the open-circuit position through the change of field intensity by applying radio frequency signals, scanning an electromagnetic field excited by a line to be detected through an external field probe.
However, the above methods all have corresponding defects, for example, the destructive analysis method may damage the open circuit position in the sampling process, so that the open circuit position point cannot be found; the nondestructive method based on the X-ray has lower resolution, can only position the open circuit of the large crack, can not distinguish the micro crack, and has larger limitation; the non-destructive method based on external field electromagnetic field scanning adopts expensive equipment and has high cost.
In summary, it is one of the problems that those skilled in the art are urgently in need of solving how to obtain a more complete and low-cost open circuit failure analysis method.
To address this issue, the present application provides an open circuit failure analysis method and system.
Example one
The embodiment provides an open-circuit failure analysis method, which is used for performing open-circuit failure analysis on a circuit of a circuit board to be tested.
Referring to fig. 1, the open circuit failure analysis method provided in this embodiment includes the following steps:
step S200, injecting a radio frequency detection signal to the circuit of the circuit board to be detected.
The circuit to be tested on the circuit board to be tested, hereinafter collectively referred to as the circuit of the circuit board to be tested, can be determined first. And then injecting a radio frequency detection signal into the circuit board to be detected, wherein the radio frequency detection signal is generally a radio frequency voltage signal, and the radio frequency detection signal can be injected by a network analyzer or other signal injection devices. The radio frequency detection signal includes a sinusoidal radio frequency signal with a single frequency, and the higher the frequency of the radio frequency signal is, the better the detection effect is, so the high-frequency radio frequency detection signal is selected in this embodiment.
Because the distances between the circuit boards to be detected are not completely the same, before injecting the radio frequency detection signal, the distance between the probes on the probe can be adjusted to be consistent with the distance between the circuit boards to be detected, so that the probes are aligned with the circuit boards to be detected, and the radio frequency detection signal is injected.
And S400, receiving the reflection signal, and performing time domain conversion on the reflection signal to obtain a time domain curve.
After the radio frequency detection signal is injected into the circuit of the circuit board to be detected, the circuit of the circuit board to be detected correspondingly sends out a reflection signal, the reflection signal is a high-frequency sine wave signal, and the reflection signals corresponding to the circuits in different states are different. And after receiving the reflected signal, performing time domain conversion on the reflected signal to obtain a time domain curve. The time domain curves corresponding to the lines in different states are different.
And S600, analyzing the time domain curve and determining an open circuit position point of the circuit board to be tested.
And the open circuit position point of the circuit board to be detected can be determined by analyzing the time-domain curve. The time domain curves of the circuit board to be tested can be analyzed independently, or the time domain curves of the circuit boards in other states can be compared and analyzed, and the circuits in other states can comprise normal circuits, light plate printed circuit board circuits and the like.
The open-circuit failure analysis method comprises the steps of firstly injecting a radio frequency detection signal into a circuit of a circuit board to be detected, then receiving a reflection signal of the circuit board to be detected, carrying out time domain conversion on the reflection signal to obtain a time domain curve, and finally analyzing the time domain curve to determine an open-circuit position point of the circuit board to be detected. The circuit board to be tested does not need to be damaged, damage to a failure position is avoided, an open circuit position point cannot be found, the open circuit position of any open circuit state circuit can be analyzed through analysis of a time domain curve, accuracy is high, and in addition, compared with an external field electromagnetic field scanning positioning method, the failure analysis method is low in cost.
In one embodiment, referring to fig. 2, step S600, namely, analyzing the time-domain curve, and determining an open-circuit position point of the circuit board to be tested includes the following steps:
step S610, obtaining a time domain curve corresponding to the normal circuit board circuit.
The normal circuit board line refers to a line on the circuit board without abnormality, in practical application, a time domain curve corresponding to the normal circuit board line can be stored in advance, and the time domain curve corresponding to the normal circuit board line is called in the step and stored in advance, so that the operation is convenient.
Step S620, comparing the time domain curve of the normal circuit board circuit with the time domain curve of the circuit board circuit to be detected, and determining an abnormal position point on the time domain curve of the circuit board circuit to be detected.
Because the time domain curves corresponding to the circuit of the circuit board in different states are different, the difference on the time domain curves can be determined by comparing the time domain curves of the normal circuit board circuit and the circuit of the circuit board to be detected, namely, the abnormal position point on the time domain curve of the circuit board to be detected is determined. Fig. 3 shows a comparison diagram of a time domain curve b of a normal circuit board line and a time domain curve a of a circuit board line to be detected, and it can be seen that, at an abscissa position 2, the time domain curve of the circuit board line to be detected is obviously abnormal relative to the time domain curve of the normal circuit board line, that is, it can be determined that an abnormal position point is an abscissa position 2.
And step S630, determining an open circuit position point of the circuit board to be tested according to the position of the abnormal position point on the time domain curve.
Each position on the time domain curve corresponds to each position on the actual circuit board line to be tested, and when the abnormal position point of the time domain curve is determined, the open circuit position point of the circuit board line to be tested corresponding to the abnormal position point of the time domain curve can be determined through the position corresponding relation.
In one embodiment, referring to fig. 4, in step S630, the step of determining an open circuit position point of the circuit board to be tested according to the position of the abnormal position point on the time domain curve includes the following steps:
and S631, determining the time length of a first section of curve and the time length of a second section of curve which take the abnormal position point as a dividing point on the time domain curve.
Step S632 is to determine a ratio between the time length of the first curve and the time length of the second curve, and record the ratio as the first ratio.
Step S633, determining a position point of the two-segment line with the length ratio of the first ratio, and determining the position point as an open-circuit position point.
When the abnormal position point on the circuit board line to be detected is determined, a first section of curve and a second section of curve which are divided by the abnormal position point on the time domain curve can be determined, the time length of the first section of curve and the time length of the second section of curve are obtained, the proportion (namely the first proportion) between the time length of the first section of curve and the time length of the second section of curve is calculated, and the time length of the time domain curve is equal to the length of the actual circuit, so that the actual circuit board line can be divided into the two sections of lines, the proportion of the two sections of lines is the position point of the first proportion, and the position point is the finally determined open circuit position point. By the method, the open circuit position point can be accurately positioned, and errors are not easy to occur.
For example, if the ratio of the time lengths of the first curve and the second curve is 2/3, the specific location on the circuit board line that separates the circuit board line into two lines with a length ratio of 2/3 is determined as the open circuit location point.
Alternatively, the position of the first section of curve occupying the total time length of the time domain curve along the first direction on the circuit board line is determined as an open-circuit position point; or the proportion of the second section of curve to the total time domain curve time length is taken as a first proportion, and the position of the first proportion of the second section of curve to the total time domain curve length along the second direction on the circuit board line is determined as an open circuit position point. For example, if the first curve segment is the left portion of the time domain curve and the ratio of the first curve segment to the total time domain curve is 1/3, the position of the left portion of the circuit board line in the total line length 1/3 is determined as an open-circuit position point; for another example, if the second curve segment is the right portion of the time domain curve and the ratio of the second curve segment to the total time domain curve is 1/3, the position of the right portion of the circuit board line at the total line length 1/3 is determined as the open position point.
Besides the above-listed modes, the open circuit position point can be determined by other similar modes by utilizing the equal proportion relation between the time domain curve and the circuit board line, which is not listed here.
In one embodiment, referring to fig. 5, before step S610, that is, before the step of obtaining the time domain curve corresponding to the normal circuit board line, the open circuit failure analysis method provided in this embodiment further includes:
step S601, a time domain curve corresponding to the circuit of the optical board circuit board is obtained.
Step S602, comparing the time domain curve of the circuit board circuit to be tested with the time domain curve of the circuit board circuit of the light plate.
Step S603, if the similarity of the time domain curve of the circuit board circuit to be tested and the time domain curve of the optical board circuit meets a preset condition, determining that the open circuit position point is located at the welding position of the device on the circuit board circuit to be tested; otherwise, executing the step of obtaining the time domain curve corresponding to the normal circuit board circuit.
The circuit of the optical board circuit board refers to a circuit on the circuit board to which no device is soldered, and it should be noted that, if the device is soldered on the optical board circuit board, the length of the circuit of the optical board circuit board is equally increased or the circuits on two sides of the soldering position are connected together, and if the device is not soldered, the circuits on two sides of the soldering position are in an open circuit state. That is, the time domain curve corresponding to the optical board circuit board corresponds to the time domain curve corresponding to the circuit having the definite open circuit position. If any circuit board line to be tested is open at the welding position, the corresponding time domain curve is close to the time domain curve corresponding to the optical board circuit board line. Based on the principle, in the embodiment, before the open circuit position point is determined by using the equal proportion relation, the time domain curve of the circuit board circuit to be detected can be compared with the time domain curve corresponding to the optical board circuit in advance, and whether the open circuit position point is located at the welding position or not can be determined quickly, so that the analysis efficiency can be effectively improved.
In practical application, the time domain curve corresponding to the circuit of the optical board circuit board can be stored in advance so as to be called quickly. And when the time domain curve corresponding to the circuit of the optical board circuit board is obtained, comparing the time domain curve with the time domain curve of the circuit board to be tested, if the similarity meets the preset condition, considering that the time domain curve and the time domain curve are similar, and determining that the open circuit position point is the welding position of the device on the circuit of the circuit board to be tested. If the similarity does not meet the preset condition, the two are considered to have a certain difference, the possibility that the open circuit position point is the welding position of the device on the circuit of the circuit board to be tested is eliminated, and the open circuit position point is determined by adopting the mode of the step S610 to the step S630.
Regarding the determination of the similarity, the proximity degree between the time domain curve of the optical board circuit and the time domain curve of the circuit board to be tested may be determined, for example, whether the distance between the abnormal position point in the time domain curve of the circuit board to be tested and the abnormal position point in the time domain curve of the optical board circuit is smaller than a preset value, and if so, the similarity is considered to satisfy a preset condition. Of course, the similarity may also be determined in other manners, which are not listed here.
In this embodiment, after the open circuit position point is determined, the open circuit position point may be ground by a microsection, and the analysis result may be verified.
Example two
The embodiment provides an open circuit failure analysis system, which is used for performing open circuit failure analysis on a circuit board 100 to be tested.
Referring to fig. 6, the open circuit failure analysis system provided in the present embodiment includes a signal injection device 200 and a signal processing device 300. The signal injection device 200 is connected to the circuit board line 100 to be tested, and injects the radio frequency detection signal to the circuit board line 100 to be tested; the signal processing device 300 is connected with the circuit board line 100 to be tested, receives the reflected signal of the circuit board line 100 to be tested, and performs time domain conversion on the reflected signal to obtain a time domain curve; and analyzing the time domain curve to determine an open circuit position point of the circuit 100 of the circuit board to be tested.
The open-circuit failure analysis system can inject the radio frequency detection signal into the circuit board line 100 to be detected through the signal injection device 200, then the signal processing device 300 receives the reflection signal of the circuit board line 100 to be detected, performs time domain conversion on the reflection signal to obtain a time domain curve, and finally analyzes the time domain curve to determine the open-circuit position point of the circuit board line 100 to be detected. The circuit board to be tested does not need to be damaged, damage to failure positions is avoided, open circuit position points cannot be found, the open circuit positions of the circuits in any open circuit state can be analyzed through analysis of time-domain curves, accuracy is high, and in addition, compared with an external field electromagnetic field scanning and positioning method, the open circuit failure analysis system is low in cost.
In one embodiment, referring to fig. 7, the signal injection apparatus 200 includes a signal source and a rf probe 210, the signal source is connected to the rf probe 210 through an rf cable 220, the signal source provides an rf probing signal, and the rf probe 210 is used to connect to the circuit board line 100 to be tested and inject the rf probing signal into the circuit board line 100 to be tested.
In one embodiment, the RF probe head 210 includes at least two probes 211, and the spacing between the probes 211 is adjustable. Because the circuit board lines have different pitches, the pitch between the probes 211 on the rf probe 210 can be adjusted to adapt to the lines with different pitches. Therefore, the replacement of the RF probe 210 can be avoided, and the utilization rate of the RF probe 210 can be improved.
In practical application, the distance between the probes 211 can be directly adjusted manually, and the distance between the probes 211 can also be adjusted in a pulley rolling mode, so that the effect can be achieved.
In one embodiment, referring to fig. 7, the signal source and signal processing apparatus 300 is integrated in a network analyzer. That is, only one network analyzer needs to be arranged in the embodiment, and the network analyzer is connected to the rf probe 210 through the rf cable 220, so that the structure is very simple, the cost is low, and the operation and implementation are easy.
In one embodiment, the signal processing apparatus 300 is configured to:
acquiring a time domain curve corresponding to a normal circuit board circuit;
comparing the time domain curve of the normal circuit board line with the time domain curve of the circuit board line 100 to be tested, and determining an abnormal position point on the time domain curve of the circuit board line 100 to be tested;
and determining the open circuit position point of the circuit board line 100 to be tested according to the position of the abnormal position point on the time domain curve.
In one embodiment, the signal processing apparatus 300 determines the open circuit position point of the circuit board line 100 to be tested according to the position of the abnormal position point on the time domain curve, including:
determining the time length of a first section of curve and the time length of a second section of curve which take the abnormal position point as a segmentation point on the time domain curve;
determining the proportion of the time length of the first section of curve to the time length of the second section of curve, and recording as a first proportion;
the method comprises the steps of determining a position point of a circuit board line 100 to be tested which is divided into two sections of lines with the length proportion of a first proportion, and determining the position point as an open-circuit position point.
The open circuit failure analysis system provided in this embodiment and the open circuit failure analysis method provided in the first embodiment belong to the same inventive concept, and therefore, for specific contents of the open circuit failure analysis system in this embodiment, reference may be made to the corresponding description in the first embodiment, which is not described herein again.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. An open-circuit failure analysis method is used for analyzing open-circuit failure of a circuit board to be tested, and comprises the following steps:
injecting a radio frequency detection signal to a circuit of a circuit board to be detected;
receiving a reflection signal, and performing time domain conversion on the reflection signal to obtain a time domain curve;
and analyzing the time domain curve to determine an open circuit position point of the circuit board to be tested.
2. The method according to claim 1, wherein the step of analyzing the time domain curve to determine the open circuit position point of the circuit board line to be tested comprises:
acquiring a time domain curve corresponding to a normal circuit board circuit;
comparing the time domain curve of the normal circuit board circuit with the time domain curve of the circuit board circuit to be detected, and determining an abnormal position point on the time domain curve of the circuit board circuit to be detected;
and determining the open circuit position point of the circuit board to be tested according to the position of the abnormal position point on the time domain curve.
3. The open circuit failure analysis method according to claim 2, wherein the step of determining the open circuit position point of the circuit board line to be tested according to the position of the abnormal position point on the time domain curve comprises:
determining the time length of a first section of curve and the time length of a second section of curve which take the abnormal position point as a dividing point on the time domain curve;
determining the proportion of the time length of the first section of curve to the time length of the second section of curve, and recording as a first proportion;
and determining the position point of the two lines of which the length proportion is the first proportion, which is obtained by dividing the circuit board line to be tested, and determining the position point as an open circuit position point.
4. The open circuit failure analysis method according to claim 2, wherein before the step of obtaining the time domain curve corresponding to the normal circuit board line, the open circuit failure analysis method further comprises:
acquiring a time domain curve corresponding to a circuit of a light panel circuit board;
comparing the time domain curve of the circuit board circuit to be tested with the time domain curve of the circuit board circuit of the light plate;
if the similarity of the time domain curve of the circuit board circuit to be tested and the time domain curve of the optical board circuit meets a preset condition, determining that the open-circuit position point is located at the device welding position on the circuit board circuit to be tested; otherwise, executing the step of obtaining the time domain curve corresponding to the normal circuit board line.
5. An open circuit failure analysis system, for performing open circuit failure analysis on a circuit board to be tested, the open circuit failure analysis system comprising:
the signal injection device is connected with the circuit board to be detected and injects a radio frequency detection signal to the circuit board to be detected;
the signal processing device is connected with the circuit board to be tested, receives the reflected signal of the circuit board to be tested, and performs time domain conversion on the reflected signal to obtain a time domain curve; and analyzing the time domain curve to determine an open circuit position point of the circuit board to be tested.
6. The open circuit failure analysis system according to claim 5, wherein the signal injection device comprises a signal source and a radio frequency probe, the signal source is connected to the radio frequency probe through a radio frequency cable, the signal source provides the radio frequency probing signal, and the radio frequency probe is configured to connect to the circuit board to be tested and inject the radio frequency probing signal into the circuit board to be tested.
7. The open circuit failure analysis system of claim 6, wherein the radio frequency probe comprises at least two probes, a spacing between each of the probes being adjustable.
8. The open circuit failure analysis system of claim 6, wherein the signal source and the signal processing device are integrated in a network analyzer.
9. The open circuit failure analysis system of claim 5, wherein the signal processing device is configured to:
acquiring a time domain curve corresponding to a normal circuit board circuit;
comparing the time domain curve of the normal circuit board circuit with the time domain curve of the circuit board circuit to be detected, and determining an abnormal position point on the time domain curve of the circuit board circuit to be detected;
and determining the open circuit position point of the circuit board to be tested according to the position of the abnormal position point on the time domain curve.
10. The open circuit failure analysis system according to claim 9, wherein the signal processing device determines the open circuit position point of the circuit board line to be tested according to the position of the abnormal position point on the time domain curve, and the determining comprises:
determining the time length of a first section of curve and the time length of a second section of curve which take the abnormal position point as a dividing point on the time domain curve;
determining the proportion of the time length of the first section of curve to the time length of the second section of curve, and recording as a first proportion;
and determining the position point of the two lines of which the length proportion is the first proportion, which is obtained by dividing the circuit board line to be tested, and determining the position point as an open circuit position point.
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| CN202110713903.4A CN113608100A (en) | 2021-06-25 | 2021-06-25 | Open circuit failure analysis method and system |
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| CN202110713903.4A CN113608100A (en) | 2021-06-25 | 2021-06-25 | Open circuit failure analysis method and system |
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| CN114487788A (en) * | 2022-04-02 | 2022-05-13 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Failure positioning method of packaging device |
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