CN2368042Y - Electric characteristics testing mechanism of printed circuit board - Google Patents
Electric characteristics testing mechanism of printed circuit board Download PDFInfo
- Publication number
- CN2368042Y CN2368042Y CN 99204681 CN99204681U CN2368042Y CN 2368042 Y CN2368042 Y CN 2368042Y CN 99204681 CN99204681 CN 99204681 CN 99204681 U CN99204681 U CN 99204681U CN 2368042 Y CN2368042 Y CN 2368042Y
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- CN
- China
- Prior art keywords
- circuit board
- printed circuit
- pcb
- measurement portion
- electrical specification
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- Expired - Lifetime
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Abstract
The utility model relates to an electric characteristics testing mechanism of a printed circuit board, which exposes a process condition the same as a circuit board and can be simultaneously made. A measuring part is arranged on one side or one edge of the circuit board. When the checking and analysis of impedance of the pre-measured printed circuit board are carried out, a measuring part can actually reflect the electrical characteristic of the circuit wiring in the pre-measured printed circuit board can be actually reflected by one measuring part, such as impedance characteristic. The stability of the printed circuit board can be determined. The signal transmission efficiency of circuit distributed can be determined.
Description
The utility model is the electrical specification testing agency of relevant a kind of printed circuit board (PCB), can be applicable to the check and analysis of printed circuit board (PCB) impedance operator, in order to reflect the electrical specification of wiring in the printed circuit board (PCB) to be measured truly.
In recent years because the progress of electronic technology and relevant science and technology, and for making the demand of electronic product volume-diminished, print printed circuit board (PCB) from early days simply single face connect up, double-sided wiring, be that the multilayer wiring direction towards complexity develops now.Because printed circuit board (PCB) mainly is to be used for laying the required lead of electronic component, after installing electronic component, passage as signal transmission between the electronic component, think and make printed circuit board (PCB) after installing electronic component, can bring into play the function that design the time is given really, after the printed circuit board (PCB) manufacturing is finished, all carry out the preceding quality testing of product export, include: the test of circuit open circuit/short circuit, the test of printed circuit board (PCB) impedance operator etc.; The test of printed circuit board (PCB) impedance operator, be at present directly in printed circuit board (PCB) to be measured with Time Domain Reflectometry (Time DomainReflectometry, TDR) method is carried out, Fig. 1 is the synoptic diagram of known testing printed circuit board, include: a circuit board 10, one time domain reflection (TDR) analyser 30, one probe (or surveying line) 20, wherein probe is to be contacted with the P.e.c. in a certain zone in the circuit board 10, as shown in Figure 2, and its earth lead 21 is connected with earth terminal 101 in the circuit board 10, from probe 20 input signal (as: step signal (Step Signal)) is input in the P.e.c. simultaneously, and receive the reflected signal reflect, it is delivered to the Time Domain Reflectometry analyser, so, the Time Domain Reflectometry analyser will be according to the size of reflected signal, and from sending input signal to receiving the time (time delay) that reflected signal spends, on display screen, show the result's (as: reflection percentage) who measures, this moment is if having several P.e.c. adjacent one another are in the zone of test, with the test signal in the feasible input P.e.c., or the interference of contained signal in the signal that P.e.c. reflects is subjected to contiguous P.e.c., and the measuring value that order obtains can not positively show the signal transport properties of printed circuit board (PCB), and causes the result of detection not have an objectivity.
Detect the mode of printed circuit board (PCB) now, be mostly, and, infer the stability or the signal transport properties of printed circuit board (PCB) by the detected value that is obtained (as: resistance value) with the P.e.c. in a certain zone in the direct testing printed circuit board of the mode of random sampling; Yet with regard to present printed circuit board (PCB), for making the electronic component of its volume-diminished and adaptation small size, the spacing of every printed wire is all quite approaching, and width is also very thin narrow, so when carrying out PCB detecting in a conventional manner, detected circuit tends to be subjected to coupled or adjacent circuit to disturb, and the measuring value that order obtains is not had an objectivity, can not positively show real stability of printed circuit board (PCB) or signal transport properties, also make engineering technical personnel when keeping in repair, the abnormal work that can't accurately judge printed circuit board (PCB) is because the defective in the configuration design, still due to manufacture process rigorous inadequately, cause the dispute of attribution of liability between deviser and the manufacturer.
Fundamental purpose of the present utility model is to provide a kind of electrical specification testing agency of printed circuit board (PCB), in order to when carrying out the PCB detecting analysis, can obtain not influenced by noise, and can truly reflect the data of printed circuit board (PCB) electrical specification to be measured.
For realizing above purpose, the technical solution of the utility model is when making printed circuit board (PCB), produce a measurement section synchronously, in order to provide one not disturbed by other layout circuit, and the detection space of the whole printed circuit board (PCB) electrical specification of energy actual response, by an earth terminal of in the signal conducting stratum of measurement section, being laid, tested conductor more than at least one, an and guide hole that is connected with tested conductor, by time domain reflection (TDR) analyser, with an input signal (as: step signal) through probe, guide hole in the measurement section, be input in the tested conductor, and then receive the reflected signal reflect at the guide hole place by probe, so the Time Domain Reflectometry analyser is just according to the size of reflected signal, and from sending input signal to receiving the time (time delay) that reflected signal spends, on display screen, show the result's (as: reflection percentage) who measures, this moment, engineering technical personnel can infer the stability of printed circuit board (PCB) according to result displayed, and the impedance operator of signal conduction.
Therefore, the electrical specification testing agency of a kind of printed circuit board (PCB) that the utility model provides includes:
One circuit board; And
One measurement portion, of the present utility model being characterised in that, this measurement portion makes with identical process conditions synchronously with this circuit board, and be equipped on a corner of this circuit board, this measurement portion includes a signal conducting stratum and an earth terminal, in order to by testing electrical property, reflect a certain electrical specification of this circuit board truly.
Relevant detailed content of the present utility model and technology, existing accompanying drawings is as follows:
Fig. 1 is the synoptic diagram of known testing printed circuit board.
Fig. 2, the synoptic diagram that is connected with printed circuit board (PCB) for p-wire in the known technology.
Fig. 3 is provided with the first example structure synoptic diagram of measurement portion for the utility model printed circuit board (PCB).
Fig. 4 is provided with the second example structure synoptic diagram of measurement portion for the utility model printed circuit board (PCB).
Fig. 5 is the first example structure synoptic diagram of the utility model measurement portion.
Fig. 6 is the second example structure synoptic diagram of the utility model measurement portion.
Fig. 7 is the 3rd example structure synoptic diagram of the utility model measurement portion.
Fig. 8, the synoptic diagram that is connected with printed circuit board (PCB) for the utility model p-wire.
Fig. 3 is provided with the first example structure synoptic diagram of measurement portion for the utility model printed circuit board (PCB), as shown in the figure, in circuit board 10, set a measurement portion 11, so that engineering technical personnel carry out the detection of circuit board 10 impedance operators in measurement portion 11, measurement portion 11 is to make synchronously with identical process conditions to finish with circuit board 10, and be equipped on the side of circuit board 10, circuit board 10 cuts portion 12 with measurement portion 11 with one and separates, the effect that cuts portion 12 is to work as circuit board 10 after testing, after its impedance conformance with standard, can carry out folding up or cut according to cutting portion 12 by engineering technical personnel, measurement portion 11 is separated with circuit board 10; Fig. 4 is provided with the second example structure synoptic diagram of measurement portion for the utility model printed circuit board (PCB).When making circuit board 10, planning one 11a of measurement portion makes engineering technical personnel can carry out the impedance detection of circuit board 10 in the 11a of this measurement portion in circuit board 10.
Figure 5 shows that the first example structure synoptic diagram of the utility model measurement portion, wherein measurement portion 11 is a single or multiple lift printed circuit board (PCB), one earth terminal 112 and a tested conductor 113 are laid in a signal conducting stratum 111 (being arranged in the top layer of measurement portion 11 among the figure) of measurement portion 11, end in tested conductor 113 is provided with a guide hole 114 simultaneously, in order to be connected, as shown in Figure 8 with probe (or surveying line) 20; When carrying out the detection of printed circuit board (PCB) impedance operator, by time domain reflection (TDR) analyser 30, with an input signal (as: step signal) with probe 20, guide hole 114, be input in the tested conductor 113, and then receive the reflected signal that reflects from guide hole 114 with probe 20, so, Time Domain Reflectometry (TDR) analyser is just according to the size of reflected signal, and from sending input signal to receiving the time (time delay) that reflected signal spends, on display screen, show the result's (as: reflection percentage) who measures, and engineering technical personnel can infer the stability of printed circuit board (PCB) according to this result, and the impedance operator of signal conduction.
Fig. 6 is the second example structure synoptic diagram of the utility model measurement portion, as shown in the figure, an earth terminal 112 and a tested conductor 113a are laid among the signal conducting stratum 111a of measurement portion 11, one guide hole 114a then is located at the end of tested conductor 113a, simultaneously in the signal conducting stratum 111b of signal conducting stratum 111a lower floor, also be laid with a tested conductor 113b, and the end at tested conductor 113b is provided with an electrical conductivity post 114b, conductive post 114b runs through signal conducting stratum 111a, and be exposed among the signal conducting stratum 111a, like this, probe (or survey line) 20 just can be in signal conducting stratum 111a by with the contacting of guide hole 114a, according to aforementioned method, after the impedance operator that measures signal conducting stratum 111a, again via probe (or surveying line) 20 and contacting of electrical conductivity post 114b measure the impedance operator of signal conducting stratum 111b.
Fig. 7 is the second example structure synoptic diagram of the utility model measurement portion, as shown in the figure, in signal conducting stratum 111a, lay three tested conductor and be respectively control line tested conductor 113c, data line tested conductor 113d, and power lead tested conductor 113e, wherein every strip conductor is all imitated the control line that is laid in the printed circuit board (PCB), data line, and power lead specification, because control line tested conductor 113c, data line tested conductor 113d, and power lead tested conductor 113e be with printed circuit board (PCB) in control line, data line, and power lead, be laid in the signal conducting stratum 111a of measurement portion 11 with identical technology, so in measurement portion 11 for aforesaid each tested conductor 113c, 113d, the guide hole 114c of 113e connection, 114d, 114e detects at the place measuring value of gained, can be corresponding go out control line in the printed circuit board (PCB), data line and power lead are for stability and its characteristic of signal conduction, so just can infer the impedance behavior of this P.e.c. slab integral more further; And can make engineering technical personnel when keeping in repair, accurately judge the reason place of the abnormal work of printed circuit board (PCB), for example: be that defectiveness is gone up in the configuration design, still the transmission line (as: control line) of a certain type is rigorous inadequately in manufacture process.In addition, the laying of above-mentioned each tested conductor 113c, 113d, 113e also can be according to the mode of the embodiment that Fig. 6 disclosed, be laid in respectively in arbitrary signal conducting stratum of multilayer board, be connected with tested conductor in each signal conducting stratum with guide hole again, it is caused in the top layer of multilayer board, so that divide the probe of analysing the meaning to contact with Time Domain Reflectometry (TDR).
Measurement of the present utility model portion makes with identical process conditions with circuit board under test to finish synchronously, can reflect the electrical specification of wiring in the printed circuit board (PCB) to be measured truly.
Comprehensively above-mentioned, though the utility model is described by embodiment, be realistic demand, the personage who is familiar with this skill can change its form and details, does not break away from spiritual scope of the present utility model.
Claims (9)
1. the electrical specification testing agency of a printed circuit board (PCB) includes:
One circuit board; And
One measurement portion, of the present utility model being characterised in that, this measurement portion makes with identical process conditions synchronously with this circuit board, and be equipped on a corner of this circuit board, this measurement portion includes a signal conducting stratum and an earth terminal, in order to by testing electrical property, reflect a certain electrical specification of this circuit board truly.
2. the electrical specification testing agency of printed circuit board (PCB) according to claim 1 is characterized in that this measurement portion is a single-layer printed circuit plate.
3. the electrical specification testing agency of printed circuit board (PCB) according to claim 1 is characterized in that this measurement portion is a multilayer board.
4. the electrical specification testing agency of printed circuit board (PCB) according to claim 1 is characterized in that this measurement portion has this signal conducting stratum of one deck at least.
5. as the electrical specification testing agency of printed circuit board (PCB) as described in the claim 4, it is characterized in that this signal conducting stratum has a guide hole, this guide hole is connected with this tested conductor in being laid in this signal conducting stratum.
6. as the electrical specification testing agency of printed circuit board (PCB) as described in the claim 4, it is characterized in that this signal conducting stratum has an electrical conductivity post, and this electrical conductivity post is connected with this tested conductor in being laid in this signal conducting stratum.
7. the electrical specification testing agency of printed circuit board (PCB) according to claim 1 is characterized in that this tested conductor is to be a straight unbending conductor.
8. the electrical specification testing agency of printed circuit board (PCB) according to claim 1 is characterized in that this tested conductor has different width.
9. the electrical specification testing agency of printed circuit board (PCB) according to claim 1 is characterized in that this electrical specification is a resistance value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99204681 CN2368042Y (en) | 1999-02-12 | 1999-02-12 | Electric characteristics testing mechanism of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99204681 CN2368042Y (en) | 1999-02-12 | 1999-02-12 | Electric characteristics testing mechanism of printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2368042Y true CN2368042Y (en) | 2000-03-08 |
Family
ID=33999398
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 99204681 Expired - Lifetime CN2368042Y (en) | 1999-02-12 | 1999-02-12 | Electric characteristics testing mechanism of printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2368042Y (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101363884B (en) * | 2007-08-10 | 2010-10-06 | 富葵精密组件(深圳)有限公司 | Method for testing circuit board |
| CN101408582B (en) * | 2008-11-24 | 2011-07-20 | 浙江中控技术股份有限公司 | Method and apparatus for testing circuit board |
| CN102325425A (en) * | 2011-09-14 | 2012-01-18 | 聚信科技有限公司 | Detecting method for lamination error of printed circuit board, printed circuit board and detecting device |
| CN103135047A (en) * | 2011-11-23 | 2013-06-05 | 亚旭电子科技(江苏)有限公司 | Printed circuit board testing device |
| CN104950144A (en) * | 2014-03-25 | 2015-09-30 | 矽品科技（苏州）有限公司 | Electric performance test carrying tool for metal welding wire |
| CN107861046A (en) * | 2017-10-13 | 2018-03-30 | 天津市英贝特航天科技有限公司 | Circuit board short circuit point measuring equipment and method based on TDR technology |
| CN110244214A (en) * | 2019-05-29 | 2019-09-17 | 晶晨半导体(上海)股份有限公司 | A kind of detection method of printed circuit board |
| CN110568340A (en) * | 2019-08-22 | 2019-12-13 | 苏州浪潮智能科技有限公司 | Impedance test structure, device and method |
| CN113608100A (en) * | 2021-06-25 | 2021-11-05 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Open circuit failure analysis method and system |
-
1999
- 1999-02-12 CN CN 99204681 patent/CN2368042Y/en not_active Expired - Lifetime
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101363884B (en) * | 2007-08-10 | 2010-10-06 | 富葵精密组件(深圳)有限公司 | Method for testing circuit board |
| CN101408582B (en) * | 2008-11-24 | 2011-07-20 | 浙江中控技术股份有限公司 | Method and apparatus for testing circuit board |
| CN102325425A (en) * | 2011-09-14 | 2012-01-18 | 聚信科技有限公司 | Detecting method for lamination error of printed circuit board, printed circuit board and detecting device |
| CN102325425B (en) * | 2011-09-14 | 2015-04-29 | 华为机器有限公司 | Detecting method for lamination error of printed circuit board, printed circuit board and detecting device |
| CN103135047A (en) * | 2011-11-23 | 2013-06-05 | 亚旭电子科技(江苏)有限公司 | Printed circuit board testing device |
| CN104950144A (en) * | 2014-03-25 | 2015-09-30 | 矽品科技（苏州）有限公司 | Electric performance test carrying tool for metal welding wire |
| CN107861046A (en) * | 2017-10-13 | 2018-03-30 | 天津市英贝特航天科技有限公司 | Circuit board short circuit point measuring equipment and method based on TDR technology |
| CN110244214A (en) * | 2019-05-29 | 2019-09-17 | 晶晨半导体(上海)股份有限公司 | A kind of detection method of printed circuit board |
| CN110568340A (en) * | 2019-08-22 | 2019-12-13 | 苏州浪潮智能科技有限公司 | Impedance test structure, device and method |
| CN113608100A (en) * | 2021-06-25 | 2021-11-05 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Open circuit failure analysis method and system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CX01 | Expiry of patent term |