CN113594229A - Gallium nitride Schottky barrier diode with high-K field plate and manufacturing method thereof - Google Patents
Gallium nitride Schottky barrier diode with high-K field plate and manufacturing method thereof Download PDFInfo
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 57
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 47
- 230000004888 barrier function Effects 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 103
- 239000002184 metal Substances 0.000 claims abstract description 103
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 238000002161 passivation Methods 0.000 claims abstract description 14
- 230000015556 catabolic process Effects 0.000 claims abstract description 11
- 230000005684 electric field Effects 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 160
- 238000000034 method Methods 0.000 claims description 37
- 239000007789 gas Substances 0.000 claims description 14
- 238000001259 photo etching Methods 0.000 claims description 14
- 238000005566 electron beam evaporation Methods 0.000 claims description 12
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 12
- 238000001704 evaporation Methods 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 229910052759 nickel Inorganic materials 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 9
- 239000002356 single layer Substances 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 7
- 229910052697 platinum Inorganic materials 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 6
- 229910052593 corundum Inorganic materials 0.000 claims description 6
- 239000003989 dielectric material Substances 0.000 claims description 6
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 5
- MCMNRKCIXSYSNV-UHFFFAOYSA-N ZrO2 Inorganic materials O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 5
- 238000000137 annealing Methods 0.000 claims description 5
- 150000002739 metals Chemical class 0.000 claims description 5
- 239000000919 ceramic Substances 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 230000008020 evaporation Effects 0.000 claims 4
- 238000005229 chemical vapour deposition Methods 0.000 claims 2
- 239000004973 liquid crystal related substance Substances 0.000 claims 2
- 239000000203 mixture Substances 0.000 claims 2
- 230000002708 enhancing effect Effects 0.000 abstract 1
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 24
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 24
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 24
- 229910052757 nitrogen Inorganic materials 0.000 description 13
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- 238000012986 modification Methods 0.000 description 2
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- 239000004065 semiconductor Substances 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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Abstract
The invention discloses a gallium nitride Schottky barrier diode with a high-K field plate, which mainly solves the problems of low breakdown voltage and poor reliability in the prior art. It comprises an ohmic cathode metal layer (1) and N from bottom to top+Gallium nitride substrate layer (2), N‑A gallium nitride epitaxial layer (3) and a Schottky anode metal layer (4); a metal field plate layer (5) is arranged at the upper right of the Schottky anode metal layer, so that the peak electric field is transferred to reduce the electric field of the Schottky anode metal layer when the device works reversely, and the metal field plate layer and N are arranged‑Between the gallium nitride epitaxial layers is providedA high-K dielectric layer (6) for enhancing the dielectric capability thereof; a passivation dielectric layer (7) is arranged above the Schottky anode metal layer, the metal field plate layer and the high-K dielectric layer, so that the leakage current is reduced while the electrode metal is protected. The invention increases the reverse breakdown voltage of the GaN Schottky barrier diode, reduces the reverse leakage of the GaN Schottky barrier diode, and can be used for high-frequency high-power electronic equipment.
Description
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to a gallium nitride Schottky barrier diode which can be used for manufacturing various high-power electronic devices.
Background
Gallium nitride, as a representative of the third generation ultra-wide bandgap semiconductor, has the characteristics of ultra-wide bandgap, high electron mobility and high breakdown field strength, the bandgap of the gallium nitride is 3 times of that of the silicon of the traditional semiconductor material, and the theoretical critical breakdown field strength is even up to 10 times of that of the silicon material. The electronic device prepared based on the gallium nitride material can be suitable for the high-voltage and high-frequency working environment, and has stable and reliable performance, so that the electronic device has the potential of replacing the traditional silicon material in the fields of power electronic devices and power devices.
Currently, some gan electronic products are commercialized, and the demand for gan schottky barrier diodes is increasing. With the development of the gan schottky barrier diode, the requirements on various performance indexes of the device are more and more strict, and compared with a simple PN junction diode, the gan schottky barrier diode has low on-voltage and high reverse breakdown voltage, can adapt to the working environment of high frequency and high voltage at the present stage, improves the product efficiency, and therefore has great research value.
The conventional vertical GaN Schottky barrier diode structure is shown in FIG. 1, and comprises an ohmic cathode metal layer 1, N from bottom to top+Gallium nitride substrate layers 2 and N- Epitaxial layer 3 of gallium nitride, N-A schottky anode metal layer 4 is provided on the gan epitaxial layer 3. The Schottky barrier diode has a simple structure, and the breakdown field strength is greatly improved compared with a PN junction diode. However, the actual breakdown field strength is far from the theoretical value because of no terminal structure protection. In addition, the existing knotWhen the device works reversely, the leakage current is large, which is not favorable for the idealization of power consumption.
Disclosure of Invention
The invention aims to provide a gan schottky barrier diode with a high-K field plate and a manufacturing method thereof to effectively increase the reverse breakdown voltage of the gan diode, reduce leakage current and improve the device performance, aiming at overcoming the defects of the prior art.
The technical scheme of the invention is realized as follows:
1. a GaN Schottky barrier diode with high-K field plate comprises an ohmic cathode metal layer 1, N from bottom to top+Gallium nitride substrate layer 2, N-Gallium nitride epitaxial layer 3 and schottky anode metal layer 4, its characterized in that: a metal field plate layer 5 is arranged on the upper right side of the Schottky anode metal layer 4, so that a peak electric field is transferred when the device works reversely, the electric field of the Schottky anode metal layer is reduced, and the voltage resistance of the device is improved; metal field plate layer 5 and N-A high-K dielectric layer 6 is arranged between the gallium nitride epitaxial layers 3 to enhance the dielectric capacity, so that the reverse breakdown voltage of the diode is improved while the leakage density is reduced; and a passivation dielectric layer 7 is arranged above the Schottky anode metal layer 4, the metal field plate layer 5 and the high-K dielectric layer 6, so that the leakage current is reduced while the electrode metal is protected.
Furthermore, the metal field plate layer 5 is a single layer or a plurality of layers formed by one or more of Ti, Al, Ni, Au, W and Pt metal materials, and the thickness of the metal field plate layer is 50 nm-500 nm.
Further, the high-K dielectric layer 6 adopts Si3N4、Al2O3、HfO2、ZrO2Any one of the high dielectric materials with the thickness of 50 nm-500 nm.
Further, the passivation dielectric layer 7 is made of Si3N4The thickness of the dielectric material is 50 nm-500 nm.
Further, said N-The thickness of the gallium nitride epitaxial layer 3 is 3 um-10 um, and the carrier concentration is 1E15cm-3～1E16cm-3(ii) a Said N is+Thickness of gallium nitride substrate layer 2Is 3um to 10um, and the carrier concentration is 1E17cm-3～1E18cm-3。
Further, the ohmic cathode metal layer 1 is a single layer or multiple layers formed by one or more of Ti, Al, Ni, Au and Pt, and the thickness is 50 nm-500 nm; the Schottky anode metal layer 4 is formed by a single layer or multiple layers of materials formed by one or more of Ni, Au and W metals, and the thickness is 50 nm-500 nm.
2. A method for preparing a gallium nitride Schottky barrier diode with a high-K field plate is characterized by comprising the following steps:
1) comprises N in turn from bottom to top+Gallium nitride substrate layer 2, N-An epitaxial wafer of gallium nitride epitaxial layer 3;
2) in N+Carrying out primary photoetching on the lower surface of the gallium nitride substrate layer 2 to form a pattern, growing ohmic cathode metal in the pattern area by adopting an electron beam evaporation process, and carrying out thermal annealing treatment to form an ohmic cathode metal layer 1;
3) in N-Performing second photoetching on the upper right end of the gallium nitride epitaxial layer 3 to form a pattern, and growing Si with the thickness of 50-500 nm in the pattern region by adopting a plasma enhanced chemical vapor deposition process or a sputtering process3N4Or Al2O3Or HfO2Or ZrO2Forming a high-K dielectric layer 6;
4) carrying out third photoetching on the left side of the high-K dielectric layer 6 to form a pattern, and growing a Schottky anode metal layer 4 and a metal field plate layer 5 in the pattern region by adopting an electron beam evaporation process;
5) depositing Si with the thickness of 50 nm-500 nm on the upper surface of the whole sample wafer by adopting a plasma enhanced chemical vapor deposition process3N4Passivating the dielectric layer 7 to complete the manufacture of the device;
compared with the prior art, the invention has the following advantages and effects:
firstly, because the metal field plate layer is additionally arranged at the right upper part of the Schottky anode metal layer, when the device works in the reverse direction, a peak electric field can be transferred, the electric field of the Schottky anode metal layer is reduced, and the voltage resistance of the device is improved;
secondly, the high-K dielectric layer is additionally arranged on the right side of the Schottky anode metal layer, so that the dielectric capacity of the Schottky anode metal layer is enhanced, the reverse breakdown voltage of the diode can be improved while the leakage density of the diode can be reduced, and the performance of the device is further improved;
thirdly, as the passivation dielectric layer is additionally arranged on the upper surface of the whole sample, the leakage current can be reduced while the electrode metal is protected.
Drawings
FIG. 1 is a schematic cross-sectional view of a conventional GaN Schottky barrier diode;
FIG. 2 is a schematic cross-sectional view of a diode of the present invention;
fig. 3 is a schematic flow chart of manufacturing the diode of fig. 2 according to the present invention.
Detailed Description
The following describes the practice of the present invention in further detail with reference to the accompanying drawings:
referring to fig. 2, the high-K dielectric field plate technology gan schottky barrier diode of the present invention includes an ohmic cathode metal layer 1, N+Gallium nitride substrate layer 2, N-Gallium nitride epitaxial layer 3, schottky anode metal layer 4, metal field plate layer 5, high-K dielectric layer 6 and passivation dielectric layer 7, wherein: the ohmic cathode metal layer 1 is a single layer or a plurality of layers formed by one or more materials of Ti, Al, Ni, Au and Pt, and the thickness of the ohmic cathode metal layer is 50 nm-500 nm; n is a radical of+A gallium nitride substrate layer 2 with a carrier concentration of 1E17cm is disposed on the ohmic cathode metal layer 1-3～1E18cm-3The thickness is 3 um-10 um; n is a radical of-An epitaxial layer 3 of gallium nitride on N+The thickness of the upper part of the gallium nitride substrate layer 2 is 3 um-10 um, and the carrier concentration is 1E15cm-3～1E16cm-3(ii) a A Schottky anode metal layer 4 is positioned on N-The left upper part of the gallium nitride epitaxial layer 3 is formed into a single layer or a plurality of layers by adopting one material of Ni, Au and W, and the thickness is 50 nm-500 nm; the metal field plate layer 5 is positioned on the upper right of the Schottky anode metal layer 4 and is made of the same material and thickness as the Schottky anode metal layer 4Forming; the high-K dielectric layer 6 is arranged on the right side of the Schottky anode metal layer 4 and is made of Si3N4、Al2O3、HfO2、ZrO2The thickness of any one dielectric material is 50 nm-500 nm; the passivation dielectric layer 7 is located above the Schottky anode metal layer 4, the metal field plate layer 5 and the high-K dielectric layer 6, and the thickness of the passivation dielectric layer is 50 nm-500 nm.
Referring to fig. 3, the method of manufacturing the gan schottky barrier diode of the present invention provides the following three embodiments:
example 1: the metal field plate layer is made of Ni/Au, and the high-K dielectric layer is made of Si3N4And the thickness of the passivation dielectric layer is 50 nm.
Step 1: the epitaxial wafer is cleaned as shown in fig. 3 (a).
The epitaxial wafer used in this example was a bottom-up wafer comprising N+Gallium nitride substrate layer and N-Epitaxial layer of gallium nitride, wherein N+The thickness of the gallium nitride substrate layer is 3um, N-The thickness of the gallium nitride epitaxial layer is 5 um;
and (3) sequentially ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the epitaxial wafer by using a nitrogen gun.
Step 2: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
2.1) on epitaxial wafer N+Carrying out primary photoetching on the lower surface of the gallium nitride substrate layer to form a pattern, putting a sample wafer after the pattern is formed into an electron beam evaporation table, and evaporating Ti/Au with the thickness of 60nm/120nm on the surface at the speed of 0.1nm/s under the conditions that the power is 150W and the vacuum is 5E-4Pa to be used as ohmic cathode metal;
2.2) removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing for 30s at 860 ℃ to form an ohmic cathode metal layer.
And step 3: a high K dielectric layer is deposited as shown in fig. 3 (c).
3.1) at N-Performing second photoetching on the GaN epitaxial layer to form a pattern, and placing the pattern into a plasma enhanced chemical vapor deposition device with the power of 20W and the pressure of a reaction chamber of 20W2000mTorr, cavity temperature 220 deg.C, reaction chamber gas SiH4：N2O：N2Flow rate ratio 40 sccm: 710 sccm: depositing Si with the thickness of 250nm under the condition of 180sccm3N4A high-K dielectric layer;
3.2) removing redundant metal on the surface of the sample wafer by adopting a stripping process, sequentially carrying out ultrasonic cleaning on the epitaxial wafer deposited with the high K dielectric layer in acetone, ethanol and plasma water for 5min, and finally blowing the sample wafer by using a nitrogen gun.
And 4, step 4: a schottky anode metal layer and a metal field plate layer are deposited as shown in fig. 3 (d).
4.1) at N-Carrying out third photoetching on the gallium nitride epitaxial layer and the high-K dielectric layer to form a pattern, then putting the sample wafer with the pattern into an electron beam evaporation table, and evaporating Ni/Au with the thickness of 60nm/120nm on the surface at the speed of 0.1nm/s under the conditions that the power is 30W and the vacuum is 5E-4Pa to be used as a Schottky anode metal and metal field plate layer;
4.2) removing excessive metal on the surface of the whole sample wafer by adopting a stripping process, sequentially and respectively ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the sample wafer by using a nitrogen gun.
And 5: a passivation dielectric layer is deposited as shown in fig. 3 (e).
5.1) adopting a plasma enhanced chemical vapor deposition process, putting the sample wafer into a plasma enhanced chemical vapor deposition device, setting the power to be 20W, the pressure of a reaction chamber to be 2000mTorr, the temperature of a cavity to be 220 ℃, and SiH gas in the reaction chamber4：N2O：N2Flow rate ratio 40 sccm: 710 sccm: 180sccm, and depositing Si with a thickness of 50nm on the entire upper surface of the sample wafer3N4And passivating the dielectric layer.
And 5.2) sequentially and ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the sample wafer to dry by using a nitrogen gun to finish the manufacture of the whole diode.
Example 2: w is used for manufacturing the metal field plate layer, HfO is used as the material of the high-K dielectric layer2And the thickness of the passivation dielectric layer is 200 nm.
Step A: the epitaxial wafer is cleaned as shown in fig. 3 (a).
Step a of this example is the same as step 1 in example 1.
And B: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
On the epitaxial wafer N+Carrying out first photoetching on the lower surface of the gallium nitride substrate layer to form a pattern, putting a sample wafer after the pattern is formed into an electron beam evaporation table, and evaporating Ti/Al/Ni/Au metal with the thickness of 20/145/50/45nm on the surface at the speed of 0.1nm/s under the conditions that the power is 180W and the vacuum is 5E-4 Pa;
removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing for 30s at 860 ℃ to form an ohmic cathode metal layer; and sequentially ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the sample wafer by using a nitrogen gun.
And C: a high K dielectric layer is deposited as shown in fig. 3 (c).
In N-Performing secondary photoetching on the gallium nitride epitaxial layer to form a pattern, and performing HfO (high frequency oxide) magnetron sputtering process by adopting a direct current magnetron sputtering process2Ceramic is used as a target material, the target base distance is 5cm, the base pressure and the working pressure of a vacuum chamber are respectively set to be 2E-3Pa and 6E-1Pa, the target power is 200W, and HfO is deposited in a pattern area at room temperature2The thickness of the high-K dielectric layer is 250 nm;
and removing redundant metal on the surface of the sample wafer by adopting a stripping process, sequentially and ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally drying the sample wafer by using a nitrogen gun.
Step D: a schottky anode metal layer and a metal field plate layer are deposited as shown in fig. 3 (d).
In N-Carrying out third photoetching on the gallium nitride epitaxial layer and the high-K dielectric layer to form patterns, then putting the sample wafer with the patterns into an electron beam evaporation table, and evaporating W with the thickness of 150nm on the surface at the speed of 0.1nm/s under the conditions that the power is 35W and the vacuum is 5E-4Pa to be used as Schottky anode metal and a metal field plate layer;
and removing excessive metal on the surface of the whole sample wafer by adopting a stripping process, sequentially and ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally drying the sample wafer by using a nitrogen gun.
Step E: a passivation dielectric layer is deposited as shown in fig. 3 (e).
Adopting a plasma enhanced chemical vapor deposition process, putting a sample wafer into a plasma enhanced chemical vapor deposition device, setting the power to be 25W, the pressure of a reaction chamber to be 2000mTorr, the temperature of a cavity to be 300 ℃, and SiH gas in the reaction chamber4：N2O：N2Flow rate ratio 40 sccm: 710 sccm: 180sccm, and depositing Si with a thickness of 200nm on the entire upper surface of the sample wafer3N4Passivating the dielectric layer;
and then, sequentially ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the sample wafer by using a nitrogen gun to dry, thereby completing the manufacture of the whole diode.
Example 3: the metal field plate layer is made of Au, and the high-K dielectric layer is made of Al2O3And passivating the Schottky diode with the dielectric layer with the thickness of 500 nm.
The method comprises the following steps: the epitaxial wafer is cleaned as shown in fig. 3 (a).
Step one of this example is the same as step 1 in example 1.
Step two: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
Firstly, an epitaxial wafer N is formed+Carrying out first photoetching on the lower surface of the gallium nitride substrate layer to form a pattern, putting a sample wafer after the pattern is formed into an electron beam evaporation table, and evaporating Ti/Al/Au metal with the thickness of 20/145/45nm on the surface at the speed of 0.1nm/s under the conditions that the power is 200W and the vacuum is 5E-4 Pa; removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing for 30s at 860 ℃ to form an ohmic cathode metal layer; and sequentially ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the sample wafer by using a nitrogen gun.
Step three: a high K dielectric layer is deposited as shown in fig. 3 (c).
In N-Performing a second photolithography on the gallium nitride epitaxial layer to form a patternPutting the sample wafer with the formed pattern into plasma enhanced chemical vapor deposition equipment, setting the power to be 30W, the pressure of a reaction chamber to be 2000mTorr, the temperature of a cavity to be 380 ℃, the gas flow rate Ar of the reaction chamber: n is a radical of2O: TMA ratio of 700 sccm: 800 sccm: depositing Al with the thickness of 200nm in the pattern region under the process condition of 100sccm2O3A high-K dielectric layer; and removing redundant metal on the surface of the sample wafer by adopting a stripping process, sequentially and ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally drying the sample wafer by using a nitrogen gun.
Step four: a schottky anode metal layer and a metal field plate layer are deposited as shown in fig. 3 (d).
In N-Carrying out third photoetching on the gallium nitride epitaxial layer and the high-K dielectric layer to form patterns, putting the sample wafer into an electron beam evaporation table, and evaporating Au with the thickness of 150nm in the pattern area at the speed of 0.1nm/s under the conditions that the power is 40W and the vacuum is 5E-4Pa to be used as a Schottky anode metal layer and a metal field plate layer; and removing excessive metal on the surface of the whole sample wafer by adopting a stripping process, sequentially and ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally drying the sample wafer by using a nitrogen gun.
Step five: a passivation dielectric layer is deposited as shown in fig. 3 (e).
Adopting a plasma enhanced chemical vapor deposition process, putting the sample wafer subjected to the fourth step into a plasma enhanced chemical vapor deposition device, setting the power to be 30W, the pressure of the reaction chamber to be 2000mTorr, the temperature of the cavity to be 380 ℃, and SiH gas in the reaction chamber4：N2O：N2Flow rate ratio 40 sccm: 710 sccm: 180sccm, and depositing Si with a thickness of 500nm on the entire upper surface of the sample wafer3N4Passivating the dielectric layer; and then, sequentially ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the sample wafer by using a nitrogen gun to dry, thereby completing the manufacture of the whole diode.
The above examples are only three specific examples of the present invention and should not be construed as limiting the invention in any way, and it will be apparent to those skilled in the art that the contents and principles of the invention can be understoodVarious modifications and changes in form and detail can be made without departing from the principle and structure of the present invention, for example, the selection of the metals for the cathode and anode is not limited to the metal materials given in the examples, but also includes Mo and Pt; and the selection of the high-K dielectric material is not limited to the dielectric materials given in the embodiment, and ZrO is included2However, such modifications and variations are within the scope of the invention as defined in the appended claims.
Claims (10)
1. A GaN Schottky barrier diode with a high-K field plate comprises an ohmic cathode metal layer (1) and N from bottom to top+Gallium nitride substrate layer (2), N-Gallium nitride epitaxial layer (3) and schottky anode metal layer (4), its characterized in that:
a metal field plate layer (5) is arranged on the upper right side of the Schottky anode metal layer (4) so that a peak electric field is transferred when the device works reversely, the electric field of the Schottky anode metal layer is reduced, and the voltage resistance of the device is improved;
metal field plate layer (5) and N-A high-K dielectric layer (6) is arranged between the gallium nitride epitaxial layers (3) to enhance the dielectric capacity, so that the reverse breakdown voltage of the diode is improved while the leakage density is reduced;
and passivation dielectric layers (7) are arranged above the Schottky anode metal layer (4), the metal field plate layer (5) and the high-K dielectric layer (6) so as to protect the electrode metal and reduce leakage current.
2. The diode of claim 1, wherein:
the metal field plate layer (5) is a single layer or a plurality of layers formed by one or more of Ti, Al, Ni, Au, W and Pt metal materials, and the thickness of the metal field plate layer is 50 nm-500 nm.
3. The diode of claim 1, wherein:
the high-K dielectric layer (6) adopts Si3N4、Al2O3、HfO2、ZrO2Any one of the materials having a high dielectric constant,and the thickness is 50 nm-500 nm;
the passivation dielectric layer (7) adopts Si3N4The thickness of the dielectric material is 50 nm-500 nm.
4. The diode of claim 1, wherein:
said N is-The thickness of the gallium nitride epitaxial layer (3) is 3 um-10 um, and the carrier concentration range is 1E15cm-3～1E16cm-3；
Said N is+The thickness of the gallium nitride substrate layer (2) is 3 um-10 um, and the carrier concentration is 1E17cm-3～1E18cm-3。
5. The diode of claim 1, wherein:
the ohmic cathode metal layer (1) is a single layer or multiple layers formed by one or more of Ti, Al, Ni, Au and Pt, and the thickness is 50 nm-500 nm;
the Schottky anode metal layer (4) is a single layer or a plurality of layers formed by one or more of Ni, Au and W metals, and the thickness is 50 nm-500 nm.
6. A method for preparing a gallium nitride Schottky barrier diode with a high-K field plate is characterized by comprising the following steps:
1) comprises N in turn from bottom to top+Gallium nitride substrate layer (2), N-An epitaxial wafer of a gallium nitride epitaxial layer (3);
2) in N+Carrying out primary photoetching on the lower surface of the gallium nitride substrate layer (2) to form a pattern, growing ohmic cathode metal in the pattern area by adopting an electron beam evaporation process, and carrying out thermal annealing treatment to form an ohmic cathode metal layer (1);
3) in N-Performing second photoetching on the upper right end of the gallium nitride epitaxial layer (3) to form a pattern, and growing Si with the thickness of 50-500 nm in the pattern region by adopting a plasma enhanced chemical vapor deposition process or a sputtering process3N4Or Al2O3Or HfO2Or ZrO2Forming a high-K dielectric layer (6);
4) carrying out third photoetching on the left side of the high-K dielectric layer (6) to form a pattern, and growing a Schottky anode metal layer (4) and a metal field plate layer (5) in the pattern region by adopting an electron beam evaporation process;
5) depositing Si with the thickness of 50 nm-500 nm on the upper surface of the whole sample wafer by adopting a plasma enhanced chemical vapor deposition process3N4And passivating the dielectric layer (7) to finish the manufacture of the device.
7. The method of claim 6, wherein:
the process conditions of the electron beam evaporation adopted in the step (2) are as follows: working vacuum: 5E-4 Pa; reaction chamber gas: one or more of Ti, Al, Ni, Au and Pt metals; evaporation rate: 0.1 nm/s; evaporation power: 150W-200W;
the process conditions of adopting electron beam evaporation in the step (4) are as follows: working vacuum: 5E-4 Pa; reaction chamber gas: one or more of Ni, Au and W metals; evaporation rate: 0.1 nm/s; evaporation power: 30W to 40W.
8. The method of claim 6, wherein the process conditions for applying enhanced chemical vapor deposition in step (3) are as follows:
reaction chamber pressure: the temperature of the liquid crystal is 2000mTorr,
reaction chamber gas: SiH4、N2O、N2These three gases, or Ar, N2O, TMA the three kinds of gases are mixed,
reaction chamber gas flow rate ratio: SiH4：N2O：N240 sccm: 710 sccm: 180sccm, or Ar: n is a radical of2O：TMA＝700sccm：800sccm：100sccm，
Temperature of the reaction chamber: 220 to 380 ℃,
RF radio frequency source: 20W to 30W.
9. The method of claim 6, wherein the process conditions for sputtering in step (3) are as follows:
base pressure of a vacuum chamber: 2E-3Pa, and the reaction solution is mixed,
working air pressure: the pressure of the mixture is 6E-1Pa,
target holder material: HfO2The ceramic is a mixture of a ceramic and a metal,
target base distance: the length of the groove is 5cm,
working temperature: at a temperature of 27 c,
target power: 150W to 200W.
10. The method of claim 6, wherein the process conditions for applying enhanced chemical vapor deposition in step (5) are as follows:
reaction chamber pressure: the temperature of the liquid crystal is 2000mTorr,
reaction chamber gas: SiH4、N2O、N2These three kinds of gases are, for example,
reaction chamber gas flow rate ratio: SiH4：N2O：N2＝40sccm：710sccm：180sccm，
Temperature of the reaction chamber: 220 to 380 ℃,
RF radio frequency source: 20W to 30W.
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