CN103904112A - Depletion type insulated gate algan/gan device structure and manufacturing method thereof - Google Patents
Depletion type insulated gate algan/gan device structure and manufacturing method thereof Download PDFInfo
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- CN103904112A CN103904112A CN201410025026.1A CN201410025026A CN103904112A CN 103904112 A CN103904112 A CN 103904112A CN 201410025026 A CN201410025026 A CN 201410025026A CN 103904112 A CN103904112 A CN 103904112A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 6
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 68
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 35
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 35
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000002161 passivation Methods 0.000 claims abstract description 15
- 239000000463 material Substances 0.000 claims abstract description 13
- 230000008569 process Effects 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 229910005883 NiSi Inorganic materials 0.000 claims abstract description 6
- 230000005684 electric field Effects 0.000 claims abstract description 6
- 230000004888 barrier function Effects 0.000 claims description 23
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 238000001259 photo etching Methods 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 6
- 238000005566 electron beam evaporation Methods 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 238000002360 preparation method Methods 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- 239000008367 deionised water Substances 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 4
- 238000004151 rapid thermal annealing Methods 0.000 claims description 4
- 229910008484 TiSi Inorganic materials 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 230000001105 regulatory effect Effects 0.000 claims description 3
- 238000000231 atomic layer deposition Methods 0.000 claims description 2
- 239000012159 carrier gas Substances 0.000 claims description 2
- 238000004140 cleaning Methods 0.000 claims description 2
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 2
- 238000005406 washing Methods 0.000 claims description 2
- 229910002601 GaN Inorganic materials 0.000 claims 17
- 229910004129 HfSiO Inorganic materials 0.000 claims 1
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- 229910052733 gallium Inorganic materials 0.000 claims 1
- 239000011810 insulating material Substances 0.000 claims 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims 1
- 229910052594 sapphire Inorganic materials 0.000 claims 1
- 239000010980 sapphire Substances 0.000 claims 1
- 229910010271 silicon carbide Inorganic materials 0.000 claims 1
- 230000008901 benefit Effects 0.000 abstract description 4
- 238000009413 insulation Methods 0.000 abstract 6
- 229910008479 TiSi2 Inorganic materials 0.000 abstract 1
- DFJQEGUNXWZVAH-UHFFFAOYSA-N bis($l^{2}-silanylidene)titanium Chemical compound [Si]=[Ti]=[Si] DFJQEGUNXWZVAH-UHFFFAOYSA-N 0.000 abstract 1
- 230000010287 polarization Effects 0.000 description 6
- 230000005533 two-dimensional electron gas Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000006835 compression Effects 0.000 description 4
- 238000007906 compression Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 150000003377 silicon compounds Chemical class 0.000 description 2
- 241000160765 Erebia ligea Species 0.000 description 1
- 238000005054 agglomeration Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/404—Multiple field plate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
Abstract
The invention discloses a depletion type insulated gate AlGaN/GaN device structure and a manufacturing method of the depletion type insulated gate AlGaN/GaN device structure. The depletion type insulated gate AlGaN/GaN device structure and the manufacturing method mainly solve the problem that an existing AlGaN/GaN high-migration-rate transistor obtains high frequency. The structure comprises a substrate, an intrinsic GaN layer, an AlN isolating layer, an intrinsic AlGaN layer, an AlGaN doping layer, a gate electrode, a source electrode, a drain electrode, an insulation layer, a passivation layer and silicide used for adjusting a channel electric field. The AlGaN doping layer is located above the intrinsic AlGaN layer, the electrodes and the insulation layer are located above the AlGaN layer, and the silicide is arranged above the insulation layer. Depletion type AlGaN/GaN heterojunction materials are epitaxially grown on the substrate, the source electrode and the drain electrode are formed on the structure, then the insulation layer is deposited, the gate electrode is formed on the insulation layer, and finally the silicide (NiSi, TiSi2 and the like) is formed on the insulation layer (between a gate drain area and a gate source area). Finally, the passivation layer is deposited to achieve passivation of the device. The structure has the advantages of being high in device frequency and high in process repeatability and controllability, and can be used for a depletion type AlGaN/GaN MISHEMT device with low breakover, high resistance and high work frequency.
Description
Technical field
The invention belongs to microelectronics technology, relate to semiconductor device and make, a kind of depletion type insulated gate AlGaN/GaN device architecture and manufacture method, can be used for making the high-frequency depletion high electron mobility transistors of low on-resistance specifically.
Background technology
The 3rd bandwidth bandgap semiconductor taking SiC and GaN as representative is large with its energy gap in recent years, breakdown electric field is high, thermal conductivity is high, saturated electrons speed is large and the characteristic such as heterojunction boundary two-dimensional electron gas height, makes it be subject to extensive concern.In theory, utilize the devices such as high electron mobility transistor (HEMT) that these materials make, LED, laser diode LD to there is obvious advantageous characteristic than existing device, therefore researcher has carried out extensive and deep research to it both at home and abroad in the last few years, and has obtained the achievement in research attracting people's attention.
AlGaN/GaN heterojunction high electron mobility transistor (HEMT) is demonstrating advantageous advantage aspect high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device high-frequency, high pressure, high power have attracted numerous research.In recent years, make higher frequency high pressure AlGaN/GaN HEMT and become the another study hotspot of concern.Due to after AlGaN/GaN heterojunction grown, just there are a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, and in the time of the resistivity decreased of interface, we can obtain higher device frequency characteristic.AlGaN/GaN heterojunction electron mobility transistor can obtain very high frequency, but often will be to sacrifice high pressure resistant property as cost.The method of the AlGaN/GaN heterojunction transistor frequency improving is at present as follows:
1. in conjunction with reducing resistivity without passivated dielectric medium (dielectric-free passivation) and the long ohmic contact of living again.Referring to Yuanzheng Yue, Zongyang Hu, InAlN/AlN/GaN HEMTs With Regrown Ohmic Contacts and f_{T}of 370 GH such as Jia Guo.EDL.Vol33.NO.7，P1118-P1120。The method has adopted 30 nanometer grid long, and in conjunction with reducing source ohmic leakage rate without passivated dielectric medium (dielectric-free passivation) and the long ohmic contact of living again.Frequency can reach 370GHz.Can also continue to improve frequency to 500GHz by reducing channel length.
2. the long heavy-doped source of living again drains to the Two-dimensional electron gas channel of nearly grid.Referring to Shinohara, K.Regan, D.Corrion, the self-aligned-gate GaN-HEMTs with heavily-doped n+-GaN ohmic contacts to 2DEG such as A.Brown; IEDM, IEEE; 2012.The long n+GaN ohmic contact of living again in the past achieves noticeable achievement to reducing raceway groove contact resistance, but heavy-doped source drain contact directly can obtain better frequency characteristic and current characteristics to the Two-dimensional electron gas channel approaching under grid.The method of reporting in literary composition makes frequency reach f
t/ fmax=342/518GHz.Puncture voltage 14V simultaneously.
Summary of the invention
The object of the invention is to the deficiency for above high-frequency device, a kind of method that based on silicide, raceway groove is produced stress is provided, to improve the transistorized frequency characteristic of depletion-mode AlGaN/GaN high mobility simultaneously, the controllability and the repeatability that strengthen technique, meet the application requirements of GaN base electron device to high-frequency, low on-resistance.
The present invention is achieved in that
Technical thought of the present invention is: use the method for epitaxial growth the etching thin dielectric layer of growing on AlGaN, multiple bulk silicon compounds of growing on thin dielectric layer, silicide agglomeration spacing is less than piece width, because the thermal coefficient of expansion of silicide is greater than the thermal coefficient of expansion of insulating barrier and AlGaN.In the time that epitaxial growth is cooling, silicide can be introduced compression to insulating barrier and AlGaN layer, and meanwhile, the AlGaN layer between silicide will be subject to tensile stress.In the time that AlGaN layer is subject to compression, the 2DEG concentration that is positioned at AlGaN/GaN interface reduces to some extent, and in the time that AlGaN layer is subject to tensile stress, the 2DEG concentration that is positioned at AlGaN/GaN interface increases to some extent.The size of AlGaN layer institute compression chord (tensile stress) is relevant with the length of silicide (silicide spacing), this relation is not a kind of linear relationship, but in the time that operating distance reduces the suffered stress of AlGaN layer on the impact of polarization charge increase sharply (being illustrated in fig. 2 shown below), so we can make the width of silicide, spacing difference between silicide realizes the adjusting of two-dimensional electron gas, the increase of 2DEG concentration still reduces the magnitude relationship that depends on the two on the whole, in this invention, we select to make two-dimensional electron gas increase reduce channel resistance.So tensile stress is greater than compression, so silicide width is greater than silicide spacing.As shown in Figure 2, if the width of silicide is 1mm, silicide spacing is 0.25mm,. the tension force effect that stand in silicide spacing (0.25mm) region so makes polarization charge finally than large two orders of magnitude of the polarization charge of silicide regions (1mm), so effect on the whole shows as AlGaN layer, to be subject to tensile stress be that polarization charge concentration increases to some extent, thereby the concentration of 2DEG also presents the result that entirety increases because of the increase of polarization charge between grid source and between grid leak.Therefore the resistance in this region reduces to some extent.Referring to IEICE TRANS.ELECTON, VOL.E93-C, NO.8AUGUST2010.Analysis of Passivation-Film-Induced Stress Effects on Electrical Properties in AlGaN/GaN HEMTs. makes spacing between silicide be less than the length of silicide by selection, the growth that makes 2DEG concentration reduces much larger than 2DEG concentration, thereby the resistance between grid leak and grid source is reduced to some extent, in the situation that not changing grid leak spacing, improve the transistorized frequency characteristic of high mobility.
According to above-mentioned technical thought, device of the present invention comprises substrate, intrinsic GaN layer, AlN separator, AlGaN barrier layer (intrinsic AlGaN layer), AlGaN doped layer, gate electrode, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field.AlGaN doped layer is positioned on barrier layer, and electrode and insulating barrier are positioned on AlGaN layer, and silicide is positioned on insulating barrier.Epitaxial growth depletion-mode AlGaN/GaN heterojunction material on substrate, and in this structure, form source electrode and drain electrode, then deposit one layer insulating, on insulating barrier, form grid, finally on insulating barrier (between grid leak region and grid source region), form silicide (NiSi, TiSi
2etc.).Last deposit passivation layer is realized the passivation of device.
As shown in Figure 3, according to above-mentioned technical thought, utilize metal silicide to improve the structure of AlGaN/GaN HEMT device performance, comprise the steps:
(1) epitaxially grown AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl: H
2o=1: corrode 30-60s in 1 solution, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the AlGaN/GaN material for preparing table top is carried out to photoetching, form source-drain area, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact;
(4) device is put into atomic layer deposition apparatus, process conditions are: growth temperature is 300 DEG C, and pressure is 2000Pa, H
2the flow of O and TMAl is 150sccm, the Al that deposit 5-10nm is thick
2o
3medium;
(5) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: the DC offset voltage of Ni target is 100V, the rf bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal film that codeposition 100nm～150nm is thick;
(6) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min;
(7) device is put into quick anneal oven, carry out 450 DEG C under nitrogen environment, the rapid thermal annealing of 30s, forms NiSi alloy;
(8) device that completes alloy is carried out to photoetching, form gate metal region, then put into electron beam evaporation platform deposit Ni/Au=20/200nm and peel off, complete the preparation of gate electrode;
(9) put into PECVD reative cell deposit SiN passivating film by completing device prepared by grid, concrete technology condition is: SiH
4flow be 40sccm, NH
3flow be 10sccm, chamber pressure is 1～2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm～300nm is thick;
(10) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, the SiN that source electrode, drain and gate are covered above and Al
2o
3film etches away;
(11) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
Tool of the present invention has the following advantages:
(1) device of the present invention adopts the method for deposition insulating layer and silicide, and AlGaN is produced to effect of stress, regulates electron gas concentration and electric field strength in raceway groove.Improve device frequency characteristic.
(2) in the present invention, institute's epitaxial silicon compound, between grid leak and grid source, does not need to reduce grid leak distance when improving frequency characteristic, thereby without sacrificing high pressure resistant property.
(3) in the present invention owing to can regulate as required size and the spacing of silicide between grid leak and grid source, thereby regulate effect of stress size.Electron gas concentration and frequency characteristic can regulate as required between grid source and between grid leak.
(4) the present invention, owing to adopting insulated gate structure, has reduced grid Leakage Current.
Brief description of the drawings
By describing in more detail exemplary embodiment of the present invention with reference to accompanying drawing, above and other aspect of the present invention and advantage will become more and be readily clear of, in the accompanying drawings:
Fig. 1 is the cross-sectional view of device of the present invention;
Fig. 2 is physical principle key diagram (polarization charge is with the variation of silicide width);
Fig. 3 is the fabrication processing schematic diagram of device of the present invention.
Embodiment
Hereinafter, now with reference to accompanying drawing, the present invention is described more fully, various embodiment shown in the drawings.But the present invention can implement in many different forms, and should not be interpreted as being confined to embodiment set forth herein.On the contrary, it will be thorough with completely providing these embodiment to make the disclosure, and scope of the present invention is conveyed to those skilled in the art fully.
Hereinafter, exemplary embodiment of the present invention is described with reference to the accompanying drawings in more detail.
With reference to Fig. 1, device of the present invention comprises substrate, intrinsic GaN layer, AlN separator, AlGaN barrier layer (intrinsic AlGaN layer), AlGaN doped layer, gate electrode, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field.AlGaN doped layer is positioned on barrier layer, and electrode and insulating barrier are positioned on AlGaN layer, and silicide is positioned on insulating barrier.Epitaxial growth depletion-mode AlGaN/GaN heterojunction material on substrate, and in this structure, form source electrode and drain electrode, then deposit one layer insulating, on insulating barrier, form grid, finally on insulating barrier (between grid leak region and grid source region), form silicide (NiSi, TiSi
2etc.).Last deposit passivation layer is realized the passivation of device.
The foregoing is only embodiments of the invention, be not limited to the present invention.The present invention can have various suitable changes and variation.All any amendments of doing within the spirit and principles in the present invention, be equal to replacement, improvement etc., within protection scope of the present invention all should be included in.
Claims (9)
1. a depletion type insulated gate AlGaN/GaN device architecture, is characterized in that: described structure comprises substrate, intrinsic GaN layer, AlN separator, intrinsic AlGaN layer, AlGaN doped layer, gate electrode, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field; Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and electrode and insulating barrier are positioned on AlGaN layer, and silicide is positioned on insulating barrier; Epitaxial growth depletion-mode AlGaN/GaN heterojunction material on substrate, and on this heterojunction material, form source electrode and drain electrode, then deposit one layer insulating, on insulating barrier, form grid, between last grid leak region and grid source region on insulating barrier, form silicide, last deposit passivation layer is realized the passivation of device.
2. depletion type insulated gate AlGaN/GaN device architecture according to claim 1, is characterized in that: the material of substrate is wherein sapphire, carborundum, GaN or MgO.
3. depletion type insulated gate AlGaN/GaN device architecture according to claim 1, is characterized in that: in AlGaN wherein, the component of Al and Ga can regulate, AlxGa
1-xx=0～1 in N.
4. depletion type insulated gate AlGaN/GaN device architecture according to claim 1, is characterized in that: silicide comprises NiSi TiSi
2, or Co
2si.
5. depletion type insulated gate AlGaN/GaN device architecture according to claim 1, is characterized in that: the thickness of insulating barrier is 5～10nm.
6. depletion type insulated gate AlGaN/GaN device architecture according to claim 1, is characterized in that: its GaN raceway groove replaces with Al
yga
1-
yn raceway groove, and Al
yga
1-
yin N, the component of y is less than the Al component x in addition two-layer, i.e. x > y.
7. depletion type insulated gate AlGaN/GaN device architecture according to claim 1, is characterized in that: grid adopts insulated gate structure, reduces gate leak current.
8. depletion type insulated gate AlGaN/GaN device architecture according to claim 1, is characterized in that: its insulating barrier and passivation layer comprise SiN, Al
2o
3, HfO
2, the insulating material such as HfSiO.
9. the manufacture method based on depletion type insulated gate AlGaN/GaN device architecture, is characterized in that: comprise the steps:
Utilize metal silicide to improve the structure of AlGaN/GaN MISHEMT device performance, comprise following process:
(1) epitaxially grown AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl: H
2o=1: corrode 30-60s in 1 solution, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the AlGaN/GaN material for preparing table top is carried out to photoetching, form source-drain area, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact;
(4) device is put into atomic layer deposition apparatus, process conditions are: growth temperature is 300 DEG C, and pressure is 2000Pa, H
2the flow of O and TMAl is 150sccm, the Al that deposit 5-10nm is thick
2o
3medium;
(5) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: the DC offset voltage of Ni target is 100V, the rf bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal film that codeposition 100nm～150nm is thick;
(6) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min;
(7) device is put into quick anneal oven, carry out 450 DEG C under nitrogen environment, the rapid thermal annealing of 30s, forms NiSi alloy;
(8) device that completes alloy is carried out to photoetching, form gate metal region, then put into electron beam evaporation platform deposit Ni/Au=20/200nm and peel off, complete the preparation of gate metal;
(9) put into PECVD reative cell deposit SiN passivating film by completing device prepared by grid, concrete technology condition is: SiH
4flow be 40sccm, NH
3flow be 10sccm, chamber pressure is 1～2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm～300nm is thick;
(10) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, the SiN that source electrode, drain electrode and grid are covered above and Al
2o
3film etches away;
(11) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109166936A (en) * | 2018-08-09 | 2019-01-08 | 镇江镓芯光电科技有限公司 | A kind of high resistant AlGaN base photoconductive switching device and preparation method thereof |
| CN109314135A (en) * | 2016-07-01 | 2019-02-05 | 英特尔公司 | Grid pile stack for GaN E mode transistor performance designs |
| CN113540231A (en) * | 2021-06-15 | 2021-10-22 | 西安电子科技大学 | P-GaN high electron mobility transistor based on in-situ growth MIS structure and preparation method |
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| US20090250767A1 (en) * | 2007-08-30 | 2009-10-08 | The Furukawa Electric Co., Ltd. | Ed inverter circuit and integrate circuit element including the same |
| US20090078964A1 (en) * | 2007-09-20 | 2009-03-26 | Briere Michael A | Enhancement mode iii-nitride semiconductor device with reduced electric field between the gate and the drain |
| CN101414635A (en) * | 2008-12-01 | 2009-04-22 | 西安电子科技大学 | Groove insulated gate type gate-leakage composite field plate power device and preparation method thereof |
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| CN109314135A (en) * | 2016-07-01 | 2019-02-05 | 英特尔公司 | Grid pile stack for GaN E mode transistor performance designs |
| CN109314135B (en) * | 2016-07-01 | 2023-03-10 | 英特尔公司 | Gate stack design for GaN E-mode transistor performance |
| CN109166936A (en) * | 2018-08-09 | 2019-01-08 | 镇江镓芯光电科技有限公司 | A kind of high resistant AlGaN base photoconductive switching device and preparation method thereof |
| CN113540231A (en) * | 2021-06-15 | 2021-10-22 | 西安电子科技大学 | P-GaN high electron mobility transistor based on in-situ growth MIS structure and preparation method |
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