CN112038415A - Schottky diode based on double-step inclined plane and manufacturing method thereof - Google Patents
Schottky diode based on double-step inclined plane and manufacturing method thereof Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 18
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 claims abstract description 55
- 229910052751 metal Inorganic materials 0.000 claims abstract description 42
- 239000002184 metal Substances 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 239000010408 film Substances 0.000 claims abstract description 20
- 230000005684 electric field Effects 0.000 claims abstract description 18
- 230000015556 catabolic process Effects 0.000 claims abstract description 16
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 13
- 239000011737 fluorine Substances 0.000 claims abstract description 13
- -1 fluorine ions Chemical class 0.000 claims abstract description 10
- 239000010409 thin film Substances 0.000 claims abstract description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 30
- 238000004140 cleaning Methods 0.000 claims description 24
- 239000008367 deionised water Substances 0.000 claims description 24
- 229910021641 deionized water Inorganic materials 0.000 claims description 24
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 24
- 238000001259 photo etching Methods 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 20
- 239000007789 gas Substances 0.000 claims description 16
- 238000001020 plasma etching Methods 0.000 claims description 16
- 229910052757 nitrogen Inorganic materials 0.000 claims description 15
- 229920002120 photoresistant polymer Polymers 0.000 claims description 15
- 238000001035 drying Methods 0.000 claims description 14
- 238000001704 evaporation Methods 0.000 claims description 9
- 238000005406 washing Methods 0.000 claims description 8
- 238000005566 electron beam evaporation Methods 0.000 claims description 7
- 239000003960 organic solvent Substances 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 6
- 238000002360 preparation method Methods 0.000 claims description 6
- 229910015844 BCl3 Inorganic materials 0.000 claims description 5
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 5
- 238000009832 plasma treatment Methods 0.000 claims description 5
- 238000004151 rapid thermal annealing Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 3
- 238000000407 epitaxy Methods 0.000 claims description 2
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims 2
- 239000000463 material Substances 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 8
- 238000009826 distribution Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000008020 evaporation Effects 0.000 description 2
- 241001354791 Baliga Species 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 201000010099 disease Diseases 0.000 description 1
- 208000037265 diseases, disorders, signs and symptoms Diseases 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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Abstract
The invention discloses a Schottky diode based on a double-step inclined plane, which mainly solves the problem that the breakdown voltage of the conventional Schottky diode device is low. It includes: ohmic contact metal Au layer, ohmic contact metal Ti layer and highly doped n-type Ga2O3Substrate and low doped n-type Ga2O3Thin film of low doped n-type Ga2O3Two steps of inclined planes are respectively engraved on two sides of the film, the inclination angle and the height ratio of each step of inclined plane are both 1:1, the ratio of the width of the second step of inclined plane to the width of the first step of inclined plane is 5:3, and fluorine ions are injected into the two steps of inclined planes; the second step inclined plane is sequentially provided with a Schottky electrode Ni layer and a Schottky electrode from bottom to topAnd an Au layer. The invention can ensure that the electric field intensity at the edge of the Schottky electrode can be uniformly distributed on a plurality of three-dimensional structures, and the low-doped Ga below the periphery of the anode can be partially depleted2O3The electrons of the epitaxial layer effectively improve the breakdown voltage and can be used as a power device and a high-voltage switch device.
Description
Technical Field
The invention belongs to the technical field of microelectronic devices, and particularly relates to a Schottky diode which can be used as a power device and a high-voltage switch device.
Background
With the rapid development of technological innovation, important fields such as power electronics, military equipment, communication, motor control, aerospace and the like have higher requirements on the performance of semiconductor components. Under the circumstances, the conventional silicon-based and other narrow bandgap semiconductor diodes have complex preparation processes, high preparation costs and insufficient breakdown voltage, which is one of the key factors influencing the further improvement of device performance. In order to solve these problems, it is necessary to study new semiconductor materials and devices with a view to the future. Ga in comparison with other semiconductor materials2O3Has a plurality of advantages of unique thickness. Ga2O3Compared with the third generation semiconductor material represented by SiC and GaN, the material has wider forbidden band width of 4.8-4.9 ev. The breakdown field strength is 7-8mv/cm, which is equivalent to more than 20 times of Si and more than 2 times of SiC and GaN. Theoretically speaking, the method is suitable for the treatment of the diseases of the human bodyWhen a diode device with the same withstand voltage is manufactured, the on-resistance of the device can be reduced to 1/10 for SiC, 1/3 for GaN, and Ga2O3The Baliga figure of merit of the material is much higher than that of the other materials, so that Ga2O3The semiconductor material is a wide bandgap semiconductor material with excellent performance and suitable for preparing power devices and high-voltage switching devices. It also has excellent optical performance and stable physical and chemical properties, and is suitable for preparing semiconductor devices with different purposes.
Conventional Ga2O3As shown in fig. 1, the schottky diode includes, from bottom to top: ohmic contact metal Au layer 1, ohmic contact metal Ti layer 2 and highly doped n-type Ga2O3Substrate 3 and low doped n-type Ga2O3The thin film 4, the Schottky electrode Ni layer 7 and the Schottky electrode Au layer 8 are adopted, and the breakdown voltage of the diode with the structure is 40V and is far lower than the expected value of the material.
To increase Ga2O3The performance of schottky diode devices must be improved by increasing the breakdown voltage of the device in the reverse off state, while Ga2O3The breakdown of the diode device mainly occurs at the edge terminal of the schottky junction where the electric field distribution is concentrated, so to increase the breakdown voltage of the device, the electric field at the schottky junction must be redistributed, and for this reason, researchers have proposed a schottky diode device using a single step slope structure, as shown in fig. 2. It includes from bottom to top: ohmic contact metal Au layer 1, ohmic contact metal Ti layer 2 and highly doped n-type Ga2O3Substrate 3 and low doped n-type Ga2O3Film 4, low doped n-type Ga2O3The thin film is etched with a step slope 6 and injected with fluorine ions, the step slope 6 is provided with a Schottky electrode Ni layer 7 and a Schottky electrode Au layer 8, although the diode with the structure has obvious great improvement on the breakdown voltage, the structure can only optimize the electric field intensity distribution of the device on the Schottky contact edge on two three-dimensional structures, so that the breakdown voltage is still not high enough, and the Ga is limited2O3The application of the Schottky diode in a high-voltage high-power device.
Disclosure of Invention
The present invention is directed to the conventional Ga2O3The defects of the Schottky diode are that the Schottky diode based on the double-step inclined plane and the manufacturing method thereof are provided, so that the electric field intensity of the device at the Schottky contact edge is uniformly distributed on a plurality of three-dimensional structures by adopting two step inclined plane structures and injecting fluorine ions, the sharp and concentrated distribution of the electric field intensity born at the Schottky contact edge along with the increase of voltage is avoided when the Schottky diode is turned off reversely, and the breakdown voltage is further improved.
The technical scheme of the invention is realized as follows:
1. the utility model provides a schottky diode based on double step inclined plane includes from bottom to top: ohmic contact metal Au layer 1, ohmic contact metal Ti layer 2 and highly doped n-type Ga2O3Substrate 3 and low doped n-type Ga2O3Film 4, Schottky electrode Ni layer 7 and Schottky electrode Au layer 8, low doped n-type Ga2O3The both sides of film 4 are carved with the step inclined plane, its characterized in that:
the step inclined planes are arranged in two stages, namely a first step inclined plane 5 and a second step inclined plane 6, the inclination angle and the height ratio of the two inclined planes are both 1:1, the ratio of the width of the table top of the second step inclined plane 6 to the width of the table top of the first step inclined plane 5 is 5:3, and therefore the electric field intensity of the edge of the Schottky electrode is uniformly distributed on a plurality of three-dimensional structures.
Both of the two step slopes 5, 6 are implanted with fluoride ions to partially deplete the low-doped Ga around the anode below the periphery2O3Electrons in the epitaxial layer 4 reduce the electric field intensity at the edge of the schottky contact, thereby further improving the breakdown voltage of the device.
Further, the highly doped n-type Ga2O3The substrate 3 has an electron concentration of 1018cm-3-1019cm-3(ii) a The low doped n-type Ga2O3The carrier concentration of the thin film 4 is 1016cm-3-1017cm-3And the thickness is more than 3 mu m.
Further, the height of the first step inclined plane 5 is 1-1.5 μm, the width of the table top is 450-900 nm, and the inclination angle is 40-60 degrees; the height of the second step inclined plane 6 is 1-1.5 μm, the width of the table top is 500nm-2 μm, and the inclination angle is the same as that of the first step inclined plane.
Further, the thickness of the ohmic contact electrode Au layer 1 is 100nm-200 nm; the thickness of the ohmic contact electrode Ti layer 2 is 20nm-50 nm.
Further, the thickness of the Schottky contact electrode Ni layer 7 is 20nm-50 nm; the thickness of the Schottky contact electrode Au layer 8 is 100nm-200 nm.
2. A Schottky diode preparation method based on a double-step inclined plane is characterized in that: comprises the following steps:
1) for electron concentration of 1018cm-3-1019cm-3Highly doped n-type Ga of2O3Standard cleaning is carried out on the substrate;
2) putting the cleaned substrate into an MOCVD reaction chamber, setting the growth temperature to 800-2The flow rate is 350sccm, the growth pressure is 220Pa, the epitaxial growth thickness is 3-4 μm, and the carrier concentration is 1016cm-3-1017cm-3Low doped n-type Ga of2O3A film;
3) placing the substrate after the epitaxy into an electron beam evaporation table at Ga2O3Evaporating metal Ti/Au on the back of the substrate, wherein the thickness of Ti is 20-50nm, the thickness of Au is 100-200nm, and then N2Carrying out rapid thermal annealing at the temperature of 500 ℃ for 80s in the environment to form a sample of an ohmic contact electrode;
4) cleaning a sample of the ohmic contact electrode with an organic solvent and deionized water in sequence, and then adding HF H2Corroding the solution with the ratio of O to 1:1 for 30-60s, cleaning the solution with flowing deionized water, and drying the solution with high-purity nitrogen;
5) photoetching the cleaned sample, putting the sample into plasma etching equipment, and setting BCl3Gas flow of 70sccm, Ar2The gas flow rate of (1) is 30sccm, the pressure of the reaction chamber is 28mT, the radio frequency power is 150W, and the low-doped n-type Ga2O3Upper etching depth of 1Mum-1.5μm, mesa width 500nm-2μm, second step inclined plane with inclination angle of 40-60 degree, organic solvent and deionized water cleaning, placing HF H2Corroding the product in a solution with the ratio of O to 1:1 for 30-60s, finally cleaning the product by using flowing deionized water and drying the product by using high-purity nitrogen;
6) photoetching the cleaned sample, placing the cleaned sample into the same plasma etching machine equipment as 5), etching a first step inclined plane with the depth of 1-1.5 mu m, the width of a table top of 450nm-1 mu m and the inclination angle of 40-60 degrees, cleaning the sample by using an organic solvent and deionized water, and placing HF H2Corroding the product in a solution with the ratio of O to 1:1 for 30-60s, finally cleaning the product by using flowing deionized water and drying the product by using high-purity nitrogen;
7) in the low doped n-type Ga2O3Coating photoresist on the Schottky electrode, and photoetching to obtain a window of the Schottky electrode;
8) putting the photoetched sample into an electron beam evaporation table, and placing the sample in a low-doped n-type Ga2O3Evaporating and depositing metal Ni/Au, wherein the thickness of the metal Ni is 20-50nm, and the thickness of the metal Au is 100-200 nm;
9) removing the photoresist and the metal on the photoresist from the deposited sample to form a Schottky contact electrode, and obtaining a double-step inclined-plane Schottky diode;
10) placing the Schottky diode with the double-step inclined surface into a cavity of an RIE system, and taking CF as a reference4The gas environment was subjected to a 200-300s self-aligned fluorine plasma treatment at 200W RF source power to partially deplete the low-doped Ga beneath the anode periphery2O3The electrons of the epitaxial layer 4 reduce the electric field intensity of the Schottky contact edge, improve the breakdown voltage of the device, and thus the whole manufacturing process of the double-step inclined plane Schottky diode is completed.
Compared with the prior art, the invention has the following advantages:
1. because the invention is provided with two inclined-plane steps with the same inclination angle, compared with the common Schottky diode with one step inclined plane, the invention further improves the distribution of the edge electric field intensity of the Schottky electrode; compared with a metal ring with a planar structure, the metal ring with the planar structure has an inclined-plane step structure with a plurality of inclined angles, so that the electric field intensity at the edge of the Schottky electrode can be uniformly distributed on a plurality of three-dimensional structures.
2. The invention can partially exhaust the low-doped Ga below the periphery of the anode due to the fluorine ions injected into the two step slopes2O3The electrons of the epitaxial layer reduce the electric field intensity of the Schottky contact edge, so that the breakdown voltage of the device is further improved.
3. The invention carries out photoetching and metal deposition forming on the epitaxial layer for two times, and has simple and stable preparation process and good repeatability.
Drawings
Fig. 1 is a schematic structural diagram of a conventional schottky diode;
FIG. 2 is a schematic diagram of a conventional single step slope Schottky diode structure;
FIG. 3 is a schematic diagram of a Schottky diode structure with a double step slope according to the present invention;
fig. 4 is a schematic flow chart of an implementation of the present invention for manufacturing the device of fig. 3.
Detailed description of the invention
Embodiments of the present invention are described in further detail below with reference to the accompanying drawings.
Referring to fig. 3, the schottky diode based on the double-step inclined plane of the present invention comprises an ohmic contact metal Au layer 1, an ohmic contact metal Ti layer 2, and a highly doped n-type Ga from bottom to top2O3Substrate 3 and low doped n-type Ga2O3Film 4, low doped n-type Ga2O3Two sides of the film 4 are respectively engraved with two-stage step slopes, namely a first step slope 5 and a second step slope 6, the inclination angle and the height ratio of the two-stage slopes on each side are 1:1, the ratio of the width of the table top of the second step slope 6 to the width of the table top of the first step slope 5 is 5:3, the two-stage step slopes 5 and 6 are both injected with fluorine ions, and a Schottky electrode Ni layer 7 and a Schottky electrode Au layer 8 are sequentially arranged on the table top of the second step slope 6 from bottom to top.
The thickness of the ohmic contact Au metal layer 1 is 100nm-200nm, and the thickness of the ohmic contact electrode Ti metal layer 2 is 20nm-50 nm;
the highly doped n-type Ga2O3The substrate 3 has an electron concentration of 1018cm-3-1019cm-3。
The low doped n-type Ga2O3The carrier concentration of the thin film 4 is 1016cm-3-1017cm-3And the thickness is more than 3 mu m.
The low doped n-type Ga2O3The height of the first step inclined plane 5 is 1-1.5 μm, the width of the table top is 450-900 nm, and the inclination angle is 40-60 degrees; the height position of the second step inclined plane 6 is 1-1.5 μm, the width of the table top is 500nm-2 μm, and the inclination angle is the same as that of the first step inclined plane 5.
The thickness of the Schottky electrode Ni layer 7 is 20nm-50nm, and the thickness of the Schottky electrode Au layer 8 is 100nm-200 nm.
Referring to fig. 4, the method for manufacturing the schottky diode with the double-step inclined-plane termination structure provides the following three embodiments:
example 1 preparation of lowly doped n-type Ga2O3The depth of the two step slopes is 1 μm, the inclination angle is 40 °, the width of the mesa of the first step slope is 900nm, and the depth of the step of the second step slope is 1.5 μm.
1a) Highly doped n-type Ga2O3Cleaning the substrate in 80 deg.C organic cleaning solution for 20 min;
1b) cleaning the substrate subjected to organic cleaning for 40s by using flowing deionized water;
1c) putting the cleaned substrate into HF H2Etching in the solution with O being 1:1 for 60 s;
1d) ga after etching2O3The substrate was rinsed with flowing deionized water for 60 seconds and blown dry with high purity nitrogen.
Step 2, epitaxially growing low-doped n-type Ga2O3Film, fig. 4 (b).
Putting the cleaned substrate into a metal organicIn a chemical vapor deposition MOCVD reaction chamber, trimethyl gallium TMGa and high-purity O are respectively used2The temperature of the reaction chamber is set to be 800 ℃, the growth pressure is set to be 220Pa, the TMGa flow is set to be 10ccm, and O is used as a Ga source and an O source2The flow rate is 350sccm, the epitaxial growth thickness on the substrate is 3 μm, and the carrier concentration is 5 × 1016cm-3Low doped n-type Ga of2O3A film.
And step 3, epitaxial cleaning.
Epitaxially growing lightly doped n-type Ga2O3Cleaning a substrate of the film with an organic solvent and deionized water in sequence, and then putting the substrate into a reactor with a volume ratio of HF to H2Etching the solution with O-1: 1 for 50s, finally washing the solution with flowing deionized water and drying the solution with high-purity nitrogen.
And 4, manufacturing an ohmic contact electrode as shown in fig. 4 (c).
4a) Highly doped n-type Ga after epitaxial growth2O3Evaporating metal Ti/Au on the back of the substrate, wherein the thickness of Ti is 20nm, and the thickness of Au is 100 nm;
4b) in N2And performing rapid thermal annealing at 500 ℃ for 80s in the environment to form a sample of the ohmic contact electrode.
Step 5, plasma etching the second step slope, as shown in fig. 4 (d).
For low doped n-type Ga2O3Photoetching the epitaxial layer, putting the epitaxial layer into plasma etching equipment after photoetching, and setting BCl3Gas flow of 70sccm, Ar2The gas flow rate is 30sccm, the pressure in the reaction chamber is 28mT, the radio frequency power is 150W, the etching angle is adjusted to be 40 degrees, and the low-doped n-type Ga is doped2O3And a second step inclined plane with the depth of 1 mu m, the width of the table top of 1.5 mu m and the inclination angle of 40 degrees is etched on the film.
Step 6, putting the sample subjected to the step 5 into a reactor with a volume ratio of HF to H2Etching the solution with O-1: 1 for 50s, finally washing the solution with flowing deionized water and drying the solution with high-purity nitrogen.
Step 7, plasma etching the first step slope, as shown in fig. 4 (e).
For Ga after step 62O3And photoetching the epitaxial layer, and then putting the epitaxial layer into the same plasma etching machine equipment as the step 5 to etch a first step inclined plane with the slope mesa depth of 1 mu m, the mesa width of 900nm and the inclination angle of 40 degrees.
Step 8, putting the sample subjected to the step 7 into a reactor with a volume ratio of HF to H2Etching the solution with O-1: 1 for 50s, finally washing the solution with flowing deionized water and drying the solution with high-purity nitrogen.
Step 9, manufacturing a schottky contact electrode as shown in fig. 4 (f).
9a) After step 8, low doped n-type Ga2O3Coating photoresist on the second step slope, and photoetching to obtain a window of the Schottky electrode;
9b) placing the photoetched sample into an electron beam evaporation table, and setting the vacuum degree of an electron gun to be 6.7 multiplied by 10-3Pa, preheating current of 0.6A, preheating time of 5min, electric field of 8KV, and low doping n-type Ga2O3The second step inclined plane of the substrate is evaporated and deposited with metal Ni/Au, wherein the thickness of the metal Ni is 20nm, and the thickness of the metal Au is 100 nm;
9c) and removing the photoresist and the metal on the photoresist from the deposited sample to form a Schottky contact electrode, thereby obtaining the Schottky diode with the double-step inclined surface.
Step 10, implanting fluorine ions to complete the fabrication, as shown in fig. 4 (g).
Placing the Schottky diode with the double-step slope structure into a cavity of an RIE system, and taking CF as a reference4The gas environment was subjected to a 220s self-aligned fluorine plasma treatment under 200W RF source power to complete the entire process of the double step bevel schottky diode.
Example 2 production of lowly doped n-type Ga2O3The depth of each step inclined plane is 1 mu m, the inclination angle is 50 degrees, the width of the table top of the first step inclined plane is 600nm, and the depth of the step of the second step inclined plane is 1 mu m.
Step one, the electron concentration is 1 multiplied by 1019cm-3Highly doped n-type Ga of2O3The substrate is subjected to a standard clean as in fig. 4 (a).
The specific implementation of this step is the same as step 1 of example 1.
Step two, epitaxially growing low-doped n-type Ga2O3Film, fig. 4 (b).
Putting the cleaned substrate into an MOCVD reaction chamber, and adding TMGa and high-purity O respectively2Setting the temperature of a reaction chamber to be 850 ℃, the growth pressure to be 220Pa, the TMGa flow to be 10sccm and O as a Ga source and an O source2The flow rate is 350sccm, the epitaxial growth thickness on the substrate is 3.2 μm, and the carrier concentration is 8 × 1016cm-3Low doped n-type Ga of2O3A film.
And step three, epitaxial cleaning.
The specific implementation of this step is the same as step 3 of example 1.
And step four, manufacturing an ohmic contact electrode, as shown in fig. 4 (c).
4.1) highly doped n-type Ga after epitaxial growth2O3Evaporating metal Ti/Au on the back of the substrate, wherein the thickness of Ti is 25nm, and the thickness of Au is 120 nm;
4.2) in N2And performing rapid thermal annealing at 500 ℃ for 80s in the environment to form a sample of the ohmic contact electrode.
And step five, etching the second step inclined surface by plasma, as shown in figure 4 (d).
For low doped n-type Ga2O3Photoetching the epitaxial layer, putting the epitaxial layer into plasma etching equipment after photoetching, and setting BCl3Gas flow of 70sccm, Ar2The gas flow rate is 30sccm, the pressure in the reaction chamber is 28mT, the radio frequency power is 150W, the etching angle is adjusted to be 50 degrees, and the low-doped n-type Ga is doped2O3And a second step inclined plane with the depth of 1 mu m, the width of the table top of 1 mu m and the inclination angle of 50 degrees is etched on the film.
Step six, putting the sample subjected to the step five into a reactor with the volume ratio of HF to H2Etching the solution with O-1: 1 for 50s, finally washing the solution with flowing deionized water and drying the solution with high-purity nitrogen.
Step seven, plasma etching the first step inclined plane, as shown in fig. 4 (e).
To the step ofGa of six2O3And photoetching the epitaxial layer, wherein photoetching and etching conditions are the same as those in the step five, and etching a first step inclined plane with the slope mesa depth of 1 mu m, the mesa width of 600nm and the inclination angle of 50 degrees.
Step eight, putting the sample subjected to the step seven into a reactor with the volume ratio of HF to H2Etching the solution with O-1: 1 for 50s, finally washing the solution with flowing deionized water and drying the solution with high-purity nitrogen.
Step nine, manufacturing a schottky contact electrode as shown in fig. 4 (f).
9.1) Low-doped n-type Ga after step eight2O3Coating photoresist on the second step slope, and photoetching to obtain a window of the Schottky electrode;
9.2) placing the photoetched sample into an electron beam evaporation table, and setting the vacuum degree of an electron gun to be 6.7 multiplied by 10-3Pa, preheating current of 0.6A, preheating time of 5min, electric field of 8KV, and low doping n-type Ga2O3Performing upper evaporation to deposit metal Ni/Au, wherein the thickness of the metal Ni is 30nm, and the thickness of the metal Au is 150 nm;
and 9.3) removing the photoresist and the metal on the photoresist from the deposited sample to form a Schottky contact electrode, thereby obtaining the Schottky diode with the double-step inclined plane.
Step ten, fluorine ions are injected to complete the manufacture, as shown in fig. 4 (g).
Placing the Schottky diode with the double-step slope structure into a cavity of an RIE system, and taking CF as a reference4The gas environment was subjected to a 240s self-aligned fluorine plasma treatment under 200W RF source power to complete the entire process of the double step bevel schottky diode.
Example A production of lightly doped n-type Ga2O3The depth of each step inclined plane is 1 mu m, the inclination angles are 60 degrees, the width of the table top of the first step inclined plane is 480nm, and the depth of the step of the second step inclined plane is 800 nm.
A1) For electron concentration of 5X 1019cm-3Highly doped n-type Ga of2O3The substrate is subjected to a standard clean as in fig. 4 (a).
The specific implementation of this step is the same as step 1 of example 1.
A2) Epitaxially growing low doped n-type Ga2O3Film, fig. 4 (b).
Putting the cleaned substrate into an MOCVD reaction chamber, and adding TMGa and high-purity O respectively2Setting the temperature of a reaction chamber to be 900 ℃, the growth pressure to be 220Pa, the TMGa flow to be 10sccm and O for a Ga source and an O source2The flow rate is 350sccm, the epitaxial growth thickness on the substrate is 3.5 μm, and the carrier concentration is 3 × 1017cm-3Low doped n-type Ga of2O3A film.
A3) And (5) epitaxial cleaning.
The specific implementation of this step is the same as step 3 of example 1.
A4) An ohmic contact electrode is formed as shown in fig. 4 (c).
Highly doped n-type Ga after epitaxial growth2O3Evaporating metal Ti/Au on the back of the substrate, wherein the thickness of Ti is 30nm, and the thickness of Au is 200 nm; then N is added2And performing rapid thermal annealing at 500 ℃ for 80s in the environment to form a sample of the ohmic contact electrode.
A5) The plasma etches the second step bevel, as in fig. 4 (d).
For low doped n-type Ga2O3Photoetching the epitaxial layer, putting the epitaxial layer into plasma etching equipment after photoetching, and setting BCl3Gas flow of 70sccm, Ar2The gas flow rate of the gas is 30sccm, the pressure of the reaction chamber is 28mT, the radio frequency power is 150W, the etching angle is adjusted to be 60 degrees, and the low-doped n-type Ga is doped2O3And a second step inclined plane with the depth of 1 mu m, the width of the table top of 800nm and the inclination angle of 60 degrees is etched on the film.
A6) Placing the sample subjected to A5) into a reactor with a volume ratio of HF to H2Etching the solution with O-1: 1 for 50s, finally washing the solution with flowing deionized water and drying the solution with high-purity nitrogen.
A7) The plasma etches the first step slope as in fig. 4 (e).
For Ga in step A6)2O3Photoetching, photoetching and etching conditions are carried out on the epitaxial layer, and the step A5) Similarly, a first step inclined plane with the slope mesa depth of 1 μm, the mesa width of 480nm and the inclination angle of 60 degrees is etched.
A8) Placing the sample subjected to A7) into a reactor with a volume ratio of HF to H2Etching the solution with O-1: 1 for 50s, finally washing the solution with flowing deionized water and drying the solution with high-purity nitrogen.
A9) Schottky contact electrodes are fabricated as shown in fig. 4 (f).
After A8 is carried out, low-doped n-type Ga2O3Coating photoresist on the second step slope, and photoetching to obtain a window of the Schottky electrode; then the photoetched sample is put into an electron beam evaporation table, and the vacuum degree of an electron gun is set to be 6.7 multiplied by 10-3Pa, preheating current of 0.6A, preheating time of 5min, electric field of 8KV, and low doping n-type Ga2O3Performing upper evaporation deposition on metal Ni/Au, wherein the thickness of the metal Ni is 40nm, and the thickness of the metal Au is 200 nm;
and removing the photoresist and the metal on the photoresist from the deposited sample to form a Schottky contact electrode, thereby obtaining the Schottky diode with the double-step inclined surface.
A10) Fluorine ions are implanted to complete the fabrication, as shown in fig. 4 (g).
Placing the Schottky diode with the double-step slope structure into a cavity of an RIE system, and taking CF as a reference4The gas environment was subjected to a self-aligned fluorine plasma treatment for 260 seconds at 200W RF source power to complete the entire fabrication process of the double step bevel schottky diode.
The above detailed description is only three examples of the present invention and should not be construed as limiting the present invention, and it should be understood by those skilled in the art that the device structure of the present invention can be modified without departing from the spirit of the present invention, and the manufacturing method thereof is not limited to the above disclosure, and all equivalent changes and modifications made by the claims of the present invention shall fall within the scope of the present invention.
Claims (10)
1. The utility model provides a schottky diode based on double step inclined plane includes from bottom to top: ohmic contact metal Au layer (1), ohmic contact metal Ti layer (2), and high doped nForm Ga2O3Substrate (3) and low doped n-type Ga2O3A thin film (4), a Schottky electrode Ni layer (7), a Schottky electrode Au layer (8), and low-doped n-type Ga2O3The both sides of film (4) are carved with the step inclined plane, its characterized in that:
the step inclined planes are arranged in two stages, namely a first step inclined plane (5) and a second step inclined plane (6), the inclination angle and the height ratio of the two inclined planes are both 1:1, the ratio of the width of the table top of the second step inclined plane (6) to the width of the table top of the first step inclined plane (5) is 5:3, so that the electric field intensity at the edge of the Schottky electrode is uniformly distributed on a plurality of three-dimensional structures;
both of the two step slopes (5, 6) are implanted with fluoride ions to partially deplete the low-doped Ga around the anode below the periphery2O3Electrons in the epitaxial layer (4) reduce the electric field intensity at the edge of the Schottky contact, and the breakdown voltage of the device is further improved.
2. The diode of claim 1, wherein: highly doped n-type Ga2O3The substrate (3) has an electron concentration of 1018cm-3-1019cm-3。
3. The diode of claim 1, wherein: low doped n-type Ga2O3The carrier concentration of the film (4) is 1016cm-3-1017cm-3And the thickness is more than 3 mu m.
4. The diode of claim 1, wherein:
the height of the first step inclined plane (5) is 1-1.5 μm, the width of the table top is 450-900 nm, and the inclination angle is 40-60 degrees;
the height of the second step inclined plane (6) is 1-1.5 μm, the width of the table top is 500nm-2 μm, and the inclination angle is the same as that of the first step inclined plane.
5. The diode of claim 1, wherein: the thickness of the ohmic contact electrode Au layer (1) is 100nm-200 nm.
6. The diode of claim 1, wherein: the thickness of the ohmic contact electrode Ti layer (2) is 20nm-50 nm.
7. The diode of claim 1, wherein: the thickness of the Schottky contact electrode Ni layer (7) is 20nm-50 nm.
8. The diode of claim 1, wherein: the thickness of the Schottky contact electrode Au layer (8) is 100nm-200 nm.
9. A Schottky diode preparation method based on a double-step inclined plane is characterized in that: comprises the following steps:
1) for electron concentration of 1018cm-3-1019cm-3Highly doped n-type Ga of2O3Standard cleaning is carried out on the substrate;
2) putting the cleaned substrate into an MOCVD reaction chamber, setting the growth temperature to 800-2The flow rate is 350sccm, the growth pressure is 220Pa, the epitaxial growth thickness is 3-4 μm, and the carrier concentration is 1016cm-3-1017cm-3Low doped n-type Ga of2O3A film;
3) placing the substrate after the epitaxy into an electron beam evaporation table at Ga2O3Evaporating metal Ti/Au on the back of the substrate, wherein the thickness of Ti is 20-50nm, the thickness of Au is 100-200nm, and then N2Carrying out rapid thermal annealing at the temperature of 500 ℃ for 80s in the environment to form a sample of an ohmic contact electrode;
4) cleaning a sample of the ohmic contact electrode with an organic solvent and deionized water in sequence, and then adding HF H2Corroding the solution with the ratio of O to 1:1 for 30-60s, cleaning the solution with flowing deionized water, and drying the solution with high-purity nitrogen;
5) photoetching the cleaned sample, putting the sample into plasma etching equipment, and setting BCl3Gas flow of 70sccm, Ar2The gas flow rate of (1) is 30sccm, the pressure of the reaction chamber is 28mT, the radio frequency power is 150W, and the low-doped n-type Ga2O3Etching to form a second step inclined plane with depth of 1-1.5 μm, mesa width of 500nm-2 μm and inclination angle of 40-60 deg, cleaning with organic solvent and deionized water, and adding HF H2Corroding the product in a solution with the ratio of O to 1:1 for 30-60s, finally cleaning the product by using flowing deionized water and drying the product by using high-purity nitrogen;
6) photoetching the cleaned sample, placing the cleaned sample into the same plasma etching machine equipment as 5), etching a first step inclined plane with the depth of 1-1.5 mu m, the width of a table top of 450nm-1 mu m and the inclination angle of 40-60 degrees, cleaning the sample by using an organic solvent and deionized water, and placing HF H2Corroding the product in a solution with the ratio of O to 1:1 for 30-60s, finally cleaning the product by using flowing deionized water and drying the product by using high-purity nitrogen;
7) in the low doped n-type Ga2O3Coating photoresist on the second step inclined plane, and photoetching to obtain a window of the Schottky electrode;
8) putting the photoetched sample into an electron beam evaporation table, and placing the sample in a low-doped n-type Ga2O3Evaporating and depositing metal Ni/Au, wherein the thickness of the metal Ni is 20-50nm, and the thickness of the metal Au is 100-200 nm;
9) removing the photoresist and the metal on the photoresist from the deposited sample to form a Schottky contact electrode, and obtaining a double-step inclined-plane Schottky diode;
10) placing the Schottky diode with the double-step inclined surface into a cavity of an RIE system, and taking CF as a reference4The gas environment was subjected to a 200-300s self-aligned fluorine plasma treatment at 200W RF source power to partially deplete the low-doped Ga beneath the anode periphery2O3The electrons of the epitaxial layer (4) reduce the electric field intensity of the Schottky contact edge, improve the breakdown voltage of the device, and thus the whole manufacturing process of the double-step inclined plane Schottky diode is completed.
10. The method according to claim 9, wherein 1) highly doped n-type Ga is doped2O3The substrate was subjected to standard cleaning, which was achieved as follows:
1a) highly doped n-type Ga2O3The substrate is firstly subjected to organic cleaning in acetone or ethanol solution and then cleaned by flowing deionized water;
1b) placing the cleaned substrate in HF H2Corroding the solution with the O-1: 1 for 30-60s, washing the solution with flowing deionized water, and drying the solution with high-purity nitrogen.
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| CN114203556A (en) * | 2021-12-08 | 2022-03-18 | 中山大学 | Method for regulating and controlling conductivity of gallium oxide semiconductor surface layer and semiconductor wafer |
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