CN113568232B - Pixel unit, array substrate, driving method, liquid crystal panel and liquid crystal display screen - Google Patents

Pixel unit, array substrate, driving method, liquid crystal panel and liquid crystal display screen Download PDF

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CN113568232B
CN113568232B CN202111133387.4A CN202111133387A CN113568232B CN 113568232 B CN113568232 B CN 113568232B CN 202111133387 A CN202111133387 A CN 202111133387A CN 113568232 B CN113568232 B CN 113568232B
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driving
signal
liquid crystal
tft2
lines
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CN113568232A (en
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万波
李景正
廖炳隆
邢妍
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Nanning Chuxin Integrated Circuit Design Co.,Ltd.
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Nanjing Chuxin Integrated Circuit Co ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Abstract

The invention provides a pixel unit, an array substrate, a driving method, a liquid crystal panel and a liquid crystal display screen, wherein the pixel unit comprises: TFT1, TFT2, drive wire and liquid crystal equivalent holding capacitance; the source electrode of the TFT1 is connected with a signal line of the array substrate, the Gate electrode of the TFT1 is connected with a Gate scanning line of the array substrate, the drain electrode of the TFT1 is connected with the source electrode of the TFT2, the Gate electrode of the TFT2 is connected with a driving wire, and the drain electrode of the TFT2 is connected with a liquid crystal equivalent holding capacitor; if receiving the first driving signal, the liquid crystal display is in a conducting state, and data are input into the liquid crystal equivalent holding capacitor; and if the second driving signal is received, the liquid crystal display is in an off state, and data cannot be input into the liquid crystal equivalent holding capacitor. Through the mode, the energy consumption can be saved.

Description

Pixel unit, array substrate, driving method, liquid crystal panel and liquid crystal display screen
Technical Field
The invention relates to the technical field of display, in particular to a pixel unit, an array substrate, a driving method, a liquid crystal panel and a liquid crystal display screen.
Background
With the development of science and technology, Thin Film Transistor Liquid Crystal displays (TFT-LCDs for short) are increasingly widely used in the Display fields of Liquid Crystal televisions, notebook computers, mobile phones, video cameras, vehicle-mounted Display screens and the like due to their advantages of lightness, thinness, high resolution, high response speed and the like.
However, the power consumption of the display panel accounts for a large proportion of the electronic devices such as the mobile phone, and in order to obtain a better display effect, the refresh rate of the TFT-LCD is required to be higher and higher by the electronic devices such as the mobile phone, which further increases the power consumption.
Therefore, how to reduce the power consumption of the TFT-LCD is a technical problem to be solved.
Disclosure of Invention
In view of the above, the present invention provides a pixel unit, an array substrate, a driving method, a liquid crystal panel and a liquid crystal display panel, which are used to solve the technical problem of how to reduce the power consumption of a TFT-LCD.
In order to solve the above technical problem, in a first aspect, an embodiment of the present invention provides a pixel unit based on a dual thin film transistor TFT, including:
a first thin film transistor TFT1, a second thin film transistor TFT2, a driving wire, and a liquid crystal equivalent holding capacitance; the source of the TFT1 is connected to a signal line of the array substrate, the Gate of the TFT1 is connected to a Gate scan line of the array substrate, the drain of the TFT1 is connected to the source of the TFT2, the Gate of the TFT2 is connected to the driving wire, and the drain of the TFT2 is connected to the equivalent liquid crystal holding capacitor;
the driving wire is used for transmitting a first driving signal for controlling the TFT2 to be switched on and a second driving signal for controlling the TFT2 to be switched off;
the TFT1 is used for receiving data input by the signal line;
the TFT2 is configured to be in an on state when the TFT1 is in the on state and when the TFT1 receives the first driving signal, input the data into the liquid crystal equivalent holding capacitor; and if the second driving signal is received, the liquid crystal display is in an off state, and the data cannot be input into the liquid crystal equivalent holding capacitor.
In a second aspect, an embodiment of the present invention further provides a thin film transistor TFT array substrate, including:
the substrate comprises a substrate base plate, a plurality of Gate scanning lines and a plurality of signal lines, wherein the Gate scanning lines are arranged in parallel in the horizontal direction, the signal lines are arranged in parallel in the vertical direction, and the Gate scanning lines and the signal lines are intersected to form a plurality of intersection regions;
and the pixel unit is arranged in each crossing area and is the pixel unit.
In a third aspect, an embodiment of the present invention further provides a driving method applied to the TFT array substrate, including:
the TFT2 in the pixel unit receives a driving signal transmitted by a driving wire connected with the TFT2, and controls the gate of the TFT2 to be enabled or disconnected according to the received driving signal.
In a fourth aspect, an embodiment of the present invention further provides a driving method applied to the TFT array substrate, including:
the gates of the TFTs 2 of all the pixel units in each signal line group receive the driving signals sent by the first divisional driving lines corresponding to the signal line group through the respective driving wires;
if the received driving signal is the first driving signal, controlling the gate of the TFT2 of all the pixel units in the signal line group to be enabled, and turning on the source and the drain of the TFT 2; if the second driving signal is the second driving signal, the gates of the TFTs 2 of all the pixel units in the signal line group are controlled to be turned off, and the source and the drain of the TFT2 are controlled to be turned off.
In a fifth aspect, an embodiment of the present invention further provides a liquid crystal panel, including the array substrate.
In a sixth aspect, an embodiment of the present invention further provides a liquid crystal display, including the liquid crystal panel.
The invention has the beneficial effects that: different from the prior art, the TFT2 is additionally arranged in the control pixel unit, so that when the TFT2 is in an off state, even if data is input into the pixel unit through a signal line, the data cannot be written into the liquid crystal equivalent holding capacitor, the power consumption of one-time writing operation is saved, and the purpose of reducing the energy consumption is achieved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic circuit diagram of a TFT array substrate in the prior art;
FIG. 2 is a schematic circuit diagram of a pixel unit in the prior art;
FIG. 3 is a schematic circuit diagram of a TFT-based pixel unit according to a first embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a TFT array substrate in the prior art;
fig. 5 is a schematic structural view of a TFT array substrate according to a second embodiment of the present invention;
FIG. 6 is a schematic diagram of the partition of the display area according to the embodiment of the present invention;
FIG. 7 is a schematic view of the control of the division of the display area according to an embodiment of the present invention;
FIG. 8 is a control schematic of the column control module of TFT2 according to an embodiment of the present invention;
FIG. 9 is a control diagram of a Gate scan line output module according to an embodiment of the present invention;
fig. 10 is a schematic structural view of a part of the control TFT2 in the driver chip;
FIG. 11 is a schematic diagram of controlling the dynamic display of sub-regions made up of coordinates (50, 60) to (70, 90);
fig. 12 is a flowchart illustrating a driving method according to a third embodiment of the present invention;
fig. 13 is a flowchart illustrating a driving method according to a fourth embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention, are within the scope of the invention.
In the prior art, each pixel of the TFT-LCD is driven by a Thin Film Transistor (TFT) integrated behind it. That is, each pixel of the TFT-LCD is correspondingly provided with a TFT element which functions like a semiconductor switch, and each pixel can be directly controlled by a dot pulse, so that each pixel is relatively independent and can be continuously controlled; that is, by turning on and off the TFT element, the voltage value stored in the capacitor is updated and held, thereby displaying the content.
Referring to fig. 1-2, fig. 1 is a circuit structure diagram of a TFT array substrate in the prior art, and fig. 2 is a circuit structure diagram of a pixel unit in the prior art. In fig. 1-2, the Gate (Gate) of the TFT is connected to the Gate scan line of the array substrate, the Source (Source) is connected to the signal line of the array substrate, the Drain (Drain) is connected to the equivalent holding capacitor of the liquid crystal, the TFT is equivalent to a semiconductor switch, and the Gate and the Source are given a certain voltage, so that the TFT can be turned on and off to control the on and off of the liquid crystal. Specifically, the Gate scanning line is connected to the gates of all TFTs in the same row, and the signal line is connected to the sources of all TFTs in the same column. When the grid of the TFT is enabled, the TFT element has low impedance, and data input by the signal line is written into the liquid crystal equivalent holding capacitor; when the gate of the TFT is turned off, the TFT element becomes high impedance, and data inputted from the signal line cannot be written into the liquid crystal equivalent holding capacitance, thereby preventing the inputted data from leaking from the signal line.
Referring to fig. 3, fig. 3 is a schematic circuit diagram of a TFT-based pixel unit according to a first embodiment of the invention. The pixel unit includes: a first thin film transistor TFT1, a second thin film transistor TFT2, a driving wire, and a liquid crystal equivalent holding capacitance; the source S1 of the TFT1 is connected with a signal line of the array substrate, the Gate G1 of the TFT1 is connected with a Gate scanning line of the array substrate, the drain S1 of the TFT1 is connected with the source S2 of the TFT2, the Gate G2 of the TFT2 is connected with the driving wire, and the drain D2 of the TFT2 is connected with the liquid crystal equivalent holding capacitor;
the driving wire is used for transmitting a first driving signal for controlling the TFT2 to be switched on and a second driving signal for controlling the TFT2 to be switched off;
the TFT1 is used for receiving data input by the signal line;
the TFT2 is configured to be in an on state when the TFT1 is in the on state and when the TFT1 receives the first driving signal, input the data into the liquid crystal equivalent holding capacitor; and if the second driving signal is received, the liquid crystal display is in an off state, and the data cannot be input into the liquid crystal equivalent holding capacitor.
According to the pixel unit based on the TFT, provided by the embodiment of the invention, by additionally arranging the TFT2 in the pixel unit, when the TFT2 is in an off state, even if data is input into the pixel unit by a signal line, the data cannot be written into the liquid crystal equivalent holding capacitor, so that the power consumption of one-time writing operation is saved, and the purpose of reducing the energy consumption is achieved.
In detail, on the basis of the prior art, by adding one TFT2 to the structure of a pixel unit corresponding to one pixel point, the 2 TFTs connected in series are commonly used to control the pixel. In normal display, the Gate scan line is active, the Gate G1 of the TFT1 is enabled, and the source S1 and the drain D1 of the TFT1 are turned on. If the driving wire transmits the first driving signal to the gate G2 of the TFT2, the gate G2 of the TFT2 is enabled, and the source S2 and the drain D2 of the TFT2 are turned on, and data inputted by the signal line can be written into the liquid crystal equivalent holding capacitor through the source S1 of the TFT 1. If the driving wire transmits the second driving signal to the gate G2 of the TFT2, the gate G2 of the TFT2 is turned off, the source S2 and the drain D2 of the TFT2 are turned off, and the TFT1 is turned off from the TFT2, data input by the signal line cannot be written into the liquid crystal equivalent holding capacitor through the source S1 of the TFT1, so that power consumption for writing once is saved.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a TFT array substrate in the prior art. The array substrate in fig. 4 is the array substrate in the display panel with the resolution of 2400 x 1280.
The invention further provides a TFT array substrate, please refer to fig. 5, and fig. 5 is a schematic structural diagram of a TFT array substrate according to a second embodiment of the invention. The array substrate includes:
a substrate (not shown) on which a plurality of Gate scanning lines 501 arranged side by side in the horizontal direction and a plurality of signal lines 502 arranged side by side in the vertical direction are disposed, wherein the Gate scanning lines 501 and the signal lines 502 intersect to form a plurality of intersection regions;
a pixel unit 503 is disposed in each of the intersection regions, and the pixel unit 503 is the above-mentioned pixel unit.
In the TFT array substrate provided in the embodiment of the present invention, the pixel units in the array substrate are all the pixel units based on the dual TFTs in the first embodiment of the present invention, and when the TFT2 newly added in the pixel unit is in the off state, even if the signal line inputs data to the pixel unit, the data will not be written into the liquid crystal equivalent holding capacitor, so that power consumption of a write-once operation is saved, and the purpose of reducing power consumption is achieved.
In the above embodiment, in the dual TFT array circuit structure, the dual TFT pixel circuit is used to replace the conventional single TFT pixel circuit, and the gates of the TFTs 2 of all the pixels in the dual TFT circuit can be controlled by the corresponding TFT2 Control terminals (i.e., the connection terminals of the driving wires and the gates of the TFTs 2). As shown in fig. 5, the gates of the TFTs 2 of all pixels in a column can be controlled by one TFT2 Control terminal.
Taking 2400 × 1280 resolution shown in fig. 5 as an example, the TFTs 2 Control1 can Control the gates of all TFTs 2 in the 1 st column to be turned on or off, the TFTs 2 Control2 can Control the gates of all TFTs 2 in the 2 nd column to be turned on or off, and … …, and the TFTs 2 Control2400 can Control the gates of all TFTs 2 in the 2400 th column to be turned on or off.
During normal display, the gates 1 to 1280 are scanned at a scanning rate (e.g., 60 frames/sec), and the TFTs 2 Control1 to 2 Control2400 are all set to a high level, so that the source and drain of the TFT2 are turned on. At this time, normal input of display data through Origin source 1-Origin source2400 is not affected.
When the images are refreshed, a large number of pixel points in two adjacent images are not required to be updated, so that the technical scheme of the invention provides a regional display function. After the area display function is started, the pixels at which positions need to be updated (for example, the coordinates of the pixels needing to be updated) can be obtained by comparing the front image and the rear image, so that the control wires corresponding to the TFTs 2 of the pixel units can only output the first driving signals enabling the control gates to the gates of the TFTs 2 of the pixel units, and the control wires corresponding to the TFTs 2 of other pixel units output the second driving signals disconnecting the control gates to the gates, thereby realizing that the Gate scanning line scanning is only performed on the pixels needing to be updated, and the other pixels are not updated, and further saving energy. For example, only a small part of the area (e.g. one tenth) of the adjacent two frames of images changes, at most nine-tenth of the current switching consumption can be saved.
In the array substrate shown in fig. 5, by adding the TFT2 Control terminal and controlling the TFT2 to be turned on or off, partial refreshing of a picture can be achieved without refreshing the whole picture every time, so that the number of switching times of the TFT is greatly reduced, and the purpose of saving the TFT switching current is achieved.
However, still taking the 2400 × 1280 resolution shown in fig. 5 as an example, 2400 TFT2 Control terminals (TFT 2 Control1 to TFT2 Control 2400) need to be added to the driving circuit structure of the TFT2, and the same number of Control channels need to be added to the driving chip, which may increase the manufacturing complexity and cost, and at the same time, if the dynamic change of each pixel is controlled, the amount of computation may be increased dramatically, thereby increasing the load on the system. Single pixel control limits switching currents to three millionths, and practical application is not very necessary.
Therefore, in some preferred embodiments of the present invention, the base substrate includes X signal lines and Y Gate scan lines; the array substrate further comprises a driving chip used for sending driving signals to the pixel units, and the driving chip is provided with N first partition driving lines;
the X signal lines are divided into N groups, each signal line group comprises at least one signal line, and in each signal line group, the grid electrodes of the TFTs 2 of all the pixel units are connected with the same first partition driving line through driving wires; in the N groups of signal line groups, the first partition driving lines connected with the pixel units in each signal line group are different from the first partition driving lines connected with the pixel units in other signal line groups;
wherein X, Y is a positive integer greater than 1, and N is a positive integer.
Specifically, the X signal lines are divided into N groups, that is, by dividing the lateral direction of the display area into N segments, only N control channels (i.e., N first divisional driving lines) need to be added to the driving chip for control.
In some preferred embodiments of the present invention, the driving chip is provided with M second divisional driving lines;
the Y Gate scanning lines are divided into M groups, each Gate scanning line group comprises at least one Gate scanning line, and in each Gate scanning line group, the grid electrodes of the TFTs 1 of all the pixel units are connected with the same second partition driving line through the Gate scanning lines; in M groups of Gate scanning line groups, a second partition driving line connected with a pixel unit of each Gate scanning line group is different from second partition driving lines connected with pixel units of other Gate scanning line groups;
wherein X, Y is a positive integer greater than 1, and M is a positive integer.
That is, the Y Gate scanning lines are divided into M groups, i.e., controlled by M second divisional driving lines by dividing the longitudinal direction of the display area into M segments.
Preferably, M is a positive integer greater than 1.
Preferably, N is a positive integer greater than 1.
That is to say, divide into the multiunit with many Gate scanning lines, divide into the multiunit with many signal lines to can divide into a plurality of subregion with the display area, can realize carrying out local control to subregion, more practice thrift the energy consumption.
Referring to fig. 6, fig. 6 is a schematic diagram illustrating a partition of a display area according to an embodiment of the invention. The horizontal direction of the display area is divided into N sections, and each section is controlled by a first partition driving line; the longitudinal direction of the display area is divided into M segments, each of which is controlled by one second divisional driving line, so that the entire display area is divided into M × N sub-areas.
For example, please refer to fig. 7, fig. 7 is a schematic view illustrating a partition control of a display area according to an embodiment of the present invention. Taking the driving of the array substrate in the display panel with the resolution of 1200 × 750 as an example, the size of each sub-region is designed to be 50 (rows) × 75 (columns), and the display region is divided into 15 rows and 16 columns, for a total of 240 sub-regions. When dynamic display is carried out, only 240 sub-areas need to be controlled, and a driving chip only needs to add 16 first partition driving lines and correspondingly outputs driving signals to the gates of the TFTs 2 in 16 segments. Therefore, the number of control ports (namely, drive pins) of the drive chip can be reduced, the complexity of the circuit is also reduced, and meanwhile, the operation amount of a dynamic control picture is reduced by exponential level, so that the method has strong real operability.
In some preferred embodiments of the present invention, the driver chip is further provided with a register, and the register is provided with N first control bits; wherein a value of each of the N first control bits corresponds to a driving signal of one of the N first divisional driving lines.
Specifically, each first control bit of the register of the driving chip corresponds to a driving signal of one first partition driving line. Referring to fig. 8, fig. 8 is a control diagram of a row control module of the TFT2 according to an embodiment of the present invention. In fig. 8, the array substrate in the display panel with the resolution of 1200 × 750 is still driven in a divisional manner, where N is 16, 16 first control bits C _ SW1 to C _ SW16 may be embedded in a column control block (Second TFT control buffer) of the TFT2, and each of the 16 first control bits corresponds to a driving signal of 16 first divisional control lines newly added to the driving chip, and each of the driving signals corresponds to 1200/16=75 TFT2 column channels. The corresponding relationship between the register control bit and the control terminal in the driver chip and the column channel of TFT2 is shown in table 1.
TABLE 1
Figure 415295DEST_PATH_IMAGE001
Preferably, the register is provided with M second control bits; wherein a value of each of the M second control bits corresponds to a drive signal of one of the M second partition drive lines.
Specifically, each second control bit of the register of the driving chip corresponds to a driving signal of one second partition driving line. Referring to fig. 9, fig. 9 is a control schematic diagram of a Gate scan line output module according to an embodiment of the present invention. In fig. 9, the partitioning driving is still performed on the array substrate in the display panel with the resolution of 1200 × 750, the value of M is specifically 15, 15 second control bits G _ SW1 to G _ SW15 may be built in a Gate output block (Gate output buffer), and each of the drive signals corresponds to 750/15=50 row channels, corresponding to the drive signals of the 15 second partitioning control lines added to the driver chip. The corresponding relationship between the register control bit in the driver chip and the controlled Gate channel is shown in table 2.
TABLE 2
Figure 66856DEST_PATH_IMAGE002
Referring to fig. 10-11, fig. 10 is a schematic diagram of the structure of the component for controlling the TFT2 in the driver chip, and fig. 11 is a schematic diagram of controlling the dynamic display of the sub-region composed of coordinates (50, 60) to (70, 90). The display control of the sub-area may be performed according to the correspondence of the control bit control channel, and the specific display control process is as follows:
1. the Origin Source is turned off.
2. The Timing Controller (TCON) sets the Gate data to the Gate output buffer.
3. The SW2 of the Gate Register of the Gate scan line output control block is set to be on, and the other bits are set to be off.
Specifically, since all the coordinates 60 to 90 can be controlled by the control bit G _ SW2, in order to control the display of the sub-region constituted by the coordinates (50, 60) to (70, 90), the SW2 of the Gate Register provided with the Gate scan line output control module needs to be turned on.
4. The TCON sets the SW1 of the Source register of the TFT2 column control module on and the other bits off.
Specifically, the coordinates 50 to 70 can be controlled by the control bit C _ SW1, so to control the display of the sub-region composed of the coordinates (50, 60) to (70, 90), the SW1 of the Source register of the TFT2 column control module needs to be turned on.
5. The TCON is controlled at a normal timing so that only the TFT2 in the intersection region corresponding to the G _ SW2 and the C _ SW1 is turned on and the TFT2 in the other region is turned off.
The TFT2 in the sub-region is turned on, and the TFT2 in the other region is in an off state, so that the other region does not consume current, and the energy consumption is further saved.
Referring to fig. 12, fig. 12 is a flowchart illustrating a driving method according to a third embodiment of the invention. The driving method is applied to the TFT array substrate and comprises the following steps:
step S1201: the TFT2 in the pixel unit receives a driving signal transmitted by a driving wire connected with the TFT2, and controls the gate of the TFT2 to be enabled or disconnected according to the received driving signal.
The driving method provided by the embodiment of the invention is applied to the TFT array substrate in the second embodiment of the invention, and by controlling the TFT2 newly added in the pixel unit to be in an enable or off state, the pixel at the corresponding position can be controlled to be updated or kept unchanged, so that the local position of the picture can be refreshed, and the whole picture does not need to be refreshed every time, thereby greatly reducing the number of times of switching the TFT and achieving the purpose of saving the TFT switching current.
Referring to fig. 13, fig. 13 is a flowchart illustrating a driving method according to a fourth embodiment of the invention. The driving method is applied to the TFT array substrate which comprises a plurality of signal lines and Gate scanning lines and is used for zone control, and comprises the following steps:
step S1301: the gates of the TFTs 2 of all the pixel units in each signal line group receive the driving signals sent by the first divisional driving lines corresponding to the signal line group through the respective driving wires;
step S1302: if the received driving signal is the first driving signal, controlling the gate of the TFT2 of all the pixel units in the signal line group to be enabled, and turning on the source and the drain of the TFT 2; if the second driving signal is the second driving signal, the gates of the TFTs 2 of all the pixel units in the signal line group are controlled to be turned off, and the source and the drain of the TFT2 are controlled to be turned off.
According to the driving method provided by the embodiment of the invention, the newly added TFT2 in the pixel unit is controlled to be in an enabling or disconnecting state, so that the pixel at the corresponding position can be controlled to be updated or kept unchanged.
The fifth embodiment of the invention further provides a liquid crystal panel, which comprises the array substrate.
According to the liquid crystal panel provided by the embodiment of the invention, the newly added TFT2 in the pixel unit is controlled to be in an enabling or disconnecting state, so that the pixel at the corresponding position can be controlled to be updated or kept unchanged, the local position of the picture can be refreshed, the whole picture does not need to be refreshed every time, the switching frequency of the TFT is greatly reduced, and the aim of saving the switching current of the TFT is fulfilled.
The sixth embodiment of the invention also provides a liquid crystal display screen which comprises the liquid crystal panel.
According to the liquid crystal display screen provided by the embodiment of the invention, the newly added TFT2 in the pixel unit is controlled to be in an enabling or disconnecting state, and the pixel at the corresponding position can be controlled to be updated or kept unchanged, so that the local position of the picture can be refreshed, the whole picture does not need to be refreshed every time, the switching frequency of the TFT is greatly reduced, and the aim of saving the switching current of the TFT is fulfilled.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the description and claims of this patent does not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships are changed accordingly.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (4)

1. A Thin Film Transistor (TFT) array substrate, comprising:
the substrate comprises a substrate base plate, a plurality of Gate scanning lines and a plurality of signal lines, wherein the Gate scanning lines are arranged in parallel in the horizontal direction, the signal lines are arranged in parallel in the vertical direction, and the Gate scanning lines and the signal lines are intersected to form a plurality of intersection regions;
a pixel unit disposed in each of the intersection regions, the pixel unit being a dual-TFT pixel unit, comprising: a first thin film transistor TFT1, a second thin film transistor TFT2, a driving wire, and a liquid crystal equivalent holding capacitance; the source of the TFT1 is connected to a signal line of the array substrate, the Gate of the TFT1 is connected to a Gate scan line of the array substrate, the drain of the TFT1 is connected to the source of the TFT2, the Gate of the TFT2 is connected to the driving wire, and the drain of the TFT2 is connected to the equivalent liquid crystal holding capacitor;
the driving wire is used for transmitting a first driving signal for controlling the TFT2 to be switched on and a second driving signal for controlling the TFT2 to be switched off;
the TFT1 is used for receiving data input by the signal line;
the TFT2 is configured to be in an on state when the TFT1 is in the on state and when the TFT1 receives the first driving signal, input the data into the liquid crystal equivalent holding capacitor; if the second driving signal is received, the liquid crystal display is in a disconnected state, and the data cannot be input into the liquid crystal equivalent holding capacitor;
in the substrate, the gates of all the TFTs 2 on the same signal line are connected to the same driving wire; the number of the driving wires is multiple, the driving signals transmitted by part of the driving wires are the first driving signals, and the driving signals transmitted by the other driving wires are the second driving signals; the substrate base plate comprises X signal lines and Y Gate scanning lines; the array substrate further comprises a driving chip used for sending driving signals to the pixel units, the driving chip is provided with N first partition driving lines and M second partition driving lines, so that a display area of the substrate is divided into M x N sub-areas, and the display of each sub-area is controlled by the driving signals output by one first partition driving line and one second partition driving line;
the X signal lines are divided into N groups, each signal line group comprises at least one signal line, and in each signal line group, the grid electrodes of the TFTs 2 of all the pixel units are connected with the same first partition driving line through driving wires; in the N groups of signal line groups, the first partition driving lines connected with the pixel units in each signal line group are different from the first partition driving lines connected with the pixel units in other signal line groups;
the Y Gate scanning lines are divided into M groups, each Gate scanning line group comprises at least one Gate scanning line, and in each Gate scanning line group, the grid electrodes of the TFTs 1 of all the pixel units are connected with the same second partition driving line through the Gate scanning lines; in M groups of Gate scanning line groups, a second partition driving line connected with a pixel unit of each Gate scanning line group is different from second partition driving lines connected with pixel units of other Gate scanning line groups;
wherein X, Y is a positive integer greater than 2 and M, N is a positive integer greater than 1; the driving chip is also provided with a register, and the register is provided with N first control bits and M second control bits; wherein a value of each of the N first control bits corresponds to a drive signal of one of the N first divisional drive lines; a value of each of the M second control bits corresponds to a drive signal of one of the M second partition drive lines.
2. A driving method applied to the TFT array substrate according to claim 1, comprising:
the gates of the TFTs 2 of all the pixel units in each signal line group receive the driving signals sent by the first divisional driving lines corresponding to the signal line group through the respective driving wires;
if the received driving signal is the first driving signal, controlling the gate of the TFT2 of all the pixel units in the signal line group to be enabled, and turning on the source and the drain of the TFT 2; if the second driving signal is the second driving signal, the gates of the TFTs 2 of all the pixel units in the signal line group are controlled to be turned off, and the source and the drain of the TFT2 are controlled to be turned off.
3. A liquid crystal panel comprising the array substrate according to claim 1.
4. A liquid crystal display panel comprising the liquid crystal panel according to claim 3.
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