CN113555499A - 固态电解质阈值开关器件及其制备方法和1s1r集成结构 - Google Patents
固态电解质阈值开关器件及其制备方法和1s1r集成结构 Download PDFInfo
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Abstract
本发明提供了一种固态电解质阈值开关器件及其制备方法和1S1R集成结构，所述1S1R集成结构由固态电解质阈值开关器件和Ga2O3基忆阻器在空间叠加形成的堆叠结构；所述固态电解质阈值开关器件是在基片上依次制备有Ag底电极层、Ga2O3膜层、MoS2量子点膜层和Ag顶电极层；所述Ga2O3基忆阻器是在基片上依次制备有Pt底电极层、Ga2O3膜层和Ag顶电极层。所述固态电解质阈值开关器件响应迅速，有较窄的阈值电压分布范围，电阻分布较为集中，高低阻比值较大，并且具有大幅度抑制大阵列中寄生电流的能力。
Description
技术领域
本发明涉及忆阻器阵列技术领域，具体涉及一种固态电解质阈值开关器件及其制备方法和1S1R集成结构。
背景技术
忆阻器(Memristor)，顾名思义有记忆电阻功能的器件，能反应磁通量φ与电荷量q 之间对应关系的电路器件。1971年，美国的加州大学伯克利分校华裔科学家Leon O.Chua从逻辑和公理两个方向论证指出，自然界应该还存在一个表示磁通与电荷关系的电路元件，并且根据对称原则二者符合 d=Mdq 的数学关系，其中M即表示忆阻器。忆阻器由于其结构简单，十分有利于在半导体集成电路中应用。然而，由于阵列中器件之间的寄生电流的存在，尤其是在三维阵列集成过程中低阻状态器件之间的互相影响，增加了整个电路芯片的功耗，甚至增加了在数据读取时候误读的可能。因此，如何减少寄生电流的影响具有重要的研究意义。
基于Ga2O3薄膜的阈值开关器件具有高选择性106、陡开斜率<2mV/dec、开关电压集中的特点。本发明将该阈值开关器件堆叠在Ag/Ga2O3/Pt忆阻器上，以形成集成的 1S1R单元，能够实现解决减少寄生电流影响的功能。证明了阈值开关型器件与忆阻器集成的可行性，这将有利于大型交叉阵列的应用，包括非易失性存储器和神经形态计算的应用。
发明内容
本发明的目的是提供一种固态电解质阈值开关器件及其制备方法和1S1R集成结构，以解决阵列中器件之间寄生电流所产生的影响。
本发明为实现其目的采用的技术方案是：一种固态电解质阈值开关器件，所述器件是在基片上依次制备有Ag底电极层、Ga2O3膜层、MoS2量子点膜层和Ag顶电极层。
所述基片为表面含有二氧化硅层的硅基片。
所述Ag底电极层的厚度为10~30 nm，Ga2O3膜层的厚度为5~25 nm，MoS2量子点膜层的厚度为5~40nm，Ag顶电极层的厚度为10~30 nm。
上述的固态电解质阈值开关器件的制备方法，包括以下步骤：
a、使用含厚度为0.8~1.2μm二氧化硅层的硅片作为基片，采用直流磁控溅射法在基片上沉积Ag底电极层；
b、采用磁控溅射法在步骤a 的样品上制备Ga2O3 膜层，其中，溅射功率为 70~90w，溅射室的基压低于 2×10-4pa，工作压力为 2~4pa，工作气氛为Ar 和O2混合气氛，Ar 和O2的气体流量比为1~3∶1；
c、在步骤b所得样品上滴涂MoS2量子点溶液，然后置于加热平台上，在75~85℃干燥 10~20min，从而制得MoS2量子点膜层；
d、在步骤c所得样品上放置掩膜版，然后采用直流磁控溅射法沉积Ag 顶电极层。
一种1S1R集成结构，其是由固态电解质阈值开关器件和Ga2O3 基忆阻器在空间叠加形成的堆叠结构；所述固态电解质阈值开关器件是在基片上依次制备有Ag底电极层、Ga2O3膜层、MoS2量子点膜层和Ag顶电极层；所述Ga2O3 基忆阻器是在基片上依次制备有Pt底电极层、Ga2O3 膜层和Ag顶电极层。
所述Ga2O3 基忆阻器中Pt底电极层的厚度为10~70 nm，Ga2O3 膜层的厚度为5-15nm，Ag顶电极层的厚度为10~30 nm。
所述Ga2O3 基忆阻器通过以下方法制备得到：
a、使用含厚度为0.8~1.2μm二氧化硅层的硅片作为基片，采用射频磁控溅射法在基片上沉积5~15nm厚的金属钛膜作为粘附层，然后用电子束蒸发法制备 Pt底电极层；
b、采用磁控溅射法在步骤a 的样品上制备Ga2O3 膜层，其中，溅射功率为 70~90w，溅射室的基压低于 2×10-4pa，工作压力为 2~4pa，工作气氛为Ar 和O2混合气氛，Ar 和O2的气体流量比为1~3∶1；
c、在步骤b所得样品上放置掩膜版，然后采用直流磁控溅射法沉积Ag 顶电极层。
在 MoS2量子点基阈值开关型器件中，展示了优异的选通特性。陡开斜率<2 mV/dec，高低阻比值106，选择性高。通过制作 1S1R 集成器件，能够实现解决减少寄生电流影响的功能。证明了将这种阈值开关型器件与忆阻器集成的可行性，这将有利于大型交叉阵列的应用，包括非易失性存储器和神经形态计算的应用。
附图说明
图1是本发明中MoS2薄膜的 SEM 图像。
图2是阈值开关器件的 I-V 特性曲线。
图3是阈值开关器件的陡开斜率（约2 mV/dec）图。
图4是阈值开关器件的开关电压统计图。
图5是阈值开关器件的高低电阻积累概率统计图。
图6是1S1R串联结构的I-V特性曲线。
具体实施方式
下面结合实施例对本发明做进一步的阐述，下述实施例仅作为说明，并不以任何方式限制本发明的保护范围。
实施例1 固态电解质阈值开关器件
阈值开关器件是在基片上依次制备有Ag底电极层、Ga2O3膜层、MoS2量子点膜层和Ag顶电极层。Ag底电极层的厚度为10nm，Ga2O3膜层的厚度为10nm，MoS2量子点膜层的厚度为15nm，Ag顶电极层的厚度为30nm、直径为 100μm。
采用磁控溅射和滴涂法制备阈值开关型器件。使用含 1μm 二氧化硅层的硅片作为基片。采用直流磁控溅射, 其中，溅射功率为 10w，溅射室的基压低于 2×10-4pa，在50sccm Ar气氛下的工作压力为 3pa。沉积厚度为 10nm 的 Ag 膜作为底电极。随后，采用磁控溅射法在基片上制备厚度为 10nm 的 Ga2O3 膜层，其中，溅射功率为 80w，溅射室的基压低于 2×10-4pa，在 50sccm Ar 和 25sccm O2 混合气氛下的工作压力为 3pa。然后，在Ga2O3 薄膜上滴涂MoS2量子点溶液（浓度为10mg/ml，溶剂为水），置于加热平台上 ，在80℃干燥 10 min，制得MoS2量子点膜层。最后，在基片上放置掩模版，采用直流磁控溅射10min沉积厚度为 50nm、直径为 100μm 的 Ag 顶电极层。
本发明所制备的固态电解质阈值器件的结构为Ag/MoS2/Ga2O3/Ag。图1为MoS2薄膜的SEM图像，图像显示 MoS2有较好成膜特性，颗粒大小均匀。图 2 显示了阈值开关器件的10 个连续周期 I-V 特性曲线，经过10个重复循环发现，器件能够在保持易失性的同时，又展现了较好的可重复性。图3 展示了阈值开关器件的陡开斜率，斜率为2mV/dec，说明电压响应速度较快。图4分析了阈值开关器件中开关电压的分布，验证了阈值开关型器件的均匀性。阈值开关器件的开关电压分别集中在 0.34V和 0.1V。这种较窄的阈值电压范围分布，使设定和复位操作的程控电压得到精确控制。图5 为阈值开关器件的高低电阻积累概率统计，阈值开关型器件电阻分散较为集中，高低阻比值大约106，高低阻差别较大。
实施例2 1S1R 结构
将实施例1的阈值开关器件串联Ga2O3 基忆阻器构成堆叠的 1S1R 结构。Ga2O3 基忆阻器是在基片上依次制备有Pt底电极层、Ga2O3 膜层和Ag顶电极层。Ga2O3 基忆阻器中Pt底电极层的厚度为50，Ga2O3 膜层的厚度为5nm，Ag顶电极层的厚度为30nm。
Ga2O3 基忆阻器通过以下方法制备得到：
a、使用含厚度为1μm二氧化硅层的硅片作为基片，采用直流磁控溅射法, 其中，溅射功率为 10w，溅射室的基压低于 2×10-4pa，在 50sccm Ar气氛下的工作压力为 3pa。在基片上沉积10nm厚的金属钛膜作为粘附层，然后用射频磁控溅射法, 其中，溅射功率为10w，溅射室的基压低于 2×10-4pa，在 50sccm Ar气氛下的工作压力为 3pa。制备 Pt底电极层；
b、采用磁控溅射法，在室温下，在步骤a 的样品上制备Ga2O3 膜层，其中，溅射功率为80w，溅射室的基压低于 2×10-4pa，在 50sccm Ar 和 25sccm O2 混合气氛下的工作压力为 3pa；
c、在步骤b所得样品上放置掩膜版，然后采用直流磁控溅射10min沉积厚度为50nm、直径为 100μm 的 Ag 顶电极层。
将两种器件空间叠加形成1S1R 堆叠结构。图6(a)为1S1R 结构示意图。这种结构允许分别访问阈值开关器件、忆阻器和1S1R单元的特性。图6（b）为阈值开关器件 i-v 特性曲线。阈值开关器件显示具有单个偏压极性的可重复阈值切换。图6（c）为忆阻器 i-v 特性曲线，展示出了单个 Ag/Ga2O3/Pt 忆阻器的可重复双极记忆开关。6（d）为1S1R 叠层结构i-v 特性曲线，展示出了具有大幅度抑制大阵列中寄生电流的能力。此特性证明了将这种阈值开关型与忆阻器集成的可行性，这将有利于大型交叉阵列的应用，包括非易失性存储器和神经形态计算的应用。
Claims (7)
1.一种固态电解质阈值开关器件，其特征在于，所述器件是在基片上依次制备有Ag底电极层、Ga2O3膜层、MoS2量子点膜层和Ag顶电极层。
2.根据权利要求1所述的固态电解质阈值开关器件，其特征在于，所述基片为表面含有二氧化硅层的硅基片。
3.根据权利要求1所述的固态电解质阈值开关器件，其特征在于，所述Ag底电极层的厚度为10~30 nm，Ga2O3膜层的厚度为5~25 nm，MoS2量子点膜层的厚度为5~40nm，Ag顶电极层的厚度为10~30 nm。
4.权利要求1~3任一所述的固态电解质阈值开关器件的制备方法，其特征在于，包括以下步骤：
a、使用含厚度为0.8~1.2μm二氧化硅层的硅片作为基片，采用直流磁控溅射法在基片上沉积Ag底电极层；
b、采用磁控溅射法在步骤a 的样品上制备Ga2O3 膜层，其中，溅射功率为 70~90w，溅射室的基压低于 2×10-4pa，工作压力为 2~4pa，工作气氛为Ar 和O2混合气氛，Ar 和O2的气体流量比为1~3∶1；
c、在步骤b所得样品上滴涂MoS2量子点溶液，然后置于加热平台上，在75~85℃干燥 10~20min，从而制得MoS2量子点膜层；
d、在步骤c所得样品上放置掩膜版，然后采用直流磁控溅射法沉积Ag 顶电极层。
5.一种1S1R集成结构，其特征在于，其是由固态电解质阈值开关器件和Ga2O3 基忆阻器在空间叠加形成的堆叠结构；所述固态电解质阈值开关器件是在基片上依次制备有Ag底电极层、Ga2O3膜层、MoS2量子点膜层和Ag顶电极层；所述Ga2O3 基忆阻器是在基片上依次制备有Pt底电极层、Ga2O3 膜层和Ag顶电极层。
6.根据权利要求5所述的1S1R集成结构，其特征在于，所述Ga2O3 基忆阻器中Pt底电极层的厚度为10~70 nm，Ga2O3 膜层的厚度为5-15 nm，Ag顶电极层的厚度为10~30nm。
7.根据权利要求5所述的1S1R集成结构，其特征在于，所述Ga2O3 基忆阻器通过以下方法制备得到：
a、使用含厚度为0.8~1.2μm二氧化硅层的硅片作为基片，采用射频磁控溅射法在基片上沉积5~15nm厚的金属钛膜作为粘附层，然后用电子束蒸发法制备 Pt底电极层；
b、采用磁控溅射法在步骤a 的样品上制备Ga2O3 膜层，其中，溅射功率为 70~90w，溅射室的基压低于 2×10-4pa，工作压力为 2~4pa，工作气氛为Ar 和O2混合气氛，Ar 和O2的气体流量比为1~3∶1；
c、在步骤b所得样品上放置掩膜版，然后采用直流磁控溅射法沉积Ag 顶电极层。
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017039611A1 (en) * | 2015-08-31 | 2017-03-09 | Hewlett Packard Enterprise Development Lp | Material stacks for low current unipolar memristors |
| US20180012652A1 (en) * | 2015-01-26 | 2018-01-11 | Agency For Science, Technology And Research | Memory cell selector and method of operating memory cell |
| CN108231823A (zh) * | 2018-03-16 | 2018-06-29 | 湖北大学 | 一种基于氧化锆隧穿层的氧化铌选通器件及其制造方法 |
| US20190074436A1 (en) * | 2017-09-05 | 2019-03-07 | SK Hynix Inc. | Switching device and non-volatile memory device including the same |
| US20200303639A1 (en) * | 2016-03-15 | 2020-09-24 | Agency For Science, Technology And Research | Memory device and method of forming the same |
| CN112885868A (zh) * | 2021-02-03 | 2021-06-01 | 湖北大学 | 一种基于氧化铌选通管的1s1r器件及其制备方法 |
| CN112885869A (zh) * | 2021-02-03 | 2021-06-01 | 湖北大学 | 一种基于金属性插层的1s1r器件及其制备方法 |
-
2021
- 2021-06-11 CN CN202110653606.5A patent/CN113555499A/zh active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20180012652A1 (en) * | 2015-01-26 | 2018-01-11 | Agency For Science, Technology And Research | Memory cell selector and method of operating memory cell |
| WO2017039611A1 (en) * | 2015-08-31 | 2017-03-09 | Hewlett Packard Enterprise Development Lp | Material stacks for low current unipolar memristors |
| US20200303639A1 (en) * | 2016-03-15 | 2020-09-24 | Agency For Science, Technology And Research | Memory device and method of forming the same |
| US20190074436A1 (en) * | 2017-09-05 | 2019-03-07 | SK Hynix Inc. | Switching device and non-volatile memory device including the same |
| CN108231823A (zh) * | 2018-03-16 | 2018-06-29 | 湖北大学 | 一种基于氧化锆隧穿层的氧化铌选通器件及其制造方法 |
| CN112885868A (zh) * | 2021-02-03 | 2021-06-01 | 湖北大学 | 一种基于氧化铌选通管的1s1r器件及其制备方法 |
| CN112885869A (zh) * | 2021-02-03 | 2021-06-01 | 湖北大学 | 一种基于金属性插层的1s1r器件及其制备方法 |
Non-Patent Citations (3)
| Title |
|---|
| 李晓钰,赵莹,赵建辉,裴逸菲,闫小兵: "《基于量子点对阻变存储器性能提升的研究进展》", 《微纳电子与智能制造》 * |
| 李雨佳,吴华强,高滨,化麒麟,张昭,张万荣,钱鹤: "《Impact of variations of threshold voltage and hold voltage of threshold switching selectors in 1S1R crossbar array》", 《CHINESE PHYSICS B》 * |
| 裴逸菲: "《量子点掺杂Ga2O3忆阻器性能与物理机制研究》", 《中国优秀博硕士学位论文全文数据库(硕士)信息科技辑(月刊)》 * |
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