CN113532661A

CN113532661A - Single-layer infrared focal plane detector

Info

Publication number: CN113532661A
Application number: CN202110783696.XA
Authority: CN
Inventors: 翟光杰; 武佩; 潘辉; 翟光强
Original assignee: Beijing North Gaoye Technology Co ltd
Current assignee: Beijing North Gaoye Technology Co ltd
Priority date: 2021-07-12
Filing date: 2021-07-12
Publication date: 2021-10-22

Abstract

The utility model relates to a single-deck infrared focal plane detector, CMOS measurement circuitry and CMOS infrared sensing structure in the infrared focal plane detector all use CMOS technology preparation, CMOS manufacturing process includes metal interconnection technology, through-hole technology, IMD technology and RDL technology, the column structure in the CMOS infrared sensing structure includes at least one deck solid column structure and/or at least one deck hollow column structure, the sacrificial layer is used for making CMOS infrared sensing structure form hollow out construction, the material that constitutes the sacrificial layer includes at least one in silicon, germanium or germanium silicon, adopt the etchant gas and adopt post-CMOS technology corruption sacrificial layer, the etchant gas includes at least one in xenon fluoride, chlorine, bromine gas, carbon tetrachloride and the fluorine chlorine substituted hydrocarbon. Through the technical scheme, the problems of low performance, low pixel scale, low yield, poor consistency and the like of the traditional MEMS process infrared focal plane detector are solved.

Description

Single-layer infrared focal plane detector

Technical Field

The present disclosure relates to the field of infrared detection technology, and in particular, to a single-layer infrared focal plane detector.

Background

The fields of monitoring markets, vehicle and auxiliary markets, home markets, intelligent manufacturing markets, mobile phone applications and the like have strong demands on uncooled high-performance chips, certain requirements are provided for the performance of the chips, the performance consistency and the product price, the potential demands of more than one hundred million chips are expected every year, and the current process scheme and architecture cannot meet the market demands.

At present, an infrared focal plane detector adopts a mode of combining a measuring circuit and an infrared sensing structure, the measuring circuit is prepared by adopting a Complementary Metal-Oxide-Semiconductor (CMOS) process, and the infrared sensing structure is prepared by adopting a Micro-Electro-Mechanical System (MEMS) process, so that the following problems are caused:

(1) the infrared sensing structure is prepared by adopting an MEMS (micro-electromechanical systems) process, polyimide is used as a sacrificial layer, and the infrared sensing structure is incompatible with a CMOS (complementary metal oxide semiconductor) process.

(2) Polyimide is used as a sacrificial layer, so that the problem that the vacuum degree of a detector chip is influenced due to incomplete release exists, the growth temperature of a subsequent film is limited, and the selection of materials is not facilitated.

(3) Polyimide can cause the height of the resonant cavity to be inconsistent, and the working dominant wavelength is difficult to guarantee.

(4) The control of the MEMS process is far worse than that of the CMOS process, and the performance consistency and the detection performance of the chip are restricted.

(5) MEMS has low productivity, low yield and high cost, and can not realize large-scale batch production.

(6) The existing process capability of the MEMS is not enough to support the preparation of a detector with higher performance, and the MEMS has smaller line width and thinner film thickness, thereby being not beneficial to realizing the miniaturization of a chip.

Disclosure of Invention

In order to solve the technical problem or at least partially solve the technical problem, the present disclosure provides a single-layer infrared focal plane detector, which solves the problems of low performance, low pixel scale, low yield, poor consistency and the like of the conventional MEMS infrared focal plane detector.

The present disclosure provides a single-layer infrared focal plane detector, comprising:

the CMOS infrared sensing structure comprises a CMOS measuring circuit system and a CMOS infrared sensing structure, wherein the CMOS measuring circuit system and the CMOS infrared sensing structure are both prepared by using a CMOS process, and the CMOS infrared sensing structure is directly prepared on the CMOS measuring circuit system;

the CMOS measurement circuit system comprises at least one layer of closed release isolation layer above the CMOS measurement circuit system, wherein the closed release isolation layer is used for protecting the CMOS measurement circuit system from being influenced by a process in the release etching process of manufacturing the CMOS infrared sensing structure;

the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process, an IMD (in-mold decoration) process and an RDL (remote description language) process, wherein the CMOS infrared sensing structure comprises at least two metal interconnection layers, at least two dielectric layers and a plurality of interconnection through holes, the metal interconnection layers at least comprise a reflecting layer and an electrode layer, and the dielectric layers at least comprise a sacrificial layer and a heat-sensitive dielectric layer; the CMOS infrared sensing structure comprises a thermal sensitive medium layer, a CMOS measurement circuit system, a sacrifice layer and a metal oxide semiconductor (CMOS) sensor, wherein the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measurement circuit system, the sacrifice layer is used for enabling the CMOS infrared sensing structure to form a hollow structure, the material forming the sacrifice layer comprises at least one of silicon, germanium or germanium-silicon, the sacrifice layer is corroded by adopting etching gas and a post-CMOS process, and the etching gas comprises at least one of xenon fluoride, chlorine, bromine, carbon tetrachloride or chlorofluorocarbon;

the CMOS infrared sensing structure comprises a resonant cavity formed by the reflecting layer and the heat sensitive medium layer, a suspended micro-bridge structure for controlling heat transfer and a columnar structure with electric connection and support functions, wherein the columnar structure comprises at least one layer of solid columnar structure and/or at least one layer of hollow columnar structure, and the suspended micro-bridge structure is electrically connected with the CMOS measuring circuit system through the columnar structure and a support base in the reflecting layer;

the CMOS measuring circuit system is used for measuring and processing an array resistance value formed by one or more CMOS infrared sensing structures and converting an infrared signal into an image electric signal; the CMOS measuring circuit system comprises a bias voltage generating circuit, a column-level analog front-end circuit and a row-level circuit, wherein the input end of the bias voltage generating circuit is connected with the output end of the row-level circuit, the input end of the column-level analog front-end circuit is connected with the output end of the bias voltage generating circuit, the row-level circuit comprises row-level mirror image pixels and row selection switches, and the column-level analog front-end circuit comprises blind pixels; the row-level circuit is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the time sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit under the action of the bias voltage generating circuit so as to perform current-voltage conversion and output;

the column-level analog front-end circuit obtains two paths of currents according to the first bias voltage and the second bias voltage, performs transimpedance amplification on the difference between the two paths of generated currents and outputs the amplified current as an output voltage.

Optionally, the CMOS infrared sensing structure is fabricated on an upper layer or a same layer of a metal interconnection layer of the CMOS measurement circuitry.

Optionally, the suspended microbridge structure includes an absorption plate and a plurality of beam structures, the absorption plate is configured to absorb the infrared target signal and convert the infrared target signal into an electrical signal, the beam structures and the pillar structures are configured to transmit the electrical signal and support and connect the absorption plate, the reflection layer is configured to reflect the infrared signal and form the resonant cavity with the heat sensitive dielectric layer, the reflection layer includes at least one metal interconnection layer, and the pillar structures connect the beam structures and the CMOS measurement circuitry by using the metal interconnection process and the via process; the beam structure comprises the electrode layer, or the beam structure comprises a first dielectric layer and the electrode layer, or the beam structure comprises the electrode layer and a second dielectric layer, or the beam structure comprises the electrode layer and the heat sensitive dielectric layer, or the beam structure comprises a first dielectric layer, the electrode layer and a second dielectric layer, or the beam structure comprises a first dielectric layer, the electrode layer and the heat sensitive dielectric layer, or the beam structure comprises the electrode layer, the heat sensitive dielectric layer and a second dielectric layer, or the beam structure comprises a first dielectric layer, the electrode layer, the heat sensitive dielectric layer and a second dielectric layer, the absorption plate comprises the electrode layer and the heat sensitive dielectric layer, or the absorption plate comprises a first dielectric layer, the electrode layer and the heat sensitive dielectric layer, or the absorption plate comprises the electrode layer, the heat sensitive dielectric layer, The heat sensitive medium layer and the second medium layer, or the absorption plate comprises a first medium layer, the electrode layer, the heat sensitive medium layer and a second medium layer; the material for forming the heat-sensitive dielectric layer comprises at least one of titanium oxide, vanadium oxide, titanium vanadium oxide, amorphous silicon, amorphous germanium silicon oxide, silicon, germanium silicon oxide, amorphous carbon, graphene, yttrium barium copper oxide, copper or platinum, and the resistance temperature coefficient of the material for forming the first dielectric layer is larger than a set value;

the electrode layer is made of at least one of titanium, titanium nitride, tantalum nitride, titanium-tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, nickel-silicon alloy, nickel, chromium, platinum, tungsten, aluminum or copper.

Optionally, the suspended microbridge structure includes a first dielectric layer and a second dielectric layer, the infrared focal plane detector further includes a metamaterial structure and/or a polarization structure, the metamaterial structure or the polarization structure is at least one metal interconnection layer on a side of the first dielectric layer adjacent to the CMOS measurement circuit system, or at least one metal interconnection layer on a side of the second dielectric layer away from the CMOS measurement circuit system, or at least one metal interconnection layer between the first dielectric layer and the second dielectric layer and electrically insulated from the electrode layer, or the electrode layer is used as a metamaterial structure layer or a polarization structure layer;

at least one hole-shaped structure is formed on the absorption plate, and the hole-shaped structure at least penetrates through the medium layer in the absorption plate; and/or at least one hole-like structure is formed on the beam structure.

Optionally, the columnar structure comprises at least one layer of solid columnar structure, and the solid columnar structure comprises a solid structure;

the side wall of the solid structure is in contact with the sacrificial layer, and the material for forming the solid structure comprises at least one of tungsten, copper or aluminum; alternatively, the first and second electrodes may be,

the side wall of the solid structure is coated with at least one dielectric layer, the solid structure is arranged in contact with the dielectric layer, the material for forming the solid structure comprises at least one of tungsten, copper or aluminum, and the material for forming the dielectric layer comprises at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, titanium vanadium oxide, graphene, yttrium barium copper oxide, copper or platinum; alternatively, the first and second electrodes may be,

solid construction's lateral wall and solid construction closes on CMOS measures circuit system's surface cladding has at least one deck adhesion layer, outermost periphery in the columnar structure adhesion layer is kept away from solid construction's lateral wall cladding has the dielectric layer, constitutes solid construction's material includes at least one in tungsten, copper or the aluminium, constitutes the material of adhesion layer includes at least one in titanium, titanium nitride, tantalum or the tantalum nitride, constitutes the material of dielectric layer includes at least one in silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, aluminium oxide, titanium oxide, vanadium oxide, titanium vanadium oxide, graphene, barium yttrium copper oxygen, copper or platinum.

Optionally, the suspended microbridge structure includes an absorption plate and a plurality of beam structures, the infrared focal plane detector further includes a reinforcing structure, the reinforcing structure is disposed corresponding to the position of the columnar structure, the reinforcing structure is used for enhancing connection stability between the columnar structure and the beam structures, and the reinforcing structure includes a weighted block structure;

the weighting block structure is positioned on one side of the beam structure far away from the CMOS measuring circuit system and is in contact with the beam structure; alternatively, the first and second electrodes may be,

the beam structure is provided with a through hole corresponding to the position of the columnar structure, at least part of the columnar structure is exposed out of the through hole, the weighting block structure comprises a first part and a second part, the first part is filled in the through hole, the second part is located outside the through hole, and the orthographic projection of the second part covers the orthographic projection of the first part.

Optionally, the columnar structure includes at least one layer of hollow columnar structure, and the electrode layer is at least disposed in the hollow columnar structure.

Optionally, the infrared focal plane detector further includes a reinforcing structure, the reinforcing structure is disposed at a position corresponding to the position of the columnar structure, and the reinforcing structure is used for enhancing connection stability between the columnar structure and the suspended microbridge structure and between the columnar structure and the reflecting layer;

the reinforcing structure is positioned on one side of the electrode layer, which is far away from the CMOS measuring circuit system; or, the reinforcing structure is positioned on one side of the electrode layer close to the CMOS measuring circuit system.

Optionally, the hermetic release barrier is located at an interface between the CMOS measurement circuitry and the CMOS infrared sensing structure and/or in the CMOS infrared sensing structure;

the closed release isolation layer at least comprises a dielectric layer, and the dielectric material forming the closed release isolation layer comprises at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide or aluminum oxide.

Optionally, the hermetic release isolation layer is located on a side of the reflection layer away from the CMOS measurement circuit system, at least one dielectric layer is disposed between the reflection layer and the hermetic release isolation layer, and a material constituting the dielectric layer includes at least one of germanium, silicon, or germanium-silicon.

Optionally, at least one patterned metal interconnection layer is disposed between the reflective layer and the suspended microbridge structure, the patterned metal interconnection layer is located above or below the hermetic release isolation layer and is electrically insulated from the reflective layer, and the patterned metal interconnection layer is used for adjusting a resonance mode of the infrared focal plane detector;

the infrared focal plane detector is based on a CMOS process with the thickness of 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm or 350 nm;

the metal connecting wire material of the metal interconnection layer of the infrared focal plane detector comprises at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium or cobalt.

Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages:

the CMOS process is utilized to realize the integrated preparation of the CMOS measuring circuit system and the CMOS infrared sensing structure on the CMOS production line, compared with the MEMS process, the CMOS has no process compatibility problem, the technical difficulty of the MEMS process is solved, the transportation cost can be reduced by adopting the CMOS process production line process to prepare the infrared focal plane detector, and the risk caused by the transportation problem and the like is reduced; the infrared focal plane detector takes at least one of silicon, germanium or silicon germanium as a sacrificial layer, the silicon, germanium and silicon germanium are completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that the vacuum degree of a detector chip is influenced due to incomplete release of polyimide of the sacrificial layer, the growth temperature of a subsequent film is not limited by the material of the sacrificial layer, the multilayer process design of the sacrificial layer can be realized, the process is not limited, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and the possible risks are reduced; the infrared focal plane detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared focal plane detector; the infrared focal plane detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, and has larger duty ratio, lower thermal conductivity and smaller thermal capacity, thereby having higher detection sensitivity, longer detection distance and better detection performance; the infrared focal plane detector based on the CMOS process can make the size of the detector pixel smaller, realize smaller chip area under the same array pixel, and is more beneficial to realizing the miniaturization of the chip; the infrared focal plane detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better meeting design requirements, better product consistency, more contribution to circuit chip adjustment performance and more contribution to industrialized batch production.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.

In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present disclosure, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic perspective structure diagram of an infrared focal plane detector pixel provided in an embodiment of the present disclosure;

fig. 2 is a schematic cross-sectional structure diagram of an infrared focal plane detector pixel provided in an embodiment of the present disclosure;

FIG. 3 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

FIG. 4 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

FIG. 5 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

FIG. 6 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

FIG. 7 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

FIG. 8 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiments of the present disclosure;

fig. 9 is a schematic structural diagram of a CMOS measurement circuitry provided in an embodiment of the present disclosure;

FIG. 10 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided by the embodiment of the present disclosure;

fig. 11 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

FIG. 12 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiments of the present disclosure;

fig. 13 is a schematic perspective structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

fig. 14 is a schematic perspective structure diagram of another infrared focal plane detector pixel provided by the embodiment of the present disclosure;

fig. 15 is a schematic perspective view of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

fig. 16 is a schematic perspective view of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

fig. 17 is a schematic top view of a polarization structure provided in an embodiment of the present disclosure;

FIG. 18 is a schematic diagram illustrating a top view of another polarization structure provided in an embodiment of the present disclosure;

FIG. 19 is a schematic diagram illustrating a top view of another polarization structure provided in an embodiment of the present disclosure;

fig. 20 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided by the embodiment of the present disclosure;

fig. 21 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

fig. 22 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided by the embodiment of the present disclosure;

fig. 23 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure;

FIG. 24 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided by the embodiment of the present disclosure;

fig. 25 is a schematic perspective structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure.

Detailed Description

In order that the above objects, features and advantages of the present disclosure may be more clearly understood, aspects of the present disclosure will be further described below. It should be noted that the embodiments and features of the embodiments of the present disclosure may be combined with each other without conflict.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced in other ways than those described herein; it is to be understood that the embodiments disclosed in the specification are only a few embodiments of the present disclosure, and not all embodiments.

Fig. 1 is a schematic perspective structure diagram of an infrared focal plane detector pixel provided in an embodiment of the present disclosure, and fig. 2 is a schematic cross-sectional structure diagram of an infrared focal plane detector pixel provided in an embodiment of the present disclosure. With reference to fig. 1 and 2, the infrared focal plane detector includes a plurality of infrared focal plane detector pixels arranged in an array, the CMOS process-based infrared focal plane detector includes a CMOS measurement circuit system 1 and a CMOS infrared sensing structure 2, both the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are manufactured by using a CMOS process, and the CMOS infrared sensing structure 2 is directly manufactured on the CMOS measurement circuit system 1.

Specifically, the CMOS infrared sensing structure 2 is configured to convert an external infrared signal into an electrical signal and transmit the electrical signal to the CMOS measurement circuit system 1, and the CMOS measurement circuit system 1 reflects temperature information corresponding to the infrared signal according to the received electrical signal, thereby implementing a temperature detection function of the infrared focal plane detector. The CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, and the CMOS infrared sensing structure 2 is directly prepared on the CMOS measuring circuit system 1, namely, the CMOS measuring circuit system 1 is prepared by using the CMOS process, and then the CMOS infrared sensing structure 2 is continuously prepared by using the CMOS process by using the CMOS production line and parameters of various processes compatible with the production line.

Therefore, the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are integrally prepared on the CMOS production line by utilizing the CMOS process, compared with the MEMS process, the CMOS process does not have the process compatibility problem, the technical difficulty of the MEMS process is solved, the transportation cost can be reduced by adopting the CMOS production line process to prepare the infrared focal plane detector, and the risk caused by the problems of transportation and the like is reduced; the infrared focal plane detector takes at least one of silicon, germanium or silicon germanium as a sacrificial layer, the silicon, germanium and silicon germanium are completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that the vacuum degree of a detector chip is influenced due to incomplete release of polyimide of the sacrificial layer, the growth temperature of a subsequent film is not limited by the material of the sacrificial layer, the multilayer process design of the sacrificial layer can be realized, the process is not limited, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and the possible risks are reduced; the infrared focal plane detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared focal plane detector; the infrared focal plane detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, and has larger duty ratio, lower thermal conductivity and smaller thermal capacity, thereby having higher detection sensitivity, longer detection distance and better detection performance; the infrared focal plane detector based on the CMOS process can make the size of the detector pixel smaller, realize smaller chip area under the same array pixel, and is more beneficial to realizing the miniaturization of the chip; the infrared focal plane detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better meeting design requirements, better product consistency, more contribution to circuit chip adjustment performance and more contribution to industrialized batch production.

Referring to fig. 1 and 2, the CMOS infrared sensing structure 2 includes a resonant cavity formed by a reflective layer 4 and a heat sensitive dielectric layer, a suspended microbridge structure 40 controlling heat transfer, and a pillar structure 6 having electrical connection and support functions, and the suspended microbridge structure 40 includes an absorption plate 10 and a plurality of beam structures 11. Specifically, the CMOS infrared sensing structure 2 includes a reflective layer 4, a suspended micro-bridge structure 40 and a columnar structure 6 which are located on the CMOS measurement circuit system 1, the columnar structure 6 is located between the reflective layer 4 and the suspended micro-bridge structure 40, the reflective layer 4 includes a reflective plate 41 and a supporting base 42, and the suspended micro-bridge structure 40 is electrically connected with the CMOS measurement circuit system 1 through the columnar structure 6 and the supporting base 42.

Specifically, the columnar structure 6 is located between the reflective layer 4 and the suspended microbridge structure 40, and is configured to support the suspended microbridge structure 40 after a sacrificial layer on the CMOS measurement circuit system 1 is released, the sacrificial layer is located between the reflective layer 4 and the suspended microbridge structure 40, the suspended microbridge structure 40 transmits an electrical signal converted from an infrared signal to the CMOS measurement circuit system 1 through the corresponding columnar structure 6 and the corresponding support base 42, and the CMOS measurement circuit system 1 processes the electrical signal to reflect temperature information, thereby implementing non-contact infrared temperature detection of the infrared focal plane detector. The CMOS infrared sensing structure 2 outputs positive electric signals and grounding electric signals through different electrode structures, the positive electric signals and the grounding electric signals are transmitted to a supporting base 42 electrically connected with the columnar structures 6 through different columnar structures 6, fig. 1 and 2 exemplarily show that along the direction parallel to the CMOS measuring circuit system 1, the CMOS infrared sensing structure 2 comprises two columnar structures 6, one of the columnar structures 6 can be arranged for transmitting positive electric signals, the other columnar structure 6 is arranged for transmitting grounding electric signals, the CMOS infrared sensing structure 2 also comprises four columnar structures 6, the four columnar structures 6 can be arranged in a group of two to two and respectively transmit positive electric signals and grounding electric signals, as the infrared focal plane detector comprises a plurality of infrared focal plane detector pixels arranged in an array, the four columnar structures 6 can also select two of the columnar structures 6 to respectively transmit positive electric signals and grounding electric signals, and the other two columnar structures 6 are used for transmitting electric signals to the adjacent infrared focal plane detector pixels. In addition, the reflection layer 4 includes a reflection plate 41 and a supporting base 42, a part of the reflection layer 4 is used as a dielectric medium electrically connected to the column structure 6 and the CMOS measurement circuit system 1, that is, the supporting base 42, the reflection plate 41 is used for reflecting infrared rays to the suspended microbridge structure 40, and the secondary absorption of the infrared rays is realized by matching with a resonant cavity formed between the reflection layer 4 and the suspended microbridge structure 40, so as to improve the infrared absorption rate of the infrared focal plane detector and optimize the infrared detection performance of the infrared focal plane detector.

The columnar structure 6 includes at least one layer of solid columnar structure and/or at least one layer of hollow columnar structure, that is, the columnar structure 6 may include at least one layer of solid columnar structure, may also include at least one layer of hollow columnar structure, and may also include at least one layer of solid columnar structure and at least one layer of hollow columnar structure. Fig. 2 exemplarily sets up that columnar structure 6 includes a layer of hollow columnar structure, forms hollow structure at columnar structure 6 position promptly, and hollow columnar structure is favorable to reducing columnar structure 6's thermal conductance, and then reduces the influence of the thermal conductance that columnar structure 6 produced to the signal of telecommunication that unsettled microbridge structure 40 generated, is favorable to promoting infrared focal plane detector pixel and the infrared detection performance of the infrared focal plane detector including this infrared focal plane detector pixel.

Fig. 3 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. With reference to fig. 1 and 3, fig. 3 exemplarily shows that the columnar structure 6 includes a solid columnar structure, i.e., a solid metal structure is formed at the position of the columnar structure 6, the mechanical stability of the solid columnar structure is good, the supporting connection stability between the columnar structure 6 and the suspension micro-bridge structure 40 is improved, and further, the structural stability of the infrared sensor pixel and the infrared focal plane detector including the infrared focal plane detector pixel is improved. In addition, the resistance of the solid metal columnar structure is small, signal loss in the process of electric signal transmission between the suspended micro-bridge structure 40 and the CMOS measuring circuit system 1 is reduced, the infrared detection performance of the infrared focal plane detector is improved, the size of the solid metal columnar structure is easier to accurately control, namely, the solid metal columnar structure can realize a columnar structure with a smaller size, the requirement on the size of a smaller chip is met, and the miniaturization of the infrared focal plane detector is realized.

Fig. 4 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. Referring to fig. 1 and 4, fig. 4 exemplarily illustrates that the pillar structures include a plurality of layers of solid pillar structures, for example, two layers of solid pillar structures, that is, a solid pillar structure 61 and a solid pillar structure 62, so as to have the advantages of the solid pillar structures described in the above embodiments. It is also possible to arrange the pillar structures like fig. 4 to include a multi-layer hollow pillar structure to have the advantages of the hollow pillar structures described in the above embodiments. In addition, the columnar structure comprises a multi-layer hollow columnar structure or a multi-layer solid columnar structure, so that the types of the stand columns in the same columnar structure can be reduced, and the preparation process of the columnar structure is facilitated to be simplified.

Fig. 5 is a schematic cross-sectional structure view of another infrared focal plane detector pixel provided in the embodiment of the present disclosure, and fig. 6 is a schematic cross-sectional structure view of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. With reference to fig. 1, 5 and 6, fig. 5 exemplarily provides that the pillar structure 6 includes a layer of solid pillar structures 63 and a layer of hollow pillar structures 64, and the solid pillar structures 63 are located on a side of the hollow pillar structures 64 adjacent to the CMOS measurement circuitry, and fig. 6 exemplarily provides that the pillar structure 6 includes a layer of solid pillar structures 65 and a layer of hollow pillar structures 66, and the solid pillar structures 65 are located on a side of the hollow pillar structures 66 away from the CMOS measurement circuitry. Thus, the pillar structure 6 formed by superimposing the solid pillar structure and the hollow pillar structure connects the suspended micro-bridge structure 40 and the supporting base 42, so that the pillar structure 6 has the advantages of both the hollow pillar structure and the solid pillar structure described in the above embodiments.

For example, the pillars in the same layer in the columnar structure 6 may be the same type of pillars, that is, the pillars in the same layer in the columnar structure 6 may be all solid columnar structures or all hollow columnar structures, so that the pillars in the same layer may be formed by the same process steps, which is beneficial to simplifying the manufacturing process of the columnar structure 6. In addition, the same columnar structure 6 may further include different types of columns, and the same layer may also be provided with different types of columns, and the types of columns may be specifically set based on specific requirements of the infrared focal plane detector, which is not specifically limited in the embodiment of the present disclosure.

From this, including the multilayer stand through setting up columnar structure 6, be favorable to reducing the height of each layer stand in columnar structure 6, the height of stand is lower more, its straightness that steeps is better, consequently, easily form the better stand of straightness that steeps, thereby optimize the holistic straightness that steeps of columnar structure 6, columnar structure 6's overall dimension also can accomplish littleer, be favorable to reducing the shared space of columnar structure 6, thereby increase CMOS infrared sensing structure's effective area, and then improve the duty cycle, improve infrared focal plane detector's infrared detection sensitivity. In addition, the column structure 6 may further include more layers of columns, for example, three or more layers of columns, and each column may be a solid column structure or a hollow column structure.

Referring to fig. 1 to 6, a sacrificial layer (not shown in fig. 1 to 6) is located between the suspended microbridge structure 40 and the reflective layer 4, the sacrificial layer is used to form a hollow structure on the CMOS infrared sensing structure 2, the material of the sacrificial layer includes at least one of silicon, germanium or silicon germanium, wherein the silicon may be in at least one of a single crystal form, a polycrystalline form or an amorphous form, the germanium may be in at least one of a single crystal form, a polycrystalline form or an amorphous form, the silicon germanium may be in at least one of a single crystal form, a polycrystalline form or an amorphous form, and the sacrificial layer is etched by using an etching gas and a post-CMOS process, the etching gas includes at least one of xenon fluoride, chlorine, bromine, carbon tetrachloride or chlorofluorocarbon. Illustratively, the post-CMOS process may etch the sacrificial layer using at least one of xenon fluoride, chlorine gas, bromine gas, carbon tetrachloride, or chlorofluorocarbons, which are gases having etching properties for silicon, germanium, and silicon germanium. Specifically, a sacrificial layer is arranged between the reflection layer 4 and the suspended microbridge structure 40, when the reflection layer 4 is provided with the airtight release isolation layer 3, a sacrificial layer is arranged between the airtight release isolation layer 3 and the suspended microbridge structure 40, the material forming the sacrificial layer comprises at least one of silicon, germanium or silicon germanium, so as to be compatible with a CMOS process, and a post-CMOS process can be adopted, that is, the post-CMOS process corrodes the sacrificial layer to release the sacrificial layer in the final infrared detection chip product.

Optionally, with reference to fig. 1 to 6, the suspended microbridge structure includes an absorption plate 10 and a plurality of beam structures 11, where the absorption plate 10 is used to convert an infrared signal into an electrical signal and is electrically connected to the corresponding pillar structures 6 through the corresponding beam structures 11, and at least one hole structure may be formed on the absorption plate 10, where the hole structure at least penetrates through a dielectric layer in the absorption plate 10; and/or, at least one hole-shaped structure is formed on the beam structure 11, that is, only the absorption plate 10, only the beam structure 11, or both the absorption plate 10 and the beam structure 11 may be provided with a hole-shaped structure. For example, whether the hole structures on the absorption plate 10 or the beam structure 11 are hole structures, the hole structures may be circular hole structures, square hole structures, polygonal hole structures, or irregular pattern hole structures, the shape of the hole structures on the absorption plate 10 and the beam structure 11 is not specifically limited by the embodiments of the present disclosure, and the number of the hole structures on the absorption plate 10 and the beam structure 11 is not specifically limited by the embodiments of the present disclosure.

Therefore, at least one hole-shaped structure is formed on the absorption plate 10, the hole-shaped structure at least penetrates through the dielectric layer in the absorption plate 10, and since a sacrificial layer which needs to be released finally is arranged between the reflection layer 4 and the absorption plate 10, and the sacrificial layer needs to be corroded by a chemical reagent at the end of the infrared focal plane detector manufacturing process when the sacrificial layer is released, the hole-shaped structure on the absorption plate 10 is beneficial to increasing the contact area between the chemical reagent for releasing and the sacrificial layer, and the release rate of the sacrificial layer is accelerated. In addition, the area of the absorption plate 10 is larger than that of the beam structure 11, the hole-shaped structure on the absorption plate 10 is beneficial to releasing the internal stress of the absorption plate 10, optimizing the planarization degree of the absorption plate 10, and being beneficial to improving the structural stability of the absorption plate 10, so that the structural stability of the whole infrared focal plane detector is improved. In addition, at least one hole-shaped structure is formed on the beam structure 11, which is beneficial to further reducing the thermal conductance of the beam structure 11 and improving the infrared detection sensitivity of the infrared focal plane detector.

With reference to fig. 1 to 3, at least one layer of hermetic release isolation layer 3 may be included above the CMOS measurement circuitry 1, and the hermetic release isolation layer 3 is used to protect the CMOS measurement circuitry 1 from process influence during the release etching process for fabricating the CMOS infrared sensing structure 2. Optionally, the close release isolation layer 3 is located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 and/or in the CMOS infrared sensing structure 2, that is, the close release isolation layer 3 may be located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2, or the close release isolation layer 3 may be located in the CMOS infrared sensing structure 2, or the close release isolation layer 3 may be located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2, and the close release isolation layer 3 is located in the CMOS infrared sensing structure 2, and the close release isolation layer 3 is used for protecting the CMOS measurement circuit system 1 from erosion when a sacrificial layer is released by a corrosion process, and the close release isolation layer 3 at least includes a dielectric layer, and the dielectric material constituting the close release isolation layer 3 includes silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, silicon nitride oxide, silicon nitride oxide, silicon nitride oxide, silicon nitride oxide, silicon nitride oxide, silicon nitride oxide, silicon nitride oxide, silicon nitride oxide, silicon nitride, At least one of silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide, or aluminum oxide.

Fig. 2 and 3 exemplarily set the hermetic release barrier layer 3 in the CMOS infrared sensing structure 2, the hermetic release barrier layer 3 may be, for example, a dielectric layer or multiple dielectric layers above the metal interconnection layer of the reflective layer 4, where the hermetic release barrier layer 3 is exemplarily shown as a dielectric layer, and the material constituting the hermetic release barrier layer 3 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide, or aluminum oxide, and the thickness of the hermetic release barrier layer 3 is smaller than that of the sacrificial layer. The resonant cavity of the infrared focal plane detector is realized by releasing the vacuum cavity behind the sacrificial layer, the reflecting layer 4 is used as the reflecting layer of the resonant cavity, the sacrificial layer is positioned between the reflecting layer 4 and the suspended microbridge structure 40, and when at least one layer of closed release isolation layer 3 arranged on the reflecting layer 4 is used as a part of the resonant cavity, the materials such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide or aluminum oxide and the like are arranged, the reflecting effect of the reflecting layer 4 is not influenced, the height of the resonant cavity can be reduced, the thickness of the sacrificial layer is further reduced, and the release difficulty of the sacrificial layer is reduced. In addition, the sealed release isolation layer 3 and the columnar structure 6 are arranged to form a sealed structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Fig. 7 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. On the basis of the above embodiment, fig. 7 also sets the hermetic release isolation layer 3 in the CMOS infrared sensing structure 2, the hermetic release isolation layer 3 is located on one side of the reflection layer 4 away from the CMOS measurement circuit system 1, at least one dielectric layer 43 is disposed between the reflection layer 4 and the hermetic release isolation layer 3, fig. 7 exemplarily sets a dielectric layer 43 disposed between the reflection layer 4 and the hermetic release isolation layer 3, the material constituting the dielectric layer 43 includes at least one of germanium, silicon or germanium-silicon, and the dielectric layer 43 is used for adjusting the height of the infrared detector resonant cavity. Specifically, the close-release isolation layer 3 may be, for example, one or more dielectric layers located above the metal interconnection layer of the reflective layer 4, where the close-release isolation layer 3 is exemplarily shown as one dielectric layer, and the close-release isolation layer 3 and the dielectric layer 43 cover the columnar structure 6, in which case the material constituting the close-release isolation layer 3 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide, or aluminum oxide, and the thickness of the close-release isolation layer 3 and the thickness of the dielectric layer 43 are also smaller than the thickness of the sacrificial layer. Through setting up airtight isolated layer 3 and the cladding columnar structure 6 of dielectric layer 43 of releasing, can utilize airtight isolated layer 3 and dielectric layer 43 of releasing as the support of columnar structure 6 department on the one hand, improved columnar structure 6's stability, guarantee columnar structure 6 and unsettled microbridge structure 40 and support base 42's electricity and be connected. On the other hand, the airtight release insulating layer 3 and the dielectric layer 43 covering the columnar structure 6 can reduce the contact between the columnar structure 6 and the external environment, reduce the contact resistance between the columnar structure 6 and the external environment, further reduce the noise of the pixel of the infrared focal plane detector, improve the detection sensitivity of the infrared detection sensor, and simultaneously prevent the electrical breakdown of the metal exposed outside the columnar structure 6. Similarly, the resonant cavity of the infrared focal plane detector is realized by the vacuum cavity after releasing the sacrificial layer, the reflective layer 4 is used as the reflective layer of the resonant cavity, the sacrificial layer is positioned between the reflective layer 4 and the suspended microbridge structure 40, at least one layer of the closed release isolation layer 3 positioned on the reflective layer 4 is selected from silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide or aluminum oxide and other materials as a part of the resonant cavity, at the same time, the dielectric layer 43 positioned between the closed release isolation layer 3 and the reflective layer 4 is selected from at least one of silicon, germanium or germanium-silicon materials as a part of the resonant cavity, and the high transmittance characteristic of silicon, germanium or germanium-silicon to infrared light enables the closed release isolation layer 3 and the dielectric layer 43 not to influence the reflection effect of the reflective layer 4, and the height of the resonant cavity can be greatly reduced, thereby reducing the thickness of the sacrificial layer, the release difficulty of the sacrificial layer is reduced. In addition, the sealed release isolation layer 3 and the columnar structure 6 are arranged to form a sealed structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Fig. 8 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. Unlike the infrared focal plane detector having the structure shown in the above-mentioned embodiment, in the infrared focal plane detector having the structure shown in fig. 8, the hermetic release insulating layer 3 is located at the interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2, for example, the hermetic release insulating layer 3 is located between the reflective layer 4 and the CMOS measurement circuit system 1, that is, the hermetic release insulating layer 3 is located below the metal interconnection layer of the reflective layer 4, and the supporting base 42 is electrically connected to the CMOS measurement circuit system 1 through a through hole penetrating through the hermetic release insulating layer 3. Specifically, because the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are both formed by using a CMOS process, after the CMOS measurement circuit system 1 is formed, a wafer including the CMOS measurement circuit system 1 is formed and transferred to a next process to form the CMOS infrared sensing structure 2, if there is no insulating layer as a barrier when a sacrificial layer with a thickness of about 2um is corroded, a circuit will be affected, and in order to ensure that a medium on the CMOS measurement circuit system is not corroded when the sacrificial layer is released, the embodiment of the present disclosure provides a sealed release insulating layer 3 at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2. After the CMOS measuring circuit system 1 is prepared and formed, a closed release isolation layer 3 is prepared and formed on the CMOS measuring circuit system 1, the CMOS measuring circuit system 1 is protected by the closed release isolation layer 3, in order to ensure the electric connection between the support base 42 and the CMOS measuring circuit system 1, after the closed release isolation layer 3 is prepared and formed, a through hole is formed in the area of the closed release isolation layer 3 corresponding to the support base 42 by adopting an etching process, and the support base 42 is electrically connected with the CMOS measuring circuit system 1 through the through hole. In addition, the closed release isolation layer 3 and the support base 42 are arranged to form a closed structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Illustratively, the material constituting the hermetic release barrier layer 3 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide, or aluminum oxide. Specifically, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, titanium oxide, or aluminum oxide are all CMOS process corrosion resistant materials, i.e., these materials are not corroded by the sacrificial layer release agent, so the hermetic release barrier layer 3 can be used to protect the CMOS measurement circuitry 1 from corrosion when the corrosion process is performed to release the sacrificial layer. In addition, the closed release isolation layer 3 covers the CMOS measurement circuit system 1, and the closed release isolation layer 3 can also be used for protecting the CMOS measurement circuit system 1 from being influenced by the process in the release etching process for manufacturing the CMOS infrared sensing structure 2. In addition, when being provided with the airtight release insulating layer 3 of at least one deck on the reflection stratum 4, the material that sets up to constitute airtight release insulating layer 3 includes silicon oxide, silicon nitride, silicon oxynitride, carborundum, silicon oxycarbide, silicon carbonitride, amorphous carbon, at least one in titanium oxide or the aluminium oxide, when setting up airtight release insulating layer 3 and improving the stability of columnar structure 6, airtight release insulating layer 3 can hardly influence the reflection course in the resonant cavity, can avoid airtight release insulating layer 3 to influence the reflection course of resonant cavity, and then avoid airtight release insulating layer 3 to infrared focal plane detector detection sensitivity's influence.

Referring to fig. 1 to 8, a CMOS fabrication process of the CMOS infrared sensing structure 2 includes a Metal interconnection process, a via process, an imd (inter Metal dielectric) process, and an RDL (redistribution) process, the CMOS infrared sensing structure 2 includes at least two Metal interconnection layers, at least two dielectric layers, and a plurality of interconnection vias, the dielectric layers include at least a sacrificial layer and a thermal sensitive dielectric layer, the Metal interconnection layers include at least a reflective layer 4 and an electrode layer, the thermal sensitive dielectric layer includes a thermal sensitive material having a temperature coefficient of resistance greater than a predetermined value, for example, the temperature coefficient of resistance may be greater than or equal to 0.015/K, the thermal sensitive material having a temperature coefficient of resistance greater than the predetermined value forms the thermal sensitive dielectric layer, and the thermal sensitive dielectric layer is configured to convert a temperature change corresponding to infrared radiation absorbed by the thermal sensitive dielectric layer into a resistance change, the infrared target signal is then converted into a signal that can be read electrically by the CMOS measurement circuitry 1. In addition, the heat-sensitive dielectric layer comprises a heat-sensitive material with the resistance temperature coefficient larger than a set value, the resistance temperature coefficient can be larger than or equal to 0.015/K, and the detection sensitivity of the infrared focal plane detector can be improved.

Specifically, the metal interconnection process is used to electrically connect the upper and lower metal interconnection layers, for example, the conductive layer in the columnar structure 6 and the support base 42, the via process is used to form an interconnection via connecting the upper and lower metal interconnection layers, for example, to form interconnect vias connecting conductive layers in the columnar structures 6 with the support pedestals 42, an IMD process is used to achieve isolation between the upper and lower metal interconnect layers, i.e. electrical insulation, e.g. between the absorber plate 10 and the electrode layer in the beam structure 11 and the reflector plate 41, RDL process, i.e. redistribution layer process, in particular redistribution layer metal on top of the top layer metal of the circuit and metal pillars with the top layer metal of the circuit, for example, tungsten columns are electrically connected, the reflective layer 4 in the infrared focal plane detector can be further prepared on the top metal of the CMOS measurement circuitry 1 by using an RDL process, and the supporting base 42 on the reflective layer 4 is electrically connected with the top metal of the CMOS measurement circuitry 1. In addition, as shown in fig. 2, the CMOS manufacturing process of the CMOS measurement circuit system 1 may also include a metal interconnection process and a via process, the CMOS measurement circuit system 1 includes metal interconnection layers 101, dielectric layers 102 and a silicon substrate 103 at the bottom, which are arranged at intervals, and the upper and lower metal interconnection layers 101 are electrically connected through vias 104.

With reference to fig. 1 to 8, the CMOS infrared sensing structure 2 includes a resonant cavity formed by a reflective layer 4 and a heat sensitive medium layer, a suspended microbridge structure 40 for controlling heat transfer, and a columnar structure 6 having electrical connection and support functions, the CMOS measurement circuit system 1 is configured to measure and process an array resistance value formed by one or more CMOS infrared sensing structures 2 and convert an infrared signal into an image electrical signal, the infrared focal plane detector includes a plurality of infrared focal plane detector pixels arranged in an array, and each infrared focal plane detector pixel includes a CMOS infrared sensing structure 2. Specifically, the resonant cavity may be formed by a cavity between the reflective layer 4 and the heat-sensitive medium layer in the absorption plate 10, for example, the infrared light penetrates through the absorption plate 10 to be reflected back and forth in the resonant cavity, so as to improve the detection sensitivity of the infrared focal plane detector, and due to the arrangement of the columnar structure 6, the beam structure 11 and the absorption plate 10 form the suspended micro-bridge structure 10 for controlling the heat transfer, and the columnar structure 6 is electrically connected with the supporting base 42 and the corresponding beam structure 11, and is used for supporting the suspended micro-bridge structure 40 located on the columnar structure 6.

Fig. 9 is a schematic structural diagram of a CMOS measurement circuit system according to an embodiment of the present disclosure. With reference to fig. 1 to 9, the CMOS measurement circuit system 1 includes a bias voltage generation circuit 7, a column-level analog front-end circuit 8 and a row-level circuit 9, an input end of the bias voltage generation circuit 7 is connected to an output end of the row-level circuit 9, an input end of the column-level analog front-end circuit 8 is connected to an output end of the bias voltage generation circuit 7, the row-level circuit 9 includes a row-level mirror image element Rsm and a row selection switch K1, and the column-level analog front-end circuit 8 includes a blind image element RD; the row-level circuit 9 is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the timing sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit 8 under the action of the bias generating circuit 7 to perform current-voltage conversion output; the row stage circuit 9 outputs a third bias voltage VRsm to the bias generation circuit 7 when being controlled by the row selection switch K1 to be gated, the bias generation circuit 7 outputs a first bias voltage V1 and a second bias voltage V2 according to the input constant voltage and the third bias voltage VRsm, and the column stage analog front-end circuit 8 obtains two currents according to the first bias voltage V1 and the second bias voltage V2, performs transimpedance amplification on the difference between the two generated currents, and outputs the amplified current as an output voltage.

Specifically, the row-level circuit 9 includes a row-level mirror image element Rsm and a row selection switch K1, and the row-level circuit 9 is configured to generate a third bias voltage VRsm according to a gating state of the row selection switch K1. Illustratively, the row-level image elements Rsm may be subjected to a light-shielding process such that the row-level image elements Rsm are subjected to a fixed radiation by a light-shielding sheet having a temperature constantly equal to a substrate temperature, the row selection switch K1 may be implemented by a transistor, the row selection switch K1 is closed, and the row-level image elements Rsm are connected to the bias generation circuit 7, that is, the row-level circuit 9 outputs the third bias voltage VRsm to the bias generation circuit 7 when being gated by the row selection switch K1. The bias generation circuit 7 may include a first bias generation circuit 71 and a second bias generation circuit 72, the first bias generation circuit 71 being configured to generate a first bias voltage V1 according to an input constant voltage, which may be, for example, a positive power supply signal with a constant voltage. The second bias generation circuit 72 may include a bias control sub-circuit 721 and a plurality of gate driving sub-circuits 722, the bias control sub-circuit 721 controlling the gate driving sub-circuits 722 to generate the corresponding second bias voltages V2, respectively, according to the third bias voltage VRsm.

The column-level analog front-end circuit 8 includes a plurality of column control sub-circuits 81, the column control sub-circuits 81 are disposed in correspondence with the gate driving sub-circuits 722, and exemplarily, the column control sub-circuits 81 may be disposed in one-to-one correspondence with the gate driving sub-circuits 722, and the gate driving sub-circuits 722 are configured to provide the second bias voltage V2 to the corresponding column control sub-circuits 81 according to their own gate states. For example, it may be set that when the gate driving sub-circuit 722 is gated, the gate driving sub-circuit 722 supplies the second bias voltage V2 to the corresponding column control sub-circuit 81; when the gate driving sub-circuit 722 is not gated, the gate driving sub-circuit 722 stops supplying the second bias voltage V2 to the corresponding column control sub-circuit 81.

The column-level analog front-end circuit 8 comprises an effective pixel RS and a blind pixel RD, the column control sub-circuit is used for generating a first current I1 according to a first bias voltage V1 and the blind pixel RD, generating a second current I2 according to a second bias voltage V2 and the effective pixel RS, performing transimpedance amplification on a difference value of the first current I1 and the second current I2, and outputting the difference value, and the row-level mirror image pixel Rsm and the effective pixel RS have the same temperature drift amount at the same ambient temperature.

Illustratively, the row-level image elements Rsm are thermally insulated from the CMOS measurement circuitry 1 and are shaded, and the row-level image elements Rsm are subjected to a fixed radiation from a shade sheet having a temperature constantly equal to the substrate temperature. The absorption plate 10 of the active pixel RS is thermally insulated from the CMOS measurement circuitry 1 and the active pixel RS receives external radiation. The absorbing plates 10 of the row-level mirror image elements Rsm and the effective elements RS are thermally insulated from the CMOS measuring circuit system 1, so that the row-level mirror image elements Rsm and the effective elements RS have a self-heating effect.

When the corresponding row-level mirror image element Rsm is gated by the row selection switch K1, the resistance value of both the row-level mirror image element Rsm and the effective element RS changes due to joule heat, but when the row-level mirror image element Rsm and the effective element RS are subjected to the same fixed radiation, the resistance value of the row-level mirror image element Rsm and the resistance value of the effective element RS are the same, the temperature coefficients of the row-level mirror image element Rsm and the temperature coefficient of the effective element RS are also the same, the temperature drift amounts of the row-level mirror image element Rsm and the effective element RS at the same ambient temperature are the same, the change of the row-level mirror image element Rsm and the effective element RS at the same ambient temperature is synchronized, the resistance value change of the row-level mirror image element Rsm and the effective element RS due to the self-heating effect is effectively compensated, and the stable output of the CMOS measurement circuit system 1 is realized.

In addition, by arranging the second bias generating circuit 72 to include a bias control sub-circuit 721 and a plurality of gate driving sub-circuits 722, the bias control sub-circuit 721 is configured to control the gate driving sub-circuits 722 to generate corresponding second bias voltages V2 respectively according to the row control signal, so that each row of pixels has one path to drive the whole columns of pixels of the row individually, the requirement for the second bias voltage V2 is reduced, that is, the driving capability of the bias generating circuit 7 is improved, and the CMOS measurement circuit system 1 is advantageously used to drive a larger-scale infrared focal plane detector pixel array. In addition, the specific detailed operation principle of the CMOS measurement circuit system 1 is well known to those skilled in the art and will not be described herein.

Alternatively, the CMOS infrared sensing structure 2 may be disposed on a metal interconnect layer of the CMOS measurement circuitry 1 or fabricated on the same layer. Specifically, the metal interconnection layer of the CMOS measurement circuitry 1 may be a top metal layer in the CMOS measurement circuitry 1, and in conjunction with fig. 1 to 8, the CMOS infrared sensing structure 2 may be fabricated on the metal interconnection layer of the CMOS measurement circuitry 1, and the CMOS infrared sensing structure 2 is electrically connected to the CMOS measurement circuitry 1 through a supporting base 42 on the metal interconnection layer of the CMOS measurement circuitry 1, so as to transmit the electrical signal converted by the infrared signal to the CMOS measurement circuitry 1.

Fig. 10 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. As shown in fig. 10, the CMOS infrared sensing structure 2 may also be prepared on the same layer as the metal interconnection layer of the CMOS measurement circuitry 1, that is, the CMOS measurement circuitry 1 and the CMOS infrared sensing structure 2 are arranged on the same layer, for example, as shown in fig. 10, the CMOS infrared sensing structure 2 may be arranged on one side of the CMOS measurement circuitry 1, and the top of the CMOS measurement circuitry 1 may also be provided with a hermetic release isolation layer 3 to protect the CMOS measurement circuitry 1.

Optionally, the absorption plate 10 is used for absorbing an infrared target signal and converting the infrared target signal into an electrical signal, the absorption plate 10 includes a metal interconnection layer and at least one thermal sensitive medium layer, and the metal interconnection layer in the absorption plate 10 is an electrode layer in the absorption plate 10 and is used for transmitting the electrical signal converted from the infrared signal. The beam structure 11 and the columnar structure 6 are used for transmitting electric signals and for supporting and connecting the absorption plate 10, the electrode layer in the absorption plate 10 comprises two patterned electrode structures, the two patterned electrode structures respectively output positive electric signals and grounding electric signals, the positive electric signals and the grounding electric signals are transmitted to the supporting base 42 electrically connected with the columnar structure 6 through the different beam structures 11 and the different columnar structures 6 and then transmitted to the CMOS measuring circuit system 1, the beam structure 11 at least comprises a metal interconnection layer, the metal interconnection layer in the beam structure 11 is the electrode layer in the beam structure 11, and the electrode layer in the beam structure 11 is electrically connected with the electrode layer in the absorption plate 10. The beam structure 11 and the CMOS measurement circuit system 1 are connected by the columnar structure 6 through a metal interconnection process and a through hole process, the upper side of the columnar structure 6 is electrically connected to an electrode layer in the beam structure 11 through a through hole penetrating through the sacrificial layer, the lower side of the columnar structure 6 is electrically connected to a corresponding support base 42 through a through hole penetrating through a dielectric layer on the support base 42, and thus the electrode layer in the beam structure 11 is electrically connected to the corresponding support base 42 through the corresponding columnar structure 6. The reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, that is, the reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, and the reflecting layer 4 comprises at least one metal interconnection layer which is used for forming a supporting base 42 and is also used for forming the reflecting plate 41.

Alternatively, the beam structure 11 may be configured to include the electrode layer 14, or the beam structure 11 includes the first dielectric layer 13 and the electrode layer 14, or the beam structure 11 includes the electrode layer 14 and the second dielectric layer 15, or the beam structure 11 includes the electrode layer 14 and the heat sensitive dielectric layer 12, or the beam structure 11 includes the first dielectric layer 13, the electrode layer 14 and the second dielectric layer 15, or the beam structure 11 includes the first dielectric layer 13, the electrode layer 14 and the heat sensitive dielectric layer 12, or the beam structure 11 includes the electrode layer 14, the heat sensitive dielectric layer 12 and the second dielectric layer 15, or the beam structure 11 includes the first dielectric layer 13, the electrode layer 14, the heat sensitive dielectric layer 12 and the second dielectric layer 15, or the absorber plate 10 includes the electrode layer 14 and the heat sensitive dielectric layer 12, or the absorber plate 10 includes the first dielectric layer 13, the electrode layer 14 and the heat sensitive dielectric layer 12, or the absorber plate 10 includes the electrode layer 14, the electrode layer 14, The heat sensitive medium layer 12 and the second medium layer 15, or the absorber plate 10 includes the first medium layer 13, the electrode layer 14, the heat sensitive medium layer 12 and the second medium layer 15; the material forming the first dielectric layer 13 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, or amorphous carbon, the material forming the second dielectric layer 15 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, or amorphous carbon, the material forming the thermally sensitive dielectric layer 12 includes at least one of materials having a temperature coefficient of resistance greater than a set value, which is prepared from titanium oxide, vanadium titanium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous germanium-silicon-oxygen, silicon, germanium-silicon-oxygen, amorphous carbon, graphene, yttrium barium copper-oxygen, copper, or platinum, and the set value may be, for example, 0.015/K.

Specifically, with reference to fig. 2, fig. 3, fig. 7, and fig. 10, the beam structure 11 may be arranged along a direction away from the CMOS measurement circuit system 1, the first dielectric layer 13, the electrode layer 14, and the heat sensitive dielectric layer 12 are sequentially included in the beam structure 11, and the absorption plate 10 sequentially includes the first dielectric layer 13, the electrode layer 14, and the heat sensitive dielectric layer 12, that is, the same film layers of the beam structure 11 and the absorption plate 10 may be simultaneously manufactured, when a material constituting the first dielectric layer 13 includes titanium oxide or amorphous carbon, the first dielectric layer 13 serves as a support layer while serving as a heat sensitive dielectric layer, and when a material constituting the first dielectric layer 13 includes silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide, the first dielectric layer 13 serves as a support layer. Fig. 11 is a schematic cross-sectional structure view of another infrared focal plane detector pixel provided in the embodiment of the present disclosure, and fig. 12 is a schematic cross-sectional structure view of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. With reference to fig. 11 and 12, it may be arranged that, along a direction away from the CMOS measurement circuit system 1, the beam structure 11 sequentially includes a first dielectric layer 13, an electrode layer 14, and a second dielectric layer 15, and the absorption plate 10 sequentially includes the first dielectric layer 13, the electrode layer 14, the heat-sensitive dielectric layer 12, and the second dielectric layer 15, where the first dielectric layer 13 serves as a supporting layer, the second dielectric layer 15 serves as a passivation layer, and the heat-sensitive dielectric layer 12 converts an infrared signal into an electrical signal. Corresponding to the absorption plate 10 and the beam structure 11, the electrode layer 14 is located in a closed space formed by the first dielectric layer 13, namely the support layer, and the second dielectric layer 15, namely the passivation layer, so that the protection of the electrode layer 14 in the absorption plate 10 and the beam structure 11 is realized. Specifically, the supporting layer is used for supporting an upper film layer in the suspended micro-bridge structure 40 after the sacrificial layer is released, the heat sensitive medium layer 12 is used for converting infrared temperature detection signals into infrared detection electric signals, the electrode layer 14 is used for transmitting the infrared detection electric signals converted by the heat sensitive medium layer 12 to the CMOS measurement circuit system 1 through the beam structures 11 on the left side and the right side, the two beam structures 11 respectively transmit positive and negative signals of the infrared detection electric signals, a reading circuit in the CMOS measurement circuit system 1 realizes non-contact infrared temperature detection through analysis of the acquired infrared detection electric signals, and the passivation layer is used for protecting the electrode layer 14 from oxidation or corrosion.

Illustratively, on the premise that the material of the first dielectric layer 13 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide or amorphous carbon, and the material of the second dielectric layer 15 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide or amorphous carbon, the following conditions can be preferably satisfied in the beam structure 11 and the film layer of the absorber plate 10: in the first case, the beam structure 11 may be provided with an electrode layer 14, and the absorber plate 10 sequentially includes the electrode layer 14 and the heat-sensitive medium layer 12 or the absorber plate 10 sequentially includes the heat-sensitive medium layer 12 and the electrode layer 14 along the direction away from the CMOS measurement circuit system 1; in a second case, the beam structure 11 may include an electrode layer 14, and the absorption plate 10 sequentially includes a first dielectric layer 13, an electrode layer 14 and a heat-sensitive dielectric layer 12 or the absorption plate 10 sequentially includes a first dielectric layer 13, a heat-sensitive dielectric layer 12 and an electrode layer 14 along a direction away from the CMOS measurement circuit system 1; in a third case, the beam structure 11 may include an electrode layer 14, and along a direction away from the CMOS measurement circuit system 1, the absorption plate 10 sequentially includes the electrode layer 14, the thermal sensitive medium layer 12, and the second medium layer 15, or the absorption plate 10 sequentially includes the thermal sensitive medium layer 12, the electrode layer 14, and the second medium layer 15; a fourth case may be that the beam structure 11 comprises an electrode layer 14, and the absorber plate 10 comprises a first dielectric layer 13, an electrode layer 14, a thermally sensitive dielectric layer 12 and a second dielectric layer 15 in that order, or the absorber plate 10 comprises a first dielectric layer 13, a thermally sensitive dielectric layer 12, an electrode layer 14 and a second dielectric layer 15 in that order, in a direction away from the CMOS measurement circuitry 1.

A fifth case may be set along a direction away from the CMOS measurement circuit system 1, where the beam structure 11 sequentially includes the first dielectric layer 13 and the electrode layer 14 or the beam structure 11 sequentially includes the electrode layer 14 and the second dielectric layer 15, and the absorption plate 10 sequentially includes the electrode layer 14 and the heat-sensitive dielectric layer 12 or the absorption plate 10 sequentially includes the heat-sensitive dielectric layer 12 and the electrode layer 14; in a sixth case, the beam structure 11 sequentially includes a first dielectric layer 13 and an electrode layer 14 or the beam structure 11 sequentially includes an electrode layer 14 and a second dielectric layer 15, and the absorption plate 10 sequentially includes a first dielectric layer 13, an electrode layer 14 and a heat-sensitive dielectric layer 12 or the absorption plate 10 sequentially includes a first dielectric layer 13, a heat-sensitive dielectric layer 12 and an electrode layer 14; in a seventh case, the beam structure 11 may be arranged along a direction away from the CMOS measurement circuit system 1, and sequentially includes the first dielectric layer 13 and the electrode layer 14, or the beam structure 11 sequentially includes the electrode layer 14 and the second dielectric layer 15, and the absorption plate 10 sequentially includes the electrode layer 14, the heat-sensitive dielectric layer 12, and the second dielectric layer 15, or the absorption plate 10 sequentially includes the heat-sensitive dielectric layer 12, the electrode layer 14, and the second dielectric layer 15; in an eighth case, it may be set that in a direction away from the CMOS measurement circuit system 1, the beam structure 11 sequentially includes a first dielectric layer 13 and an electrode layer 14 or the beam structure 11 sequentially includes an electrode layer 14 and a second dielectric layer 15, and the absorber plate 10 sequentially includes a first dielectric layer 13, an electrode layer 14, a heat-sensitive dielectric layer 12 and a second dielectric layer 15 or the absorber plate 10 sequentially includes a first dielectric layer 13, a heat-sensitive dielectric layer 12, an electrode layer 14 and a second dielectric layer 15.

A ninth case may be set in a direction away from the CMOS measurement circuit system 1, where the beam structure 11 sequentially includes the electrode layer 14 and the heat sensitive medium layer 12, and the absorption plate 10 sequentially includes the electrode layer 14 and the heat sensitive medium layer 12, or the beam structure 11 sequentially includes the heat sensitive medium layer 12 and the electrode layer 14, and the absorption plate 10 sequentially includes the heat sensitive medium layer 12 and the electrode layer 14; in a tenth case, the beam structure 11 may be arranged along a direction away from the CMOS measurement circuit system 1, and the beam structure 11 sequentially includes the electrode layer 14 and the heat sensitive medium layer 12, and the absorption plate 10 sequentially includes the first medium layer 13, the electrode layer 14, and the heat sensitive medium layer 12, or the beam structure 11 sequentially includes the heat sensitive medium layer 12 and the electrode layer 14, and the absorption plate 10 sequentially includes the first medium layer 13, the heat sensitive medium layer 12, and the electrode layer 14; in an eleventh case, the beam structure 11 may be arranged along a direction away from the CMOS measurement circuit system 1, and the beam structure 11 sequentially includes the electrode layer 14 and the heat sensitive medium layer 12, and the absorption plate 10 sequentially includes the electrode layer 14, the heat sensitive medium layer 12, and the second medium layer 15, or the beam structure 11 sequentially includes the heat sensitive medium layer 12 and the electrode layer 14, and the absorption plate 10 sequentially includes the heat sensitive medium layer 12, the electrode layer 14, and the second medium layer 15; a twelfth case may be that, along a direction away from the CMOS measurement circuit system 1, the beam structure 11 sequentially includes the electrode layer 14 and the heat sensitive medium layer 12, and the absorption plate 10 sequentially includes the first medium layer 13, the electrode layer 14, the heat sensitive medium layer 12, and the second medium layer 15, or the beam structure 11 sequentially includes the heat sensitive medium layer 12 and the electrode layer 14, and the absorption plate 10 sequentially includes the first medium layer 13, the heat sensitive medium layer 12, the electrode layer 14, and the second medium layer 15.

Referring to the above discussion logics of different cases, when the material forming the first dielectric layer 13 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, or amorphous carbon, and the material forming the second dielectric layer 15 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, or amorphous carbon, there may be a plurality of combinations of the case of selecting one film layer for the beam structure 11 and the case of selecting one film layer for the absorption plate 10, that is, the case of selecting one film layer for the beam structure 11 and the case of selecting one film layer for the absorption plate 10 may be combined arbitrarily to form an infrared focal plane detector with a plurality of structures, which is not described herein again. It should be noted that, whatever the above-mentioned film layer arrangement scheme of the beam structure 11 and the absorption plate 10, it is necessary to ensure that at least the electrode layer 14 is in the beam structure 11, and at least the electrode layer 14 is in the absorption plate 12, and the dielectric layer is used as a heat sensitive dielectric layer. In addition, when the material forming the thermal sensitive medium layer 12 includes amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium, the thermal sensitive medium layer 12 is preferably wrapped by the medium layer to prevent the etching gas releasing the sacrificial layer from corroding the thermal sensitive medium layer 12.

Illustratively, the material constituting the electrode layer 14 may be configured to include at least one of titanium, titanium nitride, tantalum nitride, titanium tungsten alloy, nickel chromium alloy, nickel platinum alloy, nickel silicon alloy, nickel, chromium, platinum, tungsten, aluminum, or copper, wherein when the material of the electrode layer 14 is at least one of titanium, titanium nitride, tantalum, or tantalum nitride, the electrode layer 14 is preferably configured to be coated with the first dielectric layer 13 and the second dielectric layer 15, so as to prevent the electrode layer 14 from being affected by the etching process. In addition, in the above-mentioned embodiment, at least one hole-like structure may be formed on the absorption plate 10, the hole-like structure at least penetrates through the medium layer in the absorption plate 10, the beam structure 11 at least forms one hole-like structure, when the beam structure 11 only includes the electrode layer 14, the hole-like structure on the beam structure 11 penetrates through the electrode layer 14 in the beam structure 11, when the beam structure 11 includes the medium layer, the hole-like structure at least penetrates through the medium layer in the beam structure 11, the infrared focal plane detector is exemplified by the infrared focal plane detector having the structure shown in fig. 11 and 12, at this time, the hole-like structure on the absorption plate 10 may penetrate through the first medium layer 13 and the second medium layer 15 in the absorption plate 10, the hole-like structure on the absorption plate 10 may penetrate through the first medium layer 13, the electrode layer 14 and the second medium layer 15 in the absorption plate 10, and the hole-like structure on the absorption plate 10 may penetrate through the first medium layer 13, the second medium layer 15 in the absorption plate 10, The beam structure 11 may have a hole structure penetrating through the first dielectric layer 13 and the second dielectric layer 15 at a position where the electrode layer 14 is not disposed in the beam structure 11, or the beam structure 11 may have a hole structure penetrating through the first dielectric layer 13, the electrode layer 14 and the second dielectric layer 15 in the beam structure 11.

Optionally, the infrared focal plane detector may further include a metamaterial structure and/or a polarization structure, and the metamaterial structure or the polarization structure is at least one metal interconnection layer. Fig. 13 is a schematic perspective view of another infrared focal plane detector pixel provided in the embodiment of the present disclosure, and as shown in fig. 13, a metal interconnection layer forming a metamaterial structure may include a plurality of metal repeating units 20 arranged in an array, each metal repeating unit includes two L-shaped patterned structures 21 arranged diagonally, and at this time, an infrared absorption spectrum band of the infrared focal plane detector is a 3 micron to 30 micron band. As shown in fig. 14, a plurality of patterned hollow structures 22 arranged in an array may be disposed on the metal interconnection layer forming the metamaterial structure, the patterned hollow structures 22 are in an open ring shape, and an infrared absorption spectrum band of the infrared focal plane detector is a band from 3 micrometers to 30 micrometers. As shown in fig. 15, a plurality of linear stripe structures 23 and a plurality of folded stripe structures 24 are disposed on the metal interconnection layer forming the metamaterial structure, and the linear stripe structures 23 and the folded stripe structures 24 are alternately arranged along a direction perpendicular to the linear stripe structures 23, where an infrared absorption spectrum band of the infrared focal plane detector is a band of 8 micrometers to 24 micrometers. As shown in fig. 16, a plurality of patterned hollow structures 25 arranged in an array may be disposed on the metal interconnection layer forming the metamaterial structure, the patterned hollow structures 25 are regular hexagons, and the infrared absorption spectrum band of the infrared focal plane detector is a 3-30 μm band. It should be noted that, in the embodiments of the present disclosure, specific patterns on the metal interconnection layer constituting the metamaterial structure are not limited, and it is sufficient to ensure that the repeated patterns can realize the functions of the metamaterial structure or the polarization structure.

Specifically, the metamaterial is a material which is based on the generalized snell's law and performs electromagnetic or optical beam regulation and control by controlling wave front phase, amplitude and polarization, and can be also called as a super surface or a super structure, wherein the super surface or the super structure is an ultrathin two-dimensional array plane, and the characteristics of electromagnetic waves such as phase, polarization mode, propagation mode and the like can be flexibly and effectively manipulated. The disclosed embodiments form an electromagnetic metamaterial structure using the patterned structure as shown in figures 13-16, namely, an artificial composite structure or a composite material with supernormal electromagnetic property is formed to realize the cutting of the electromagnetic wave and light wave properties, therefore, an electromagnetic wave absorption special device is obtained, the metamaterial structure formed by the patterning structure is combined with the infrared focal plane detector structure, infrared electromagnetic waves absorbed by the metamaterial structure can enhance infrared electromagnetic wave signals absorbed by the infrared focal plane detector, the infrared electromagnetic waves absorbed by the metamaterial structure are overlapped with the infrared electromagnetic waves absorbed by the microbridge detector structure, the infrared electromagnetic waves absorbed by the metamaterial structure are coupled with components of incident infrared electromagnetic waves, namely, the intensity of the absorbed infrared electromagnetic wave signals is increased due to the arrangement of the metamaterial structure, and therefore the absorption rate of the infrared focal plane detector to the incident infrared electromagnetic waves is improved.

Fig. 17 is a schematic top view of a polarization structure according to an embodiment of the present disclosure. As shown in fig. 17, the polarization structure 26 may include a plurality of gratings 27 arranged in sequence, an interval between adjacent gratings 27 is 10nm to 500nm, the gratings 27 may be linear as shown in fig. 17, or may be curved as shown in fig. 18 and 19, the gratings 27 in the polarization structure 26 may be rotated or combined at any angle, and the polarization structure 26 may be disposed such that the CMOS sensing structure absorbs polarized light in a specific direction. Illustratively, the grating 27 may be a structure formed by etching a metal thin film, i.e., a metal interconnection layer. Specifically, polarization is an important information of light, and polarization detection can expand the information quantity from three dimensions, such as light intensity, light spectrum and space, to seven dimensions, such as light intensity, light spectrum, space, polarization degree, polarization azimuth angle, polarization ellipse ratio and rotation direction, and since the polarization degree of the ground object background is far less than that of the artificial target, the infrared polarization detection technology has very important application in the field of space remote sensing. In the existing polarization detection system, a polarization element is independent from a detector, and a polarizing film needs to be added on a lens of the whole machine or a polarization lens needs to be designed. The existing polarization detection system, which acquires polarization information by rotating a polarization element, has disadvantages of complicated optical elements and complicated optical path system. In addition, the polarization image acquired by combining the polarizer and the detector needs to be processed by an image fusion algorithm, which is not only complex but also relatively inaccurate.

According to the polarization structure 26 and the uncooled infrared focal plane detector, the polarization structure is monolithically integrated, so that monolithic integration of the polarization sensitive infrared focal plane detector can be achieved, difficulty of optical design is greatly reduced, an optical system is simplified, optical elements are reduced, and cost of the optical system is reduced. In addition, the image of the collection of the polarization uncooled infrared focal plane detector integrated through the single chip is original infrared image information, and the CMOS measuring circuit system 1 can obtain accurate image information only by processing signals detected by the infrared focal plane detector without carrying out image fusion of the existing detector, thereby greatly improving the authenticity and the effectiveness of the image. In addition, polarization structure 26 also can be located absorption plate 10 top and not with absorption plate 10 contact setting, polarization structure 26 can be for being located the unsettled structure of unsettled microbridge structure 40 top promptly, polarization structure 26 and unsettled microbridge structure 40 can adopt the mode of post connection support or the mode that adopts the bonding to support, polarization structure 26 can the one-to-one bonding with infrared focal plane detector pixel, also can adopt the mode of whole chip bonding. Therefore, the independently suspended metal grating structure cannot cause deformation of the infrared sensitive micro-bridge structure, and the heat-sensitive characteristic of the sensitive film cannot be influenced.

Illustratively, referring to fig. 1 to fig. 19, when the suspension micro-bridge structure 40 includes a first dielectric layer 13 and a second dielectric layer 15, the meta-material structure or the polarization structure may be at least one metal interconnection layer on a side of the first dielectric layer 13 adjacent to the CMOS measurement circuit system 1, for example, the metal interconnection layer constituting the meta-material structure or the polarization structure may be disposed on a side of the first dielectric layer 13 adjacent to the CMOS measurement circuit system 1 and in contact with the first dielectric layer 13, that is, the metal interconnection layer is located at the lowest position of the suspension micro-bridge structure 40. For example, the meta-material structure or the polarization structure may also be at least one metal interconnection layer on the side of the second dielectric layer 15 away from the CMOS measurement circuitry 1, and for example, the metal interconnection layer constituting the meta-material structure or the polarization structure may be located on the side of the second dielectric layer 15 away from the CMOS measurement circuitry 1 and in contact with the second dielectric layer 15, that is, the metal interconnection layer is located at the uppermost portion of the suspended microbridge structure 40. Illustratively, the metamaterial structure or the polarization structure may also be at least one metal interconnection layer located between the first dielectric layer 13 and the second dielectric layer 15 and electrically insulated from the electrode layer 14, for example, the metal interconnection layer constituting the metamaterial structure or the polarization structure may be located between the first dielectric layer 13 and the electrode layer 14 and electrically insulated from the electrode layer 14 or located between the second dielectric layer 15 and the electrode layer 14 and electrically insulated from the electrode layer 14. For example, the electrode layer 14 may also be disposed as a metamaterial structure layer or a polarization structure layer, that is, the patterned structure described in the above embodiments may be formed on the electrode layer 14.

Optionally, the columnar structure 6 may include at least one layer of solid columnar structure, the solid columnar structure includes the solid structure 601, as shown in fig. 3, a sidewall of the solid structure 601 may be disposed in contact with a sacrificial layer (not shown in fig. 3), a material constituting the solid structure 601 includes at least one of tungsten, copper, or aluminum, that is, the columnar structure 6 only includes a solid tungsten column, or a copper column, or an aluminum column, and the sidewall of the solid structure 601 is disposed in contact with the sacrificial layer, so that a manufacturing process of the columnar structure 6 is relatively simple and easy to implement, and it is beneficial to reduce a manufacturing difficulty of the entire infrared focal plane detector.

Fig. 20 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. Unlike the infrared focal plane detector of the structure shown in fig. 3, the infrared focal plane detector of the structure shown in fig. 20 is configured such that the sidewall of the solid structure 601 is covered with at least one dielectric layer 602 and the solid structure 601 is disposed in contact with one dielectric layer 602, fig. 20 exemplarily configures that the sidewall of the solid structure 601 is covered with one dielectric layer 602 and the solid structure 601 is disposed in contact with the dielectric layer 602, the material constituting the solid structure 601 includes at least one of tungsten, copper or aluminum, and the material constituting the dielectric layer 602 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, graphene, yttrium barium copper oxide, copper or platinum.

Specifically, at least one dielectric layer 602 coating the solid structure 601 can play a role of electrical insulation, and when the dielectric layer 602 is used to protect the solid structure 601 from being corroded by external materials, the dielectric layer 602 can be used as an auxiliary supporting structure of the columnar structure 6, and supports the suspended micro-bridge structure 40 together with the solid structure 601, which is beneficial to improving the mechanical stability of the columnar structure 6, so that the structural stability of the infrared sensor is improved. In addition, the material forming the dielectric layer 602 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, aluminum oxide, titanium oxide, vanadium titanium oxide, graphene, yttrium barium copper oxide, copper, or platinum, which are not corroded by xenon fluoride, chlorine gas, bromine gas, carbon tetrachloride, or chlorofluorohydrocarbon, and thus the dielectric layer 602 covering the solid structure 601 is not corroded when the sacrificial layer is corroded by xenon fluoride, chlorine gas, bromine gas, carbon tetrachloride, or chlorofluorohydrocarbon in the subsequent process steps. For example, as shown in fig. 20, the dielectric layer 602 covering the solid structure 601 may be set as the first dielectric layer 13 in the suspended microbridge structure 40, the dielectric layer covering the solid structure 601 may also be a separately manufactured dielectric layer, or the dielectric layer covering the solid structure 601 may also be set as the second dielectric layer 15 or the heat-sensitive dielectric layer 12 in the suspended microbridge structure 40.

Fig. 21 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. Unlike the infrared focal plane detector of the structure shown in fig. 3 and 20, the infrared focal plane detector of the structure shown in fig. 21 has a sidewall of the solid structure 601 and a surface of the solid structure 601 adjacent to the CMOS measurement circuitry 1 coated with at least one adhesion layer 603, fig. 21 exemplarily has a sidewall of the solid structure 601 and a surface of the solid structure 601 adjacent to the CMOS measurement circuitry 1 coated with an adhesion layer 603, a sidewall of the outermost periphery of the columnar structure 6, which is away from the solid structure 601, is coated with a dielectric layer 604, a material constituting the solid structure 601 includes at least one of tungsten, copper or aluminum, a material constituting the adhesion layer 603 includes at least one of titanium, titanium nitride, tantalum or tantalum nitride, a material constituting the dielectric layer 604 includes silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, aluminum oxide, silicon oxynitride, silicon carbide, aluminum oxide, or tantalum nitride, and a material constituting the dielectric layer 604, At least one of titanium oxide, vanadium oxide, titanium vanadium oxide, graphene, yttrium barium copper oxide, copper or platinum.

Specifically, adhesion layer 603 is used for reinforcing the connectivity between columnar structure 6 and the support base 42, including intensifier mechanical connection performance, promote structural stability, also include intensifier electricity connectivity performance, reduce contact resistance, reduce the loss among the signal transmission process, infrared detection performance of infrared focal plane detector has been promoted, and still surround solid structure 601's side through setting up adhesion layer 603, can increase adhesion layer 603 and solid structure 601's area of contact, be equivalent to the transmission path of widening the signal of telecommunication, the transmission resistance of columnar structure 6 has been reduced, thereby further reduced the signal transmission loss, infrared detection performance of infrared focal plane detector has been promoted. In addition, the material forming the adhesion layer 603 includes at least one of titanium, titanium nitride, tantalum, or tantalum nitride, and the adhesion layer 603 is formed by using at least one of the four conductive materials, so that the requirement of enhancing the mechanical and electrical connection performance between the supporting base 42 and the columnar structure 6 by using the adhesion layer 603 can be met, and the requirement of preparing the adhesion layer 603 by using a CMOS process, that is, the requirement of integrating the CMOS process, can be met.

The side wall of the adhesion layer 603 on the outermost periphery in the columnar structure 6, which is far away from the solid structure 601, is further coated with the dielectric layer 604, the adhesion layer 603 is utilized to enhance the connection performance between the columnar structure 6 and the supporting base 42, and meanwhile, the dielectric layer 604 coating the side wall of the adhesion layer 603 plays a role in insulation protection, and the dielectric layer 604 can be utilized to play a role in auxiliary support of the columnar structure 6, so that the structural stability and the infrared detection performance of the infrared focal plane detector are improved. Similarly, the dielectric layer 604 may be formed of a material including at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, amorphous carbon, aluminum oxide, titanium oxide, vanadium titanium oxide, graphene, yttrium barium copper oxide, copper, or platinum, which are not corroded by xenon fluoride, chlorine, bromine, carbon tetrachloride, or chlorofluorocarbons, and thus do not corrode the dielectric layer 604 covering the adhesion layer 603 when the sacrificial layer is corroded by xenon fluoride, chlorine, bromine, carbon tetrachloride, or chlorofluorocarbons in subsequent process steps. For example, as shown in fig. 21, the adhesion layer 603 covering the solid structure 601 may be provided as the electrode layer 14 in the suspended microbridge structure 40, the dielectric layer 604 covering the adhesion layer 603 is the first dielectric layer 13 in the suspended microbridge structure 40, and the adhesion layer 603 covering the solid structure 601 and/or the dielectric layer 604 covering the adhesion layer 603 may also be a separately manufactured film layer, or the dielectric layer covering the adhesion layer 603 may also be provided as the second dielectric layer 15 or the heat-sensitive dielectric layer 12 in the suspended microbridge structure 40.

Fig. 22 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. Different from the infrared focal plane detector with the structure shown in the above embodiment, in the infrared focal plane detector with the structure shown in fig. 22, the position of the surface of the suspended micro-bridge structure 40 close to the CMOS measurement circuit system 1, which corresponds to the position of the columnar structure 6, is in a step shape, that is, the surface of the suspended micro-bridge structure 40, which is not in contact with the columnar structure 6, is higher than the surface of the suspended micro-bridge structure 40, which is in contact with the columnar structure 6. Specifically, the sacrificial layer needs to be planarized by a CMP (Chemical Mechanical Polishing) process, and if the surface of the suspended microbridge structure 40, which is not in contact with the pillar-shaped structure 6, is set to be flush with the surface of the suspended microbridge structure 40, which is in contact with the pillar-shaped structure 6, the Polishing termination interface of the CMP process of the sacrificial layer is flush with the upper surface of the pillar-shaped structure 6, and since Chemical reagents and grinding process parameters in the CMP process are not easy to adjust and control, the surface of the sacrificial layer in the middle region of the infrared focal plane detector is lower than the surface of the sacrificial layer in other regions, that is, a recess region is formed in the middle of the sacrificial layer, which affects the planarization degree of a film layer subsequently prepared by the infrared focal plane detector. The embodiment of the present disclosure can utilize the sacrificial layer to form a stepped structure corresponding to the suspended microbridge structure 40, the surface of the suspended microbridge structure 40, which is not in contact with the columnar structure 6, is higher than the surface of the suspended microbridge structure 40, which is in contact with the columnar structure 6, and the polishing termination interface of the CMP process corresponding to the sacrificial layer is higher than the upper surface of the columnar structure 6, so that the degree of recess of the middle region of the sacrificial layer can be effectively reduced, and the degree of planarization of the whole infrared focal plane detector is optimized.

Optionally, with reference to fig. 3, 12, 20, 21 and 22, the infrared focal plane detector may further include a reinforcing structure 16, where the reinforcing structure 16 is disposed corresponding to the position of the columnar structure 61, the reinforcing structure 16 is used to enhance the connection stability between the columnar structure 6 and the beam structure 11, and the reinforcing structure 16 includes a weighted block structure. Specifically, the arrangement of the reinforcing structure 16 can effectively enhance the mechanical stability between the columnar structure 6 and the beam structure 11, thereby improving the structural stability of the infrared focal plane detector pixel and the infrared focal plane detector including the infrared focal plane detector pixel.

Exemplarily, as shown in fig. 12, a weighted block structure may be provided on a side of the beam structure 11 away from the CMOS measurement circuitry 1 and the weighted block structure is provided in contact with the beam structure 11. Specifically, the weighting block structure is arranged on one side of the beam structure 11 far away from the CMOS measurement circuit system 1 and is in contact with the beam structure 11, which is equivalent to adding a cover plate at the position of the beam structure 11 corresponding to the columnar structure 6, and pressing the beam structure by using the self weight of the reinforcing structure 16, so as to enhance the mechanical strength between the beam structure 11 and the columnar structure 6 and improve the structural stability of the infrared focal plane detector.

Illustratively, with reference to fig. 3, 20, 21 and 22, the beam structure 11 may also be provided with a through hole formed at a position corresponding to the position of the columnar structure 6, the through hole exposes at least a portion of the columnar structure 6, the weighted block structure includes a first portion filling the through hole and a second portion located outside the through hole, and an orthographic projection of the second portion covers an orthographic projection of the first portion. Specifically, a hollow-out area is formed at a position of the beam structure 11 corresponding to the columnar structure 6, that is, a through hole is formed, a second part of the weighting block structure outside the through hole and a first part of the weighting block structure inside the through hole are integrally formed, the first part is filled or embedded into the through hole and is in contact with the columnar structure 6, an orthographic projection of the second part covers an orthographic projection of the first part, that is, the area of the second part is larger than that of the first part. In the infrared focal plane detector pixel, the reinforcing structure 16 is equivalent to a rivet structure formed by a first part and a second part, the bottom surface of the first part is contacted with the top surface of the columnar structure, the side surface of the first part is also contacted with the side surface of a hollow area formed by the beam structure, and the lower surface of the second part is contacted with the outer surface of the through hole. Therefore, when the self gravity of the reinforced structure 16 is utilized to press the beam structure 11, the contact area between the reinforced structure 16 and the columnar structure 6 and the beam structure 11 is increased, the mechanical strength between the beam structure 11 and the columnar structure 6 is further increased, and the structural stability of the infrared focal plane detector is improved.

Illustratively, the material that may be provided to form the weighting block structure includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, silicon oxide, silicon oxynitride, silicon oxycarbide, titanium oxide, silicon, germanium, silicon germanium, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, or nickel-silicon alloy. Specifically, the reinforcing structure 16 may be a single-layer structure formed by depositing a dielectric or a metal, or may be a multi-layer structure formed by stacking two, three or more single-layer structures, in which amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium-tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, and nickel-silicon alloy are not corroded by xenon fluoride, chlorine gas, bromine gas, carbon tetrachloride, or chlorofluorocarbon, so that the reinforcing structure 16 is not affected in the subsequent process of corroding the sacrificial layer with xenon fluoride, chlorine, bromine, carbon tetrachloride or chlorofluorocarbons to release the sacrificial layer, thereby ensure to set up the mechanical strength that reinforced structure 16 can strengthen beam structure 11 and column structure 6 junction, prevent to take place to drop because of being connected insecurely between beam structure 11 and the column structure 6 to promote infrared focal plane detector's structural stability. In addition, when the material constituting the reinforcing structure 16 includes amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium or silicon germanium, the reinforcing structure 16 may be preferably disposed in the enclosed space enclosed by the first dielectric layer 13 and the second dielectric layer 15 to prevent the etching gas releasing the sacrificial layer from corroding the reinforcing structure 16.

Optionally, in combination with fig. 2, 7, 10 and 11, the pillar structure 6 may be configured to include at least one layer of hollow pillar structure, and fig. 2, 7, 10 and 11 exemplarily configure the pillar structure 6 to include one layer of hollow pillar structure, at least one electrode layer 14 is disposed in the hollow pillar structure, and the electrode layer 14 in the hollow pillar structure is electrically connected to the electrode layer 14 in the suspended microbridge structure 40 and the supporting base 42, so as to ensure that the electrical signal generated by the suspended microbridge structure 40 is transmitted to the CMOS measurement circuit system 1. Fig. 2, fig. 7, fig. 10, and fig. 11 exemplarily set up that the electrode layer 14 and the dielectric layers respectively located at two sides of the electrode layer 14 are disposed in the hollow columnar structure, and the dielectric layers at two sides achieve effective protection of the electrode layer 14, prevent the electrode layer 14 from being oxidized or corroded, and optimize the electrical transmission characteristics of the infrared focal plane detector. Illustratively, the dielectric layer below the electrode layer 14 in the columnar structure 6 may be, for example, the first dielectric layer 13, the dielectric layer above the electrode layer 14 may be, for example, the second dielectric layer 15, and the dielectric layers on both sides of the electrode layer 14 may also be separately fabricated film layers. In addition, the columnar structure 6 may be provided, and no dielectric layer is arranged above and/or below the electrode layer 14, that is, only a dielectric layer is arranged below the electrode layer 14 in the hollow columnar structure, or only a dielectric layer is arranged above the electrode layer 14, or only the electrode layer 14 is arranged in the hollow columnar structure, and no dielectric layer is wrapped outside the electrode layer 14.

Optionally, with reference to fig. 2, fig. 7, fig. 10 and fig. 11, and in particular to fig. 11, the infrared focal plane detector with a hollow columnar structure may further include a reinforcing structure 16, where the reinforcing structure 16 is disposed corresponding to the position of the columnar structure 6, and the reinforcing structure 16 is used to enhance the connection stability between the columnar structure 6 and the suspended micro-bridge structure 40 and between the columnar structure 6 and the reflective layer 4, that is, the connection stability between the columnar structure 6 and the supporting base 42. Illustratively, the reinforcing structure 16 may be located on a side of the electrode layer 14 away from the CMOS measurement circuitry 1, and when the electrode layer 14 is not covered by a dielectric layer, the reinforcing structure 16 is located above the electrode layer 14 and is in contact with the electrode layer 14, and at this time, the reinforcing structure 16 may form a hollow structure or a solid structure in the hollow columnar structure. When the electrode layer 14 is covered with a dielectric layer, for example, in fig. 11, when the electrode layer 14 is covered with the second dielectric layer 15, the reinforcing structure 16 may be located above the second dielectric layer 15 and disposed in contact with the second dielectric layer 15 as shown in fig. 11, at this time, the reinforcing structure 16 may form a hollow structure in the hollow columnar structure as shown in fig. 11, and the reinforcing structure 16 may also form a solid structure in the hollow columnar structure, that is, the reinforcing structure 16 may also fill an inner space surrounded by the second dielectric layer 15. Alternatively, as shown in fig. 23, the reinforcing structure 16 may be disposed above the electrode layer 14 and the reinforcing structure 16 may be disposed in contact with the electrode layer 14, that is, the reinforcing structure 16 is located between the electrode layer 14 and the second dielectric layer 15, where the reinforcing structure 16 forms a hollow structure within the hollow columnar structure.

Fig. 24 is a schematic cross-sectional structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. In the infrared focal plane detector having the structure shown in fig. 24, the reinforcing structure 16 may also be disposed on a side of the electrode layer 14 adjacent to the CMOS measurement circuit system 1, and when a dielectric layer is disposed below the electrode layer 14, for example, the first dielectric layer 13, the reinforcing structure 16 may be disposed between the electrode layer 14 and the first dielectric layer 13 and the reinforcing structure 16 is disposed in contact with the electrode layer 14.

With reference to fig. 11, 23, and 24, no matter the reinforcing structure 16 is located on one side of the electrode layer 14 far from the CMOS measurement circuit system 1, or the reinforcing structure 16 is located on one side of the electrode layer 14 close to the CMOS measurement circuit system 1, the reinforcing structure 16 covers the connection position of the columnar structure 6 and the suspended microbridge structure 40, which is equivalent to that a negative weight is added at the connection position of the columnar structure 6 and the suspended microbridge structure 40, and the connection stability between the columnar structure 6 and the suspended microbridge structure 40 is enhanced by the reinforcing structure 16. In addition, the reinforcing structure 16 also covers at least part of the connecting position of the columnar structure 6 and the supporting base 42, which is equivalent to that a negative weight is added at the connecting position of the columnar structure 6 and the supporting base 42, so that the connecting stability between the columnar structure 6 and the supporting base 42 is enhanced by using the reinforcing structure 16, the electrical connection characteristic of the whole infrared focal plane detector is further optimized, and the infrared detection performance of the infrared focal plane detector is optimized. For example, the reinforcing structure 16 described in the above embodiments may be a metal structure or a non-metal structure, which is not specifically limited in the embodiments of the present disclosure, and it is sufficient to ensure that the arrangement of the reinforcing structure 16 does not affect the electrical connection relationship in the infrared focal plane detector.

Optionally, in conjunction with fig. 1 to 24, at least one patterned metal interconnection layer may be disposed between the reflective layer 4 and the suspended microbridge structure 40, the patterned metal interconnection layer is located above or below the hermetic release barrier layer 3 and is electrically insulated from the reflective layer 4, and the patterned metal interconnection layer is used for adjusting a resonant mode of the infrared focal plane detector. Specifically, a Bragg reflector (Bragg reflector) is an optical device for enhancing reflection of light with different wavelengths by utilizing constructive interference of reflected light with different interfaces, and is composed of a plurality of 1/4-wavelength reflectors to realize efficient reflection of incident light with multiple wavelengths, in the embodiment of the disclosure, at least one patterned metal interconnection layer is arranged between the reflection layer 4 and the suspended microbridge structure 40, at least one patterned metal interconnection layer, the reflection layer 4 and the absorption plate 10 form a structure similar to the Bragg reflector, the arrangement of at least one patterned metal interconnection layer is equivalent to changing the thickness of an integral resonant cavity medium formed by the reflection layer 4 and a heat sensitive medium layer in the absorption plate 10, so that an infrared focal plane detector pixel can form a plurality of resonant cavities with different medium thicknesses, and the infrared focal plane detector pixel can select light with different wavelengths for enhanced reflection adjustment, and then the resonance mode of the infrared focal plane detector is adjusted by utilizing at least one patterned metal interconnection layer, so that the infrared absorption rate of the infrared focal plane detector is improved, the infrared absorption spectrum of the infrared focal plane detector is widened, and the infrared absorption spectrum of the infrared focal plane detector is increased.

Illustratively, at least one patterned metal interconnect layer may be disposed on a side of the hermetic release barrier 3 away from the CMOS measurement circuitry 1 and/or at least one patterned metal interconnect layer may be disposed on a side of the hermetic release barrier 3 adjacent to the CMOS measurement circuitry 1. Illustratively, the patterned metal interconnection layer may include a plurality of metal repeating units arranged in an array, each metal repeating unit may include at least one of an L-shaped patterned structure, a circular structure, a sector-shaped structure, an elliptical structure, a circular ring structure, an open ring structure, or a polygonal structure arranged at two opposite corners, or the patterned metal interconnection layer may include a plurality of patterned hollow structures arranged in an array, and the patterned hollow structures may include at least one of a circular hollow structure, an open ring-shaped hollow structure, or a polygonal hollow structure.

Alternatively, it may be provided that the beam structure 11 and the absorber plate 10 are electrically connected at least at two ends, the CMOS infrared sensing structure 2 includes at least two columnar structures 6 and at least two support bases 42, and the electrode layer 14 includes at least two electrode terminals. Specifically, as shown in fig. 1, the beam structures 11 are electrically connected to two ends of the absorber plate 10, each beam structure 11 is electrically connected to one end of the absorber plate 10, the CMOS infrared sensing structure 2 includes two pillar structures 6, the electrode layer 14 includes at least two electrode terminals, at least a portion of the electrode terminals transmit positive electrical signals, at least a portion of the electrode terminals transmit negative electrical signals, and the signals are transmitted to the supporting base 42 through the corresponding beam structures 11 and pillar structures 6.

Fig. 25 is a schematic perspective structure diagram of another infrared focal plane detector pixel provided in the embodiment of the present disclosure. As shown in fig. 25, it is also possible to provide beam structures 11 electrically connected to four ends of the absorption plate 10, each beam structure 11 electrically connected to two ends of the absorption plate 10, the CMOS infrared sensing structure 2 includes four pillar structures 6, one beam structure 11 connecting two pillar structures 6, and the beam structures 11 may adopt a thermally symmetric structure, which is well known to those skilled in the art and will not be discussed herein. It should be noted that, in the embodiment of the present disclosure, the number of the connecting ends of the beam structure 11 and the absorbing plate 10 is not particularly limited, and it is sufficient that the beam structure 11 and the electrode terminal are respectively present, and the beam structure 11 is used for transmitting the electrical signal output by the corresponding electrode terminal.

Alternatively, the infrared focal plane detector may be configured based on a 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm or 350nm CMOS process, where the aforementioned dimensions represent process nodes of the integrated circuit, i.e., feature dimensions during the processing of the integrated circuit.

Alternatively, the metal wiring material constituting the metal interconnection layer in the infrared focal plane detector may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt, and for example, the material constituting the reflective layer 4 may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt. In addition, the CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, the CMOS infrared sensing structure 2 is directly prepared on the CMOS measuring circuit system 1, the radial side length of the columnar structure 6 can be more than or equal to 0.5um and less than or equal to 3um, the width of the beam structure 11, namely the width of a single line in the beam structure 11 is less than or equal to 0.3um, and the height of the resonant cavity is less than or equal to 2.5 um.

It should be noted that, in the embodiment of the present disclosure, a schematic diagram of an infrared focal plane detector with all structures that belong to the protection scope of the embodiment of the present disclosure is not given, and the protection scope of the embodiment of the present disclosure is not limited, and different features disclosed in the embodiment of the present disclosure may be arbitrarily combined, for example, whether a reinforcing structure is provided in the infrared focal plane detector or not, both of the features belong to the protection scope of the embodiment of the present disclosure, and an arbitrary combination of columnar structures with different structures also belongs to the protection scope of the embodiment of the present disclosure.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The foregoing are merely exemplary embodiments of the present disclosure, which enable those skilled in the art to understand or practice the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A single layer infrared focal plane detector, comprising:

2. The single layer infrared focal plane detector of claim 1, wherein the CMOS infrared sensing structure is fabricated on top of or at the same level as a metal interconnect layer of the CMOS measurement circuitry.

3. The single-layer infrared focal plane detector of claim 1, wherein the suspended microbridge structure comprises an absorption plate and a plurality of beam structures, the absorption plate is used for absorbing the infrared target signal and converting the infrared target signal into an electrical signal, the beam structures and the pillar structures are used for transmitting the electrical signal and supporting and connecting the absorption plate, the reflection layer is used for reflecting the infrared signal and forming the resonant cavity with the heat-sensitive dielectric layer, the reflection layer comprises at least one metal interconnection layer, and the pillar structures are connected with the beam structures and the CMOS measurement circuit system by adopting the metal interconnection process and the through hole process; the beam structure comprises the electrode layer, or the beam structure comprises a first dielectric layer and the electrode layer, or the beam structure comprises the electrode layer and a second dielectric layer, or the beam structure comprises the electrode layer and the heat sensitive dielectric layer, or the beam structure comprises a first dielectric layer, the electrode layer and a second dielectric layer, or the beam structure comprises a first dielectric layer, the electrode layer and the heat sensitive dielectric layer, or the beam structure comprises the electrode layer, the heat sensitive dielectric layer and a second dielectric layer, or the beam structure comprises a first dielectric layer, the electrode layer, the heat sensitive dielectric layer and a second dielectric layer, the absorption plate comprises the electrode layer and the heat sensitive dielectric layer, or the absorption plate comprises a first dielectric layer, the electrode layer and the heat sensitive dielectric layer, or the absorption plate comprises the electrode layer, the heat sensitive dielectric layer, The heat sensitive medium layer and the second medium layer, or the absorption plate comprises a first medium layer, the electrode layer, the heat sensitive medium layer and a second medium layer; the material for forming the heat-sensitive dielectric layer comprises at least one of titanium oxide, vanadium oxide, titanium vanadium oxide, amorphous silicon, amorphous germanium silicon oxide, silicon, germanium silicon oxide, amorphous carbon, graphene, yttrium barium copper oxide, copper or platinum, and the resistance temperature coefficient of the material for forming the first dielectric layer is larger than a set value;

4. The single-layer infrared focal plane detector of claim 3, wherein the suspended microbridge structure comprises a first dielectric layer and a second dielectric layer, the infrared focal plane detector further comprises a metamaterial structure and/or a polarization structure, the metamaterial structure or the polarization structure is at least one metal interconnection layer on a side of the first dielectric layer close to the CMOS measurement circuitry, or at least one metal interconnection layer on a side of the second dielectric layer far away from the CMOS measurement circuitry, or at least one metal interconnection layer between the first dielectric layer and the second dielectric layer and electrically insulated from the electrode layer, or the electrode layer is used as a metamaterial structure layer or a polarization structure layer;

5. The single layer infrared focal plane detector of claim 1, wherein the columnar structures comprise at least one layer of solid columnar structures, the solid columnar structures comprising solid structures;

6. The single-layer infrared focal plane detector of claim 5, wherein the suspended micro-bridge structure comprises an absorption plate and a plurality of beam structures, the infrared focal plane detector further comprises a reinforcing structure, the reinforcing structure is disposed corresponding to the position of the columnar structure, the reinforcing structure is used for enhancing the connection stability between the columnar structure and the beam structures, and the reinforcing structure comprises a weighted block structure;

7. The single layer infrared focal plane detector of claim 1, wherein the columnar structures comprise at least one layer of hollow columnar structures, and at least the electrode layer is disposed within the hollow columnar structures.

8. The single-layer infrared focal plane detector of claim 7, further comprising a reinforcing structure, wherein the reinforcing structure is disposed corresponding to the position of the columnar structure, and is configured to enhance connection stability between the columnar structure and the suspended microbridge structure and between the columnar structure and the reflective layer;

9. The single layer infrared focal plane detector of claim 1, wherein the hermetic release insulation layer is located at an interface between the CMOS measurement circuitry and the CMOS infrared sensing structure and/or in the CMOS infrared sensing structure;

10. The single-layer infrared focal plane detector of claim 9, wherein the hermetic release isolation layer is located on a side of the reflection layer away from the CMOS measurement circuitry, at least one dielectric layer is disposed between the reflection layer and the hermetic release isolation layer, and a material constituting the dielectric layer includes at least one of germanium, silicon, or germanium-silicon.

11. The single-layer infrared focal plane detector of claim 1, wherein at least one patterned metal interconnection layer is disposed between the reflective layer and the suspended microbridge structure, the patterned metal interconnection layer is located above or below the hermetic release insulating layer and is electrically insulated from the reflective layer, and the patterned metal interconnection layer is used for adjusting a resonant mode of the infrared focal plane detector;