CN113514670A - PCB thermal stress test method - Google Patents
PCB thermal stress test method Download PDFInfo
- Publication number
- CN113514670A CN113514670A CN202110429170.1A CN202110429170A CN113514670A CN 113514670 A CN113514670 A CN 113514670A CN 202110429170 A CN202110429170 A CN 202110429170A CN 113514670 A CN113514670 A CN 113514670A
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- thermal stress
- pcb
- test method
- stress test
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Testing Resistance To Weather, Investigating Materials By Mechanical Methods (AREA)
- Investigating Or Analyzing Materials Using Thermal Means (AREA)
Abstract
The invention discloses a PCB thermal stress test method, which comprises the following steps: step 1, selecting a proper sample plate on a PCB to be tested; step 2, placing the sample plate to be tested into an oven for baking, and then cooling to room temperature; step 3, measuring whether the solder reaches a set temperature by using a thermometer, and confirming that the solder temperature of the tin furnace reaches a test temperature; step 4, after the sample is immersed in the soldering flux, immersing the sample in a tin pool and then taking out the sample; and 5, removing the soldering flux on the surface of the sample, cooling to room temperature, performing visual inspection, and slicing and inspecting. The PCB thermal stress test method can accurately reflect the quality of the metallized hole and the base material and the mutual coordination between the metallized hole and the base material.
Description
Technical Field
The invention relates to PCB production and processing, in particular to a PCB thermal stress test method.
Background
With the development of electronic material technology, the requirements on the performance and reliability of electronic products are higher and higher. The PCB is used as a carrier of components, and the reliability of the PCB has important influence on the overall performance of electronic products.
However, the lead-free solder raises the SMT temperature by 40 ℃, the complexity of electronic product assembly causes the PCB to have two or more thermal shocks during soldering, and the integration of electronic product functions generates a large amount of heat during use, which puts higher demands on the performance of the PCB.
Therefore, in order to ensure reliability during PCB installation and use, it is necessary to evaluate heat resistance of the PCB.
Disclosure of Invention
The invention aims to provide a PCB thermal stress test method which can accurately reflect the quality of a metallized hole and a base material and the mutual coordination between the quality of the metallized hole and the base material.
In order to achieve the above object, the present invention provides a PCB thermal stress test method, comprising:
step 1, selecting a proper sample plate on a PCB to be tested;
step 2, placing the sample plate to be tested into an oven for baking, and then cooling to room temperature;
step 3, measuring whether the solder reaches a set temperature by using a thermometer, and confirming that the solder temperature of the tin furnace reaches a test temperature;
step 4, after the sample is immersed in the soldering flux, immersing the sample in a tin pool and then taking out the sample;
and 5, removing the soldering flux on the surface of the sample, cooling to room temperature, performing visual inspection, and slicing and inspecting.
Preferably, the examination of the section in step 5 uses microdissection techniques to assess the structural integrity of the specimen.
Preferably, a minimum of three holes or vias should be examined in the slicing examination.
Preferably, each side of each well should be tested independently.
Preferably, the thermal stress of the buried and blind vias should meet the requirements of the plated hole.
Preferably, the baking time in step 2 is not less than 6 h.
Preferably, the baking temperature in step 2 is 120-150 ℃.
Preferably, the time for immersing the sample in the tin bath in step 4 is 8-12 s.
According to the technical scheme, firstly, selecting a proper sample plate on the PCB to be tested; secondly, placing the sample plate to be tested into an oven for baking and then cooling to room temperature; then, a thermometer is used for measuring whether the solder reaches the set temperature or not, and the solder temperature of the tin furnace is confirmed to reach the test temperature; then, after the sample is immersed in the soldering flux, immersing the sample in a tin pool and then taking out the sample; and finally, removing the soldering flux on the surface of the sample, cooling to room temperature, and then carrying out visual inspection and slicing inspection. Therefore, the PCB thermal stress test method can accurately reflect the quality of the metallized hole and the base material and the mutual coordination between the metallized hole and the base material.
Additional features and advantages of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a flowchart of a thermal stress testing method of a PCB according to the present invention.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
In the present invention, unless otherwise specified, the directional words "upper, lower" and the like included in the terms merely represent the orientation of the terms in the conventional use state or are colloquially known by those skilled in the art, and should not be construed as limiting the terms.
Referring to fig. 1, the present invention provides a PCB thermal stress test method, including:
step 1, selecting a proper sample plate on a PCB to be tested;
step 2, placing the sample plate to be tested into an oven for baking, and then cooling to room temperature;
step 3, measuring whether the solder reaches a set temperature by using a thermometer, and confirming that the solder temperature of the tin furnace reaches a test temperature;
step 4, after the sample is immersed in the soldering flux, immersing the sample in a tin pool and then taking out the sample;
and 5, removing the soldering flux on the surface of the sample, cooling to room temperature, performing visual inspection, and slicing and inspecting.
Preferably, the examination of the section in step 5 uses microdissection techniques to assess the structural integrity of the specimen.
Preferably, a minimum of three holes or vias should be examined in the slicing examination.
Preferably, each side of each well should be tested independently.
Preferably, the thermal stress of the buried and blind vias should meet the requirements of the plated hole.
Preferably, the baking time in step 2 is not less than 6 h.
Preferably, the baking temperature in step 2 is 120-150 ℃.
Preferably, the time for immersing the sample in the tin bath in step 4 is 8-12 s.
According to the technical scheme, firstly, selecting a proper sample plate on the PCB to be tested; secondly, placing the sample plate to be tested into an oven for baking and then cooling to room temperature; then, a thermometer is used for measuring whether the solder reaches the set temperature or not, and the solder temperature of the tin furnace is confirmed to reach the test temperature; then, after the sample is immersed in the soldering flux, immersing the sample in a tin pool and then taking out the sample; and finally, removing the soldering flux on the surface of the sample, cooling to room temperature, and then carrying out visual inspection and slicing inspection. Therefore, the PCB thermal stress test method can accurately reflect the quality of the metallized hole and the base material and the mutual coordination between the metallized hole and the base material.
The preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, however, the present invention is not limited to the specific details of the above embodiments, and various simple modifications can be made to the technical solution of the present invention within the technical idea of the present invention, and these simple modifications are within the protective scope of the present invention.
It should be noted that the various technical features described in the above embodiments can be combined in any suitable manner without contradiction, and the invention is not described in any way for the possible combinations in order to avoid unnecessary repetition.
In addition, any combination of the various embodiments of the present invention is also possible, and the same should be considered as the disclosure of the present invention as long as it does not depart from the spirit of the present invention.
Claims (8)
1. A PCB thermal stress test method is characterized by comprising the following steps:
step 1, selecting a proper sample plate on a PCB to be tested;
step 2, placing the sample plate to be tested into an oven for baking, and then cooling to room temperature;
step 3, measuring whether the solder reaches a set temperature by using a thermometer, and confirming that the solder temperature of the tin furnace reaches a test temperature;
step 4, after the sample is immersed in the soldering flux, immersing the sample in a tin pool and then taking out the sample;
and 5, removing the soldering flux on the surface of the sample, cooling to room temperature, performing visual inspection, and slicing and inspecting.
2. The PCB thermal stress test method of claim 1, wherein the section inspection in step 5 employs a microdissection technique to assess the structural integrity of the test specimen.
3. The PCB thermal stress test method of claim 2, wherein a minimum of three holes or via sections should be inspected in the dicing inspection.
4. A PCB thermal stress testing method according to claim 3, wherein each side of each hole should be independently inspected.
5. A PCB thermal stress test method of claim 4, wherein the thermal stress of the buried via and the blind via is in accordance with the requirement of the plated via.
6. The PCB thermal stress test method of claim 1, wherein the baking time in step 2 is not less than 6 h.
7. The PCB thermal stress test method of claim 1, wherein the baking temperature in step 2 is 120-150 ℃.
8. The PCB thermal stress test method of claim 1, wherein the time for immersing the sample in the tin bath in step 4 is 8-12 s.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110429170.1A CN113514670A (en) | 2021-04-21 | 2021-04-21 | PCB thermal stress test method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110429170.1A CN113514670A (en) | 2021-04-21 | 2021-04-21 | PCB thermal stress test method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113514670A true CN113514670A (en) | 2021-10-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202110429170.1A Pending CN113514670A (en) | 2021-04-21 | 2021-04-21 | PCB thermal stress test method |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201260269Y (en) * | 2008-09-24 | 2009-06-17 | 惠州美锐电子科技有限公司 | Printed circuit board |
| CN102313744A (en) * | 2011-03-29 | 2012-01-11 | 上海华碧检测技术有限公司 | Failure analysis method for PCB (Printed Circuit Board) |
| CN202155654U (en) * | 2011-07-22 | 2012-03-07 | 深圳市星河电路有限公司 | Improved weldability tester |
| CN104215539A (en) * | 2014-07-31 | 2014-12-17 | 高德（无锡）电子有限公司 | Thermal-stress testing automatic device used for PCB industry |
-
2021
- 2021-04-21 CN CN202110429170.1A patent/CN113514670A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201260269Y (en) * | 2008-09-24 | 2009-06-17 | 惠州美锐电子科技有限公司 | Printed circuit board |
| CN102313744A (en) * | 2011-03-29 | 2012-01-11 | 上海华碧检测技术有限公司 | Failure analysis method for PCB (Printed Circuit Board) |
| CN202155654U (en) * | 2011-07-22 | 2012-03-07 | 深圳市星河电路有限公司 | Improved weldability tester |
| CN104215539A (en) * | 2014-07-31 | 2014-12-17 | 高德（无锡）电子有限公司 | Thermal-stress testing automatic device used for PCB industry |
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