CN113506760B - Wafer temperature field reconstruction device with double-layer structure - Google Patents

Wafer temperature field reconstruction device with double-layer structure Download PDF

Info

Publication number
CN113506760B
CN113506760B CN202110675598.4A CN202110675598A CN113506760B CN 113506760 B CN113506760 B CN 113506760B CN 202110675598 A CN202110675598 A CN 202110675598A CN 113506760 B CN113506760 B CN 113506760B
Authority
CN
China
Prior art keywords
wafer
temperature
electrode
temperature sensor
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110675598.4A
Other languages
Chinese (zh)
Other versions
CN113506760A (en
Inventor
王超
姜晶
牛夷
贾镜材
陈梦朝
钟业奎
喻培丰
张泽展
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Electronic Science and Technology of China
Original Assignee
University of Electronic Science and Technology of China
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Electronic Science and Technology of China filed Critical University of Electronic Science and Technology of China
Priority to CN202110675598.4A priority Critical patent/CN113506760B/en
Publication of CN113506760A publication Critical patent/CN113506760A/en
Application granted granted Critical
Publication of CN113506760B publication Critical patent/CN113506760B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67248Temperature monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention provides a wafer temperature field reconstruction device with a double-layer structure, and relates to the technical field of semiconductor test equipment. The invention is mainly used for measuring the temperature distribution of the wafer in various semiconductor process procedures, and comprises a front-end temperature measuring part, a back-end data receiving and transmitting part and a charging part. The front-end temperature measuring part is formed by attaching two processed wafers to a circuit in an assembling mode, and can adapt to various different semiconductor processes. The back-end data receiving, transmitting and charging device realizes good electrical contact with the wafer by a simple mechanical structure. The invention has simple structure, compatibility with the process, accurate measurement and low cost, and has higher commercial value.

Description

Wafer temperature field reconstruction device with double-layer structure
Technical Field
The invention relates to the technical field of semiconductor test equipment, and discloses a wafer temperature field reconstruction device with a double-layer structure, which is particularly compatible with most semiconductor processes.
Background
In the semiconductor chip manufacturing process, the temperature uniformity of the wafer surface is required to be high, and the temperature measurement and control are very important. For example, plasma etching, which is one of the key processes, in order to improve the uniformity of the etching rate and temperature distribution while avoiding wafer defects caused by the falling of the appendages onto the wafer, precise measurement and tight control of the temperature of the wafer are generally required. In chemical vapor deposition, the temperature of the wafer will have a significant impact on the deposition quality of the thin film. During rapid thermal processing, wafer temperature uniformity is a major obstacle to expanding the range of applications.
The current wafer temperature detection technology is mainly focused on optical and contact type temperature sensors. Patent CN203826348U describes a method for realizing temperature monitoring of a wafer by means of an optical temperature sensor. The optical measurement method can only measure the temperature of a certain point of the wafer, and the complex environment inside the actual processing chamber has a great influence on the accuracy of optical measurement. Patent US6190040B1 describes an in-situ wired wafer temperature measuring device comprising a temperature sensor, connecting leads, lead fasteners, vacuum pass-through bands, interfaces, etc. Each sensor is connected by a respective lead and crimped to the wafer at one end of the wafer by a metal fixture. This approach has many problems, such as damage to the temperature field at the wafer surface; cannot be used in a processing environment heated by radiation; electromagnetic interference and the like also need to be considered in the plasma process. Based on this, KLA corporation has proposed a real-time process management tool that embeds temperature sensors and processing circuitry into the wafer interior to more effectively solve these problems, but this approach can only be used for one of backside heating or surface heating, which is complex and costly.
Therefore, there is a need for an apparatus that is compatible with most processes, and that is suitable for use in both back and surface heating processes and in complex environments such as plasma, vapor deposition, and the like, and that is relatively simple to manufacture, thereby reducing costs.
Disclosure of Invention
Based on the above, the invention aims to solve the problems that the detection tool is not compatible with the existing various processes, the manufacturing process is complex and the cost is high.
The invention provides a wafer temperature field reconstruction device with a double-layer structure, which comprises: temperature measuring device, data transceiver, data processing device, temperature measuring device includes: a lower wafer, an intermediate circuit layer and an upper wafer; the intermediate circuit layer includes: the temperature sensor, the thin film battery and the circuit on the PCB; a groove for placing a thin film battery is etched in the center of the lower layer wafer, and a heat insulating material is arranged between the thin film battery and the lower layer wafer; a through hole for placing a circuit on the PCB is etched in the center of the upper wafer, and a heat insulating material is attached to the side wall of the through hole; the lower layer wafer and the upper layer wafer are provided with grooves for placing temperature sensors around the center; the data wires of the temperature sensor are wires deposited on the surfaces of the lower wafer and the upper wafer, the wires are connected with welding points on the PCB, the PCB is positioned at the central position between the upper wafer and the lower wafer, and the periphery of the central positions of the upper wafer and the lower wafer are bonded through high-temperature-resistant glue, and meanwhile, the temperature sensor of the upper wafer and the temperature sensor of the lower wafer are fixed; the thin film battery is connected with the PCB, and an electrode is also packaged on the PCB and extends out of the central through hole of the upper wafer; a detachable silicon cover is additionally arranged for protecting the electrode in actual working conditions.
The data transceiver comprises a base and an upper cover plate, wherein a wafer groove for placing a wafer is formed in the base, an electrode groove for connecting an electrode is formed in the center of the bottom of the groove, a contact electrode is arranged in the electrode groove, and the position of the contact electrode corresponds to the position of an electrode of the temperature measuring device; the upper cover plate is provided with a bulge matched with the base groove and used for pressing a wafer placed in the wafer groove; the data transceiver realizes charge and discharge and data exchange of the temperature measuring device through the contact electrode.
The data processing device receives data from the data receiving and transmitting device and is used for reconstructing a wafer temperature field.
Further, two circles of temperature sensor grooves are correspondingly formed in the lower-layer wafer and the upper-layer wafer, each circle of temperature sensor grooves is 8, each circle of adjacent temperature sensor grooves is spaced at 45 degrees, and the inner circle of temperature sensor grooves, the outer circle of temperature sensor grooves adjacent to the inner circle of temperature sensor grooves and the circle center of the wafer are positioned on the same straight line.
Further, a data connection module is disposed in the electrode groove of the base in the data transceiver, and the data connection module includes: the device comprises a control circuit, contact electrodes, springs, an insulating support and a shell, wherein the insulating support is square bowl-shaped and is reversely buckled on the control circuit, a plurality of rod-shaped contact electrodes are arranged at the top of the insulating support in a penetrating mode, spring blocking sheets are arranged at the middle parts of the contact electrodes, and contact sheets are arranged at the top of the contact electrodes; the control circuit, the spring and the insulating support are all positioned in the shell, the contact electrode passes through the shell and the insulating support from the top, the contact piece is positioned outside the shell, and the spring blocking piece is positioned between the shell and the insulating support; when the electrode contacts the contact piece, the spring is compressed, so that the contact is more reliable; the contact electrode is positioned at the top end in the insulating bracket and is connected with the control circuit through a wire.
Further, the depths of the grooves of the temperature sensors arranged on the lower layer wafer and the upper layer wafer are 0.2mm, and the thicknesses of the grooves of the temperature sensors on the other side of the wafer are 0.4mm; the width of the lead connecting the temperature sensor and the PCB is not more than 0.7mm, and the thickness is 0.05mm; the thickness of the bottom of the groove for placing the thin film battery in the center of the lower layer wafer is 0.1mm from the other side of the wafer.
After the technical scheme is adopted, the invention has the following positive effects:
(1) Compared with the prior art, the invention has high measurement precision and can be used in severe environments such as plasma etching, chemical vapor deposition and the like.
(2) The invention can be suitable for semiconductor process equipment with surface and back heating by arranging the two layers of temperature sensors.
(3) The invention connects two layers of wafers through simple bonding, and has simple manufacturing process and low cost.
(4) The invention provides a subsequent matched product, which can simply and effectively realize the data transmission and subsequent data processing of the device.
Drawings
Fig. 1 is a block diagram of the entire front end of the apparatus of the present invention.
Fig. 2 is a top view of the front end of the inventive device with the silicon cap removed.
Fig. 3 is an anatomic view of the side of the front end device.
Fig. 4 is a main manufacturing flow chart of the front-end device of the present invention.
Fig. 5 is a circuit configuration diagram of the front-end device in the middle.
Fig. 6 shows a back-end data collection and charging device that is configured as a front-end device, both devices comprising a complete system.
Fig. 7 is a specific structure of a base of the data collection and charging device.
And, the reference numerals in the above drawings are explained as follows:
1 to an upper wafer; 2-a conductive line formed by deposition; 3-a temperature sensor; 4-an intermediate circuit layer; 5-lower layer wafer; 6-high temperature resistant glue; 7 to heat insulating material; 8-deposited wires, which are equal to 2; 9-electronic components on the PCB; 10-film battery; 11-welding points; 12-electrode; 13 to contact electrodes, which are identical to 12; 14-spring; 15-a control circuit; 16-conducting wires; 17-insulating brackets; 18-upper cover plate; 19-a base; 20-electrode; 21-silicon cover.
Detailed Description
The invention mainly comprises a device formed by front-end temperature measurement, back-end data receiving, transmitting and charging, and in order to better express the technical scheme of the invention, the following is a special preferred embodiment and is further described by matching with the attached drawings.
Fig. 1 is a schematic view showing the overall structure of the front end of a double-layered wafer temperature field reconstruction apparatus according to an embodiment of the present invention, fig. 2 is a top view showing the removal of a silicon cover from the front end of a double-layered wafer temperature field reconstruction apparatus according to a preferred embodiment of the present invention, fig. 3 is a front end side anatomical view of a double-layered wafer temperature field reconstruction apparatus according to a preferred embodiment of the present invention, and fig. 4 is a detailed process for manufacturing a front end apparatus according to a preferred embodiment of the present invention, and the main structure of the front end apparatus according to the present invention will be further described with reference to fig. 1, 2, 3 and 4 for better connection, structure, shape, material, etc. of each component of the front end apparatus.
Specifically, the front-end device structure of the present invention may be divided into three layers, namely an upper wafer 1, an intermediate circuit 4 and a lower wafer 5. The wafer may be of any size practical for use in the current stage of integrated circuit fabrication process, and is preferably 6 inches or more in size considering the stability of the overall device. Further, a plurality of temperature sensors are electrically connected to the silicon wafer, and in the present embodiment, 16 temperature sensors are preferably provided, and those skilled in the art understand that the number of the temperature sensors may be changed according to the actual measurement requirement. The electrical connection is achieved by depositing metal wires on the wafer, preferably having a width of no more than 0.7mm and a thickness of 0.05mm, and further, said metal wires being coated with a heat insulating material.
The lower wafer is etched with two types of shallow trenches, the first type of shallow trenches are used for placing a temperature sensor, the temperature sensor is tightly attached to the bottom of the shallow trenches through certain pressure and fixed through surrounding adhesive, and the distance between the bottom of the shallow trenches and the bottom of the wafer is 0.4mm. The second type of shallow trench is used to house thin film cells, the bottom of the shallow trench is coated with insulating material, and the bottom of the shallow trench is 0.2mm from the bottom of the wafer. The upper layer wafer is etched with a first type shallow groove symmetrical to the lower layer wafer for placing a temperature sensor, and a position corresponding to the thin film battery is cut into a size of 2 multiplied by 2cm by cutting 2 Rectangular in size for placement of electronic components.
The substrate of the intermediate circuit is preferably a flexible PCB, and the thickness of the substrate is preferably less than 0.2mm, and further, the material selected for the flexible circuit board is Polyimide (PI). The thickness of the intermediate circuit can be optimized by selecting the flexible PCB, and the total thickness of the intermediate circuit layer is not more than 1.5mm by further combining the thin film battery and the ultrathin packaged electronic component.
The front-end device of the invention forms a final structure by assembly, and the specific process is as follows:
step 1: two silicon wafers with basically same size and properties are prepared, corresponding shallow grooves are etched on the two silicon wafers in an etching mode, and the corresponding silicon wafers are cut in a cutting mode. Preferably, the trench for sensor placement has its bottom 0.4mm from the bottom of the wafer, and the trench for thin film cell placement has its bottom 0.2mm from the bottom of the wafer.
Step 2: the corresponding position is coated with heat insulating material 7, preferably polytetrafluoroethylene resin, and the thickness of the heat insulating material is not more than 0.1mm.
Step 3: a metallic conductive substance 2, preferably copper, is deposited on the insulating material.
Step 4: the temperature sensors 3 are mounted in corresponding grooves, the electrical connection of which may be by means of soldering or conductive adhesive, preferably silver epoxy glue. Further, the temperature sensor may be a thermocouple or a thermal resistor, and further, the temperature sensor 3 is fixed by glue.
Step 5: and (3) welding the required electronic components and the thin film battery on the circuit board, melting excessive welding materials on the corresponding welding points close to one side of the thin film battery, aligning the lower wafer, and then extruding and bonding. The lower wafer is then on the upper layer, i.e., by front side bonding. The soldering material may be solder used in soldering a general circuit.
Step 6: and (3) coating a high-temperature-resistant adhesive material 6 on the lower wafer, and then bonding the upper wafer with the circuit board and the lower wafer through the step (5). Preferably, the high temperature resistant adhesive material is an epoxy resin.
Step 7: and removing excess resin extruded from the middle of the two wafers, covering a layer of detachable silicon cover which is the same as the upper layer of wafer on the protruding circuit part, and completing the device manufacturing.
The silicon cover can effectively protect electronic components and isolate relevant electromagnetic interference.
The intermediate circuit layer consists of a PCB circuit substrate, a thin film battery and corresponding electronic components.
Fig. 5 shows a specific structure of the intermediate circuit layer in the wafer temperature field reconstruction front-end apparatus of the dual-layer structure according to a preferred embodiment of the present invention. The electronic components mainly comprise a voltage amplifier, a digital-to-analog converter ADC, a central processing unit CPU, a RAM, a storage module FLASH and a communication module, wherein the digital-to-analog converter ADC, the central processing unit, the RAM and the communication module can adopt the existing microprocessor units such as stm32f103 series. The communication module may use serial communication to reduce pin count, preferably using uart communication mode. The thin film battery adopts an all-solid-state thin film lithium batteryPreferably Li/LiPON/LiCoO is used 2 The output power of the all-solid-state thin-film lithium battery can meet the energy requirements of all active devices on the board. The heat insulation material and the air barrier are arranged between the intermediate circuit layer and the wafer, so that the heat transferred by the wafer can be effectively reduced, and the working temperature of the circuit is improved.
Fig. 6 shows a schematic diagram of the wafer temperature field reconstruction back-end device of the bilayer structure according to the preferred embodiment of the present invention. The back-end device is mainly used as a 'transfer station' for communicating and charging with the upper computer PC as a front-end device, and mainly comprises an upper cover plate 18 and a base 19. Fig. 7 shows a specific structural diagram of the base in the wafer temperature field reconstruction back-end apparatus of the double-layer structure according to the preferred embodiment of the present invention. To better illustrate the specific structure of the back-end device, a further description is provided in connection with fig. 6 and 7.
Further, the upper cover plate is provided with a bulge with the diameter slightly larger than that of the wafer, and the bottom plate is provided with a groove matched with the upper cover plate, and the groove is used for placing the wafer. The thickness difference between the bulge of the upper cover plate and the groove of the bottom plate is the same as that of the front end device. The bottom plate groove is internally provided with a groove with the same size as the protruding circuit layer of the front end device, the bottom is provided with a contact electrode which is the same as the communication electrode and the charging electrode, and the electrode is supported by a spring and slightly higher than the groove at the bottommost part. The bottom is provided with a data transceiving and charging circuit 15 matched with the front-end device.
Further, the "transfer station" may be used as a storage box of the front-end device, and further the steps of the present invention for reconstructing an actual wafer temperature field are:
step one: and removing the silicon cover on the front-end device, and establishing communication connection with the front-end device through the storage box.
Step two: the acquisition start, end, duration, AD sampling rate, etc. are set by software written on the PC. The temperature acquisition duration of the wafer generally includes the entire process.
Step three: after the setting is finished, the front-end device is placed in the processing chamber through the mechanical arm, a semiconductor process flow is started, after the processing is finished and the processing is cooled, the silicon cover is taken out, the front-end device is taken out through the mechanical arm and placed in the storage box, and the temperature information stored on the wafer is downloaded through serial communication.
Step four: and analyzing the temperature information, and obtaining the temperature distribution of the whole wafer surface by adopting an inverse distance weight interpolation algorithm because the sensor is not distributed on the whole wafer surface.
Step five: after the temperature distribution of the whole device is obtained, the uniformity of the temperature in the wafer processing process and the deviation of the temperature in the whole process from the actual expected temperature can be analyzed. And the mismatch probability of the wafer and the etching cavity is reduced by adjusting the process conditions such as voltage, magnetic field and the like to optimize the process conditions.

Claims (4)

1. A wafer temperature field reconstruction device of a bilayer structure, the device comprising: temperature measuring device, data transceiver, data processing device, temperature measuring device includes: a lower wafer, an intermediate circuit layer and an upper wafer; the intermediate circuit layer includes: the temperature sensor, the thin film battery and the circuit on the PCB; a groove for placing a thin film battery is etched in the center of the lower layer wafer, and a heat insulating material is arranged between the thin film battery and the lower layer wafer; a through hole for placing a circuit on the PCB is etched in the center of the upper wafer, and a heat insulating material is attached to the side wall of the through hole; the lower layer wafer and the upper layer wafer are provided with grooves for placing temperature sensors around the center; the data wires of the temperature sensor are wires deposited on the surfaces of the lower wafer and the upper wafer, the wires are connected with welding points on the PCB, the PCB is positioned at the central position between the upper wafer and the lower wafer, and the periphery of the central positions of the upper wafer and the lower wafer are bonded through high-temperature-resistant glue, and meanwhile, the temperature sensor of the upper wafer and the temperature sensor of the lower wafer are fixed; the thin film battery is connected with the PCB, and an electrode is also packaged on the PCB and extends out of the central through hole of the upper wafer; a detachable silicon cover is additionally arranged for protecting the electrode in actual working conditions;
the data transceiver comprises a base and an upper cover plate, wherein a wafer groove for placing a wafer is formed in the base, an electrode groove for connecting an electrode is formed in the center of the bottom of the groove, a contact electrode is arranged in the electrode groove, and the position of the contact electrode corresponds to the position of an electrode of the temperature measuring device; the upper cover plate is provided with a bulge matched with the base groove and used for pressing a wafer placed in the wafer groove; the data transceiver realizes charge and discharge and data exchange of the temperature measuring device through the contact electrode;
the data processing device receives data from the data receiving and transmitting device and is used for reconstructing a wafer temperature field.
2. The device for reconstructing a wafer temperature field of a bilayer structure according to claim 1, wherein two circles of temperature sensor grooves are correspondingly arranged on the lower layer wafer and the upper layer wafer, each circle of temperature sensor grooves is 8, each circle of adjacent temperature sensor grooves is spaced by 45 degrees, the inner circle of temperature sensor grooves, the outer circle of temperature sensor grooves adjacent to the inner circle of temperature sensor grooves and the circle center of the wafer are positioned on the same straight line.
3. The wafer temperature field reconstruction device with a double-layer structure as set forth in claim 1, wherein a data connection module is disposed in an electrode groove of a base in the data transceiver, the data connection module comprising: the device comprises a control circuit, contact electrodes, springs, an insulating support and a shell, wherein the insulating support is square bowl-shaped and is reversely buckled on the control circuit, a plurality of rod-shaped contact electrodes are arranged at the top of the insulating support in a penetrating mode, spring blocking sheets are arranged at the middle parts of the contact electrodes, and contact sheets are arranged at the top of the contact electrodes; the control circuit, the spring and the insulating support are all positioned in the shell, the contact electrode passes through the shell and the insulating support from the top, the contact piece is positioned outside the shell, and the spring blocking piece is positioned between the shell and the insulating support; when the electrode contacts the contact piece, the spring is compressed, so that the contact is more reliable; the contact electrode is positioned at the top end in the insulating bracket and is connected with the control circuit through a wire.
4. The wafer temperature field reconstruction device with a double-layer structure as claimed in claim 1, wherein the depth of the grooves of the temperature sensors formed on the lower wafer and the upper wafer is 0.2mm, and the distance between the grooves of the temperature sensors and the other side of the wafer is 0.4mm; the width of the lead connecting the temperature sensor and the PCB is not more than 0.7mm, and the thickness is 0.05mm; the thickness of the bottom of the groove for placing the thin film battery in the center of the lower layer wafer is 0.1mm from the other side of the wafer.
CN202110675598.4A 2021-06-18 2021-06-18 Wafer temperature field reconstruction device with double-layer structure Active CN113506760B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110675598.4A CN113506760B (en) 2021-06-18 2021-06-18 Wafer temperature field reconstruction device with double-layer structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110675598.4A CN113506760B (en) 2021-06-18 2021-06-18 Wafer temperature field reconstruction device with double-layer structure

Publications (2)

Publication Number Publication Date
CN113506760A CN113506760A (en) 2021-10-15
CN113506760B true CN113506760B (en) 2023-05-09

Family

ID=78010383

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110675598.4A Active CN113506760B (en) 2021-06-18 2021-06-18 Wafer temperature field reconstruction device with double-layer structure

Country Status (1)

Country Link
CN (1) CN113506760B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006173531A (en) * 2004-12-20 2006-06-29 Hitachi Kokusai Electric Inc Substrate treating apparatus
WO2017200267A1 (en) * 2016-05-16 2017-11-23 한국표준과학연구원 Temperature measurement wafer sensor and method for manufacturing same
WO2018199601A1 (en) * 2017-04-28 2018-11-01 (주)에스엔텍 Sensor-mounted wafer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006173531A (en) * 2004-12-20 2006-06-29 Hitachi Kokusai Electric Inc Substrate treating apparatus
WO2017200267A1 (en) * 2016-05-16 2017-11-23 한국표준과학연구원 Temperature measurement wafer sensor and method for manufacturing same
WO2018199601A1 (en) * 2017-04-28 2018-11-01 (주)에스엔텍 Sensor-mounted wafer

Also Published As

Publication number Publication date
CN113506760A (en) 2021-10-15

Similar Documents

Publication Publication Date Title
US9054397B2 (en) Battery cell with integrated sensing platform
US20200076016A1 (en) Sensored Battery Pouch
JP5922044B2 (en) Process condition measuring element with shield
US11223076B2 (en) Battery pack
US10497984B2 (en) Embedded solid-state battery
US8482118B2 (en) Integrated circuit micro-module
JP4809330B2 (en) Integrated process condition detection wafer and data analysis system
US20040081860A1 (en) Thin-film battery equipment
NL1015956C2 (en) Battery, especially for portable devices, has an anode containing silicon
KR20160030278A (en) Battery with a battery management system, multiple cell subsets and an hermetic casing
CN111613763A (en) Battery module with interconnect board assembly having integrated cell sensing PCB-flex circuit hardware
US20170092566A1 (en) Body-Mountable Device with a Common Substrate for Electronics and Battery
JP5511374B2 (en) Battery on semiconductor element or flexible printed circuit board and method for manufacturing the same
CN110098353B (en) Microbattery assembly
US20190051943A1 (en) Large capacity solid state battery
CN103604521B (en) Temperature-sensitivprobe probe and preparation method thereof
US20230411826A1 (en) Antenna packaging structure and manufacturing method thereof
CN103579171B (en) Semiconductor package part and manufacture method thereof
CN113506760B (en) Wafer temperature field reconstruction device with double-layer structure
CN113066771B (en) Multilayer stacked microsystem structure
KR20170133699A (en) Battery integration packaging apparatus and method
CN110459672B (en) Piezoelectric ceramic sensor and preparation method thereof
Kim et al. Design and characteristics of low‐resistance lithium‐ion battery pack and its fast charging method for smart phones
US7091503B2 (en) Measuring plasma uniformity in-situ at wafer level
CN111900244A (en) Insulating plate heat-carrying electric pile sensor component and manufacturing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB03 Change of inventor or designer information

Inventor after: Wang Chao

Inventor after: Jiang Jing

Inventor after: Niu Yi

Inventor after: Jia Jingcai

Inventor after: Chen Mengchao

Inventor after: Zhong Yekui

Inventor after: Yu Peifeng

Inventor after: Zhang Zezhan

Inventor before: Wang Chao

Inventor before: Jia Jingcai

Inventor before: Chen Mengchao

Inventor before: Zhong Yekui

Inventor before: Yu Peifeng

Inventor before: Zhang Zezhan

Inventor before: Niu Yi

Inventor before: Jiang Jing

CB03 Change of inventor or designer information
GR01 Patent grant
GR01 Patent grant