CN113496882A - 碳化硅栅极氧化层迁移率改善的制作方法 - Google Patents

碳化硅栅极氧化层迁移率改善的制作方法 Download PDF

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CN113496882A
CN113496882A CN202010251291.7A CN202010251291A CN113496882A CN 113496882 A CN113496882 A CN 113496882A CN 202010251291 A CN202010251291 A CN 202010251291A CN 113496882 A CN113496882 A CN 113496882A
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silicon carbide
thermal oxidation
oxide layer
carbide substrate
trench
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戴茂州
高巍
廖运健
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Chengdu Rongsi Semiconductor Co ltd
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Abstract

本发明公开了一种碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,包括:提供碳化硅基板;形成沟槽结构于碳化硅基板之中;形成单晶硅层于沟槽结构之上;进行热氧化以在该单晶硅层之上形成顶部氧化层、底部氧化层与侧壁氧化层;其中热氧化过程的实施温度小于1000℃。

Description

碳化硅栅极氧化层迁移率改善的制作方法
技术领域
本发明涉及一种碳化硅基板,特别涉及一种碳化硅栅极氧化层迁移率改善的制作方法。
背景技术
在半导体元件制程中,氧化硅层的形成通常是以加热方式来执行。通过加热硅或碳化硅表面来生长二氧化硅。碳化硅(Silicon carbide, SiC)的氧化过程会于氧化物/碳化硅界面层产生积聚碳团及高密度的积存电荷。因此,加热氧化之后,通常会施行另一个长时间氧化后的退火步骤。
由于碳化硅具有宽能隙、高临界击穿电场强度以及高热导率等特性,被认为是功率开关元件的极佳材料。
另外,相较于蓝宝石基板而言,碳化硅基板与氮化镓之间的晶格匹配更佳,因此,于碳化硅基板更广泛的用于半导体元件之中。
发明内容
本发明的主要目的在于提供碳化硅栅极氧化层迁移率改善的制作方法。为达到上述目的,本发明的技术方案是这样实现的:
本发明提供一种碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,包括:提供碳化硅基板;形成沟槽结构于碳化硅基板之中;形成一单晶硅层于沟槽结构之上;进行热氧化用于该单晶硅层之上形成顶部氧化层、底部氧化层与侧壁氧化层;其中该热氧化过程的实施温度为小于1000℃。
根据本发明的一观点,碳化硅基板具有上表面的(0001)晶面,侧面的
Figure BDA0002435580020000011
晶面。沟槽结构是通过光刻与刻蚀形成。热氧化过程的实施温度为800℃~900℃。形成单晶硅层于沟槽结构之上通过溅镀、物理气相沉积或化学气相沉积来执行。
根据本发明的另一观点,热氧化过程通过湿氧及氮的热氧化法来执行、干氧的热氧化法或气体分子NO及N2O的气体环境下执行。热氧化过程通过氮系列元素气体分子NO,NO2,N2O及NH3的至少一个的环境下执行。
此些优点及其他优点从以下较佳实施例的叙述及申请专利范围将使读者得以清楚了解本发明。
附图说明
如下所述的对本发明的详细描述与实施例的示意图,应使本发明更被充分地理解;然而,应可理解此仅限于作为理解本发明应用的参考,而非限制本发明于一特定实施例之中。
图1为本发明实施例的碳化硅基板的示意图;
图2为本发明实施例的于碳化硅基板之上形成一光阻图案的示意图;
图3为本发明实施例的刻蚀碳化硅基板形成一沟槽的示意图;
图4为本发明实施例的碳化硅基板的沟槽的示意图;
图5为本发明实施例的沉积单晶硅于沟槽结构之上的示意图;
图6为本发明实施例的热氧化用于单晶硅上的沟槽的示意图。
主要部件附图标记:
100碳化硅基板 102水平上表面 104垂直面
106光阻图案 108刻蚀区域 110沟槽
112剩余的光阻 114沟槽的底部 116沟槽的侧壁
118上表面 120沟槽底部的单晶硅层 122沟槽侧壁的单晶硅层
124碳化硅基板的上表面的单晶硅层 126沟槽底部的氧化层
128沟槽侧壁的氧化层 130单晶硅的上表面的氧化层
具体实施方式
此处本发明将针对发明具体实施例及其观点加以详细描述,此类描述为解释本发明的结构或步骤流程,其供以说明之用而非用以限制本发明的权利要求。因此,除说明书中的具体实施例与较佳实施例外,本发明亦可广泛施行于其它不同的实施例中。
本发明的碳化硅基板的底部氧化层增厚的制作方法,如底下所述。首先,提供碳化硅(SiC)基板100,如图1所示。在本发明之中,碳化硅基板100具有水平上表面102与垂直面104。举一实施例,碳化硅基板100具有一上表面的晶面为(0001)面与一侧面的晶面为
Figure BDA0002435580020000031
面。
在实施例之中,碳化硅基板100可以应用于绝缘栅双极晶体管 (Insulated GateBipolar Transistor:IGBT)半导体元件之中。IGBT半导体元件采用沟槽(Trench)结构。在此沟槽结构之中,将原来水平方向的栅极改为垂直方向。在沟槽结构的IGBT元件之中,由于相邻元胞的耗尽区(Depletion Region)不会互相靠近,因此寄生的结栅场效应晶体管(Junction Gate Field Effect Transistor:JFET)区得以消除。另外,沟槽结构的IGBT元件可以有效的抑制闩锁(Latch-Up)。
然后,在碳化硅基板100之上形成光阻图案106,定义刻蚀区域 108,如图2所示。其中光阻图案106可以利用光刻(Photolithography Process)来实现。接下来,以光阻图案106作为掩膜版进行刻蚀,形成沟槽110,如图3所示。沟槽110的长度、宽度、深度可以依照不同的元件而设计。刻蚀过程例如湿法刻蚀、干法刻蚀、溅射刻蚀、或其他方法。在一些实施例中,形成沟槽110的刻蚀过程包括利用一种或多种刻蚀剂材料。在一些实施例中,刻蚀剂材料包括使用Cl2、SF6、 HBr、HCl、CF4、CHF3、C2F6、C4F8、或其他类似的刻蚀剂材料的一种或多种。
之后,将剩余的光阻112移除,以形成底部114、侧壁116的沟槽以及上表面118,如图4所示。
接下来,通过沉积(Deposition Process),用于沟槽的底部114、侧壁116与碳化硅基板100的上表面118分别形成沟槽底部的单晶硅层120、沟槽侧壁的单晶硅层122与碳化硅基板100的上表面的单晶硅层124。在本实施例之中,在1350℃以下的温度(例如1100℃~1350℃的温度)实施沉积,以在碳化硅基板的沟槽结构的表面沉积单晶硅,以形成单晶硅层薄膜。沉积过程包含溅射(sputtering)、物理气相沉积 (Physical Vapor Deposition:PVD)或化学气相沉积(Chemical Vapor Deposition:CVD)。
最后,进行热氧化(Thermal Oxidation),用于单晶硅层的底部120、单晶硅层的侧壁122与单晶硅层的上表面124分别形成沟槽底部的氧化层126、沟槽侧壁的氧化层128与单晶硅的上表面的氧化层130,如图6所示。在本实施例之中,在1000℃以下的温度(例如800℃~900℃的温度)实施热氧化过程,以在碳化硅基板的沟槽结构的表面进行热氧化,以形成氧化层薄膜。
在本发明之中,将硅外延于碳化硅基板的表面形成单晶硅;然后,再进行低温氧化(低于1000℃)过程,以避免碳化硅基板被氧化,使介面氧化层直接由外延生长的硅氧化,而避免形成Si-O,Si-C,Si-O-C 的悬浮键(dangling bonds),因此提高碳化硅栅极氧化层的迁移率 (mobility)。
上述热氧化过程可以通过使用湿氧及氮的热氧化法形成氧化层薄膜,或者通过使用干氧的热氧化法形成氧化层薄膜,或者通过使用干氧及氮的热氧化法形成氧化层薄膜。上述沟槽底部的氧化层126、沟槽侧壁的氧化层128与碳化硅基板100的上表面的氧化层130的厚度可以通过温度、热氧化时间、热氧化方法、或者其他参数条件来控制、决定。
在另一实施例之中,上述热氧化过程可以通过含有氮及氧的气体分子(NO)环境下,将碳化硅基板的沟槽结构表面进行热氧化而形成氧化层薄膜。例如,在包含有氮及氧的的气体分子(N2O)的气体环境下,将碳化硅基板的沟槽结构的表面进行热氧化而形成氧化层薄膜。另外,在包含作为含有氮及氧的气体分子NO及N2O的气体环境下,将碳化硅基板的沟槽结构的表面进行热氧化而形成氧化层薄膜。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。

Claims (10)

1.一种碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,包含:提供碳化硅基板;形成沟槽结构于该碳化硅基板之中;形成单晶硅层于沟槽结构之上;以及进行热氧化,用于该单晶硅层之上形成顶部氧化层、底部氧化层与侧壁氧化层;其中该热氧化过程的实施温度小于1000℃。
2.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述碳化硅基板具有上表面的0001晶面,侧面的
Figure FDA0002435580010000011
晶面。
3.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述沟槽结构是通过刻蚀而形成。
4.根据权利要求3所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述刻蚀过程的刻蚀剂材料包括以下至少之一:Cl2、SF6、HBr、HCl、CF4、CHF3、C2F6、C4F8
5.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述热氧化过程的实施温度为800℃~900℃。
6.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,其中形成该单晶硅层于沟槽结构之上通过溅镀、物理气相沉积或化学气相沉积过程来执行。
7.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述热氧化过程是通过湿氧及氮的热氧化法来执行。
8.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述热氧化过程是通过干氧的热氧化法来执行。
9.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述热氧化过程是通过氮系列元素气体分子的环境下执行。
10.根据权利要求1所述的碳化硅栅极氧化层迁移率改善的制作方法,其特征在于,所述热氧化过程是通过氮系列元素气体分子NO,NO2,N2O及NH3的至少一个的环境下执行。
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Citations (3)

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