CN113485052B - Display panel and manufacturing method thereof - Google Patents

Abstract

The application provides a display panel and a manufacturing method thereof. The display panel comprises an array substrate. The array substrate is provided with a display area and a non-display area. The display area has a plurality of data lines and a common electrode. The non-display area is provided with a plurality of flip chip films, a first test pad, a second test pad and a third test pad. The flip chip film is electrically connected with the data lines of the display area in a one-to-one correspondence manner. The third test pad is electrically connected with the common electrode. The first test pad and the second test pad are arranged in the area between two adjacent flip chip films and are arranged at intervals along the extending direction of the first edge of the array substrate. The third test pad is arranged in a spacing area between the flip chip film and the second side of the array substrate. The non-display area is also provided with a waterproof adhesive layer which covers the surface of the third test pad. The display panel is provided with the third test pad outside the flip chip film, so that the condition that the third test pad is corroded by water vapor caused by poor coating of the waterproof adhesive layer and then the common electrode is corroded can be avoided.

Description

Display panel and manufacturing method thereof

Technical Field

The present disclosure relates to the field of liquid crystal display technologies, and in particular, to a display panel and a method for manufacturing the display panel.

Background

In the conventional process of manufacturing a Liquid Crystal Display (LCD), a simple lighting confirmation is performed after the liquid crystal panel is cut, which is generally called a lighting Test (CT). In the lighting Test process, a Test signal is generally applied to a lighting Test Pad (Cell Test Pad) of the liquid crystal panel, and the lighting Test Pad transmits the Test signal to a pixel unit of the liquid crystal panel through a corresponding Test line. After one lighting test (CT 1) inspection, the LCD panel is directly scrapped if obvious line defects exist. After the liquid crystal panel is qualified through lighting test inspection, a test circuit between a lighting test pad and a pixel unit is cut off through a laser cutting process, then a flip chip film is attached to the liquid crystal panel, and subsequent signals are applied to the pixel unit of the liquid crystal panel through the flip chip film. However, during the laser cutting process, the common electrode trace cannot be cut off, because the subsequent lighting test process also needs to continue to externally clock the signal through the common electrode trace. However, if the common electrode wiring is not cut off, when the water vapor corrodes the lighting test pad, the water vapor can diffuse to the display area of the liquid crystal panel along the common electrode wiring, thereby affecting the display performance of the liquid crystal panel. One conventional approach is to use a taffy (tuffy) adhesive to coat the lighting test pad to avoid water vapor corrosion. However, when the coating condition of the taffy is poor, the lighting test pad is corroded by water vapor, which is still easy to generate.

Disclosure of Invention

The main objective of the present application is to provide a display panel, through setting up the test pad of connecting the public electrode at the interval region between the second limit of flip chip film and array substrate to and cover the waterproof glue layer on the surface of connecting the public electrode, aim at solving the problem that the test pad is corroded by steam that the coating condition of taffy glue is not good among the prior art.

In order to achieve the above objective, an embodiment of the present application provides a display panel, which includes an array substrate, a color film substrate, and a liquid crystal layer disposed between the array substrate and the color film substrate. The array substrate is provided with a display area and a non-display area adjacent to the display area. The display area is provided with a plurality of data lines and a common electrode. The non-display area is provided with a plurality of flip chip films. The plurality of flip chip films are electrically connected with the plurality of data lines of the display area in a one-to-one correspondence manner, and the third test pad is electrically connected with the common electrode.

The non-display area is also provided with a first test pad, a second test pad and a third test pad, and the third test pad is electrically connected with the common electrode. The first test pad and the second test pad are arranged in an area between two adjacent flip chip films and are arranged at intervals along the extending direction of the first edge of the array substrate. The third test pad is arranged in a spacing area between the plurality of flip chip films and the second side of the array substrate. The non-display area is also provided with a waterproof adhesive layer, and the waterproof adhesive layer covers the surface of the third test pad.

In an embodiment, the first test pad and the second test pad are further disposed in a spaced area between the plurality of flip chip films and the second side of the array substrate, and the first test pad and the second test pad disposed between the plurality of flip chip films and the second side of the array substrate are located between the flip chip films and the third test pad.

In an embodiment, during a testing process of the display panel, the first test pad is electrically connected to the even column data line through a first test lead, and the second test pad is electrically connected to the odd column data line through a second test lead;

in the use process of the display panel, the electrical connection circuit of the first test lead and the even-numbered data lines is cut off, and the electrical connection circuit of the second test lead and the odd-numbered data lines is cut off.

In an embodiment, in a region between two adjacent flip chip films, a first test pad group formed by the first test pad and the second test pad is arranged in a row, and in a region between the plurality of flip chip films and the second side of the array substrate, a second test pad group formed by the first test pad, the second test pad and the third test pad is arranged in a row.

In an embodiment, the waterproof glue layer is in a strip shape, and the waterproof glue layer covers the surfaces of the first test pad, the second test pad and the third test pad at the same time.

In an embodiment, the waterproof glue layer includes a first glue layer located between two adjacent flip chip films and a second glue layer located in a space region between the plurality of flip chip films and the second side of the array substrate, the first glue layer covers the surfaces of the first test pad and the second test pad, the second glue layer covers the surfaces of the first test pad, the second test pad and the third test pad, and a coating width of the second glue layer is greater than a coating width of the first glue layer, or a coating thickness of the second glue layer is greater than a coating thickness of the first glue layer.

Another embodiment of the present application further provides a method for manufacturing a display panel, which is used for manufacturing the display panel according to any one of the above embodiments. The manufacturing method of the display panel comprises the following steps:

s101: providing a display panel, wherein the display panel comprises an array substrate, and the array substrate is provided with a display area and a non-display area adjacent to the display area; the display area is provided with a plurality of data lines and a common electrode; the non-display area is provided with a first test pad, a second test pad and a third test pad, the first test pad and the second test pad are arranged at intervals along the extending direction of the first edge of the array substrate, the first test pad is electrically connected with even-numbered data lines through a first test lead, the second test pad is electrically connected with odd-numbered data lines through a second test lead, and the third test pad is electrically connected with the common electrode;

s102: performing a lighting test on the display panel;

s103: cutting off the electric connection line between the first test lead and the even column data line and cutting off the electric connection line between the second test lead and the odd column data line;

s104: attaching a plurality of flip chip films to the display panel, enabling the flip chip films to be in one-to-one correspondence with the plurality of data lines to form electric connection, enabling the first test pad and the second test pad to be arranged in a region between two adjacent flip chip films, and enabling the third test pad to be arranged in an outer region of the plurality of flip chip films.

S105: and coating a waterproof glue layer on the non-display area of the array substrate, wherein the waterproof glue layer covers the surface of the third test pad.

In an embodiment, in step S105, the waterproof glue layer is in a strip shape, and the waterproof glue layer covers the surfaces of the first test pad, the second test pad and the third test pad at the same time.

In an embodiment, in step S105, the waterproof glue layer includes a first glue layer located between two adjacent flip chip films and a second glue layer located outside the plurality of flip chip films, the first glue layer covers the surfaces of the first test pad and the second test pad, the second glue layer covers the surfaces of the first test pad, the second test pad and the third test pad, and the coating width of the second glue layer is greater than the coating width of the first glue layer, or the coating thickness of the second glue layer is greater than the coating thickness of the first glue layer.

In one embodiment, the lighting test process includes the steps of: filling even-numbered column data driving signals into the first test pad, filling odd-numbered column data driving signals into the second test pad, transmitting the even-numbered column data driving signals to even-numbered column data lines through the first test lead, and transmitting the odd-numbered column data driving signals to odd-numbered column data lines through the second test lead; filling a common voltage signal into the third test pad, wherein the common voltage signal is transmitted to the common electrode through the third test pad;

and/or, before the waterproof glue layer is coated, carrying out lighting test again on the display panel with the flip chip film, wherein the process of carrying out lighting test again comprises the following steps: transmitting a data driving signal to the plurality of data lines through the flip chip film; and filling a common voltage signal into the third test pad, so that the common voltage signal is transmitted to the common electrode through the third test pad.

In the display panel and the manufacturing method of the display panel provided by the embodiment of the application, since the third test pad connected with the common electrode is arranged in the interval area between the plurality of flip chip films and the second edge of the array substrate, when the waterproof glue layer is coated, the area of the waterproof glue layer to be coated is smaller and is positioned in the edge area of the array substrate, and the coating difficulty of the waterproof glue layer is smaller. Therefore, the setting position of the third test pad can effectively ensure the coating quality of the waterproof glue layer. In addition, because the electric connection circuit between the first test pad and the second test pad and the plurality of data lines can be cut off in the use process of the subsequent display panel, even if the surfaces of the first test pad and the second test pad are not coated with a waterproof glue layer or the coating quality of the waterproof glue layer is poor, when the water vapor corrodes the first test pad or the second test pad, the water vapor can not diffuse to the inside of the display panel along the electric connection circuit between the first test pad or the second test pad and the plurality of data lines, thereby influencing the performance of the display panel.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from the structures shown in these drawings without inventive effort to a person of ordinary skill in the art.

Fig. 1 is a schematic structural diagram of a display panel according to a first embodiment of the present disclosure;

FIG. 2 is a schematic diagram of the array substrate in FIG. 1;

FIG. 3 is an enlarged schematic view of a region A of the array substrate in FIG. 2;

fig. 4 is a schematic structural diagram of a display panel according to a second embodiment of the present disclosure;

FIG. 5 is a schematic diagram of the array substrate in FIG. 4;

fig. 6 is a flow chart of a method for manufacturing a display panel according to a third embodiment of the present disclosure;

fig. 7 is a schematic structural diagram of the display panel provided in step S101 in fig. 6;

FIG. 8 is a schematic view of the display panel of FIG. 7 after laser cutting;

fig. 9 is a schematic structural diagram of the display panel of fig. 8 after the flip chip film is attached.

Reference numerals illustrate:

name of the name	Reference numerals	Name of the name	Reference numerals
				Display panel
	100	Array substrate	110
				Color film substrate	210	Data line	120
Scanning line	130	Pixel unit	140
				Display area	111	Non-display area	112
Common electrode	141	Flip chip film	150
				First test pad	161	Second test pad	162
Third test pad	163	First test lead	171
				Second test lead	172	First part	1711
Second part	1712	Waterproof glue layer	180
				First adhesive layer	181	Second adhesive layer	182

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

It should be noted that, in the embodiment of the present application, directional indications (such as up, down, left, right, front, and rear … …) are referred to, and the directional indications are merely used to explain the relative positional relationship, movement conditions, and the like between the components in a specific posture, and if the specific posture is changed, the directional indications are correspondingly changed.

In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, if "and/or" and/or "are used throughout, the meaning includes three parallel schemes, for example," a and/or B "including a scheme, or B scheme, or a scheme where a and B are satisfied simultaneously. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be regarded as not exist and not within the protection scope of the present application.

Embodiment one:

referring to fig. 1, an embodiment of a display panel 100 includes an array substrate 110, a color film substrate 210, and a liquid crystal layer disposed between the array substrate 110 and the color film substrate 210. Referring to fig. 2, the array substrate 110 is provided with a plurality of data lines 120, a plurality of scan lines 130, and a plurality of pixel units 140. In this embodiment, the plurality of data lines 120 and the plurality of scan lines 130 are arranged in an array to define an area where the plurality of pixel units 140 are located.

The array substrate 110 has a display region 111 and a non-display region 112 adjacent to the display region 111.

The display area 111 is provided with the plurality of data lines 120, the plurality of scan lines 130, and the plurality of pixel units 140. The plurality of pixel units 140 have a common electrode 141. In this embodiment, the common electrode 141 is a cf_com line in the liquid crystal panel, that is, a common electrode wiring disposed on the CF (Color Filter) substrate side.

In this embodiment, the display panel 100 is an array substrate row driving (Gate driver on array, GOA) type liquid crystal panel. Specifically, the display panel 100 further includes a GOA circuit. The plurality of scan lines 130 are driven by a GOA circuit. Specifically, the GOA circuit is disposed at a lateral side of the display area 111 of the array substrate 110. The GOA circuits may be two, which are respectively disposed at two sides of the display area 111 of the array substrate 110 in the lateral direction, as required. When the GOA circuits are disposed at both sides of the display area 111 of the array substrate 110 in the lateral direction, the two GOA circuits simultaneously drive the thin film transistors connected to the plurality of scan lines 130 in the display area 111. At this time, the display panel 100 is a liquid crystal panel driven by a double-ended array substrate row driving circuit.

Referring to fig. 3, the non-display area 112 has a plurality of flip-chip films 150, a first test pad 161, a second test pad 162 and a third test pad 163. The plurality of flip chip films 150 are electrically connected to the plurality of data lines 140 of the display area 111. The third test pad 163 is electrically connected to the common electrode 141. Specifically, during the testing process of the display panel 100, the first test pads 161 are electrically connected to the data lines 120 of even columns through the first test leads 171. The second test pad 162 is electrically connected to the data line 120 of the odd-numbered columns through a second test lead 172. During the use of the display panel 100, the electrical connection lines of the first test lead 171 and the data lines 120 of the even numbered columns are cut off. The second test leads 172 are disconnected from the data lines 120 of the odd columns. In this embodiment, the first test lead 171 includes a first portion 1711 and a plurality of second portions 1712. The first portion 1711 is disposed in a region of the non-display area 112 away from the display area 111. The second portion 1712 is disposed in an area of the non-display area 112 near the display area 111. The second portions 1712 surround the first test pad groups formed by the adjacent first test pad 161 and second test pad 162, respectively, and surround the second test pad groups formed by the adjacent first test pad 161, second test pad 162, and third test pad 163, respectively. In this embodiment, the second portion 1712 is curved or folded, and is disposed around the first test pad group or around the second test pad group. In this embodiment, the first test pad 161 and the second test pad 162 form a first test pad group in the area between two adjacent flip chip films 150. In the outer area of the plurality of flip chip films 150, the first test pad 161, the second test pad 162 and the third test pad 163 form a second test pad group. The first test pad group and the second test pad group are arranged in a row.

The first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chip films 150 and are arranged at intervals along the extending direction of the first side of the array substrate 110. The third test pads 163 are disposed at outer regions of the plurality of flip chip films 150. That is, the third test pads 163 are disposed at spaced regions between the plurality of flip chip films 150 and the second side of the array substrate 110. In this embodiment, the first side of the array substrate 110 is the side provided with the data line 120; the second side of the array substrate 110 is the side provided with the scan line 130. The non-display area 112 also has a waterproof glue layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. In this embodiment, the waterproof glue layer 180 is made of tambour glue. In one embodiment, the waterproof glue layer 180 is elongated. The waterproof glue layer 180 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163 at the same time. Specifically, the waterproof glue layer 180 includes a first glue layer 181 located between two adjacent flip chip films 150 and a second glue layer 182 located outside the plurality of flip chip films 150. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162, and the third test pad 163. The second glue layer 182 has a coating width greater than that of the first glue layer 181. Alternatively, the second adhesive layer 182 has a coating thickness greater than that of the first adhesive layer 181. It is understood that the second adhesive layer 182 may also cover only the surface of the third test pad 163. While the surfaces of the first and second test pads 161 and 162 are covered with the first adhesive layer 181.

In one embodiment, the first test pad 161 and the second test pad 162 are further disposed at an outer region of the flip chip film 150, i.e., a spaced region between the flip chip film 150 and the second side of the array substrate 110. The first and second test pads 161 and 162 disposed between the plurality of flip chip films 150 and the second side of the array substrate 110 are located between the flip chip films 150 and the third test pad 163.

In the display panel 100 provided in this embodiment, the first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chip films 150. The third test pads 163 are disposed in the spaced area between the plurality of flip chip films 150 and the second side of the array substrate 110. The non-display area 112 also has a waterproof glue layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. Since the third test pads 163 connected to the common electrode 141 are disposed outside the plurality of the flip chip films 150, when the waterproof glue layer 180 is coated, it is only necessary to coat the waterproof glue layer 180 on the third test pads 163 of the outer areas of the plurality of the flip chip films 150. Because the area of the waterproof glue layer 180 to be coated is smaller and is located at the edge area of the array substrate 110, the waterproof glue layer 180 is less difficult to be coated. Therefore, the third test pad 163 is disposed in a manner that effectively ensures the coating quality of the waterproof glue layer 180. In addition, since the electrical connection lines between the first and second test pads 161 and 162 and the plurality of data lines 120 may be cut off during the subsequent use of the display panel 100. Even if the surfaces of the first and second test pads 161 and 162 are not coated with the waterproof glue layer 180 or the coating quality of the waterproof glue layer 180 is poor, when the first or second test pad 161 or 162 is corroded by moisture, the moisture is not diffused to the inside of the display panel 100 along the electrical connection lines between the first or second test pad 161 or 162 and the plurality of data lines 120, thereby affecting the performance of the display panel 100.

In addition, when the waterproof adhesive layer 180 covers the first, second and third test pads 161, 162 and 163 at the same time, the waterproof adhesive layer 180 may be divided into the first and second adhesive layers 181 and 182. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162, and the third test pad 163. The second glue layer 182 has a coating width greater than that of the first glue layer 181. Alternatively, the second adhesive layer 182 has a coating thickness greater than that of the first adhesive layer 181. At this time, since the coating width or thickness of the second adhesive layer 182 is greater than the coating width or thickness of the first adhesive layer, the problem of water vapor corroding the common electrode 141 due to poor coating quality of the waterproof adhesive layer 180 can be avoided.

Embodiment two:

referring to fig. 4, another embodiment of the present application provides a display panel 100, which includes an array substrate 110, a color film substrate 210, and a liquid crystal layer disposed between the array substrate 110 and the color film substrate 210. Referring to fig. 5, the array substrate 110 is provided with a plurality of data lines 120, a plurality of scan lines 130, and a plurality of pixel units 140. In this embodiment, the plurality of data lines 120 and the plurality of scan lines 130 are arranged in an array to define an area where the plurality of pixel units 140 are located.

The array substrate 110 has a display region 111 and a non-display region 112 adjacent to the display region 111.

The display area 111 is provided with the plurality of data lines 120, the plurality of scan lines 130, and the plurality of pixel units 140. The plurality of pixel units 140 have a common electrode 141.

The non-display region 112 has a plurality of flip-chip films 150, a first test pad 161, a second test pad 162, and a third test pad 163. The plurality of flip chip films 150 are electrically connected to the plurality of data lines 140 of the display area 111. The third test pad 163 is electrically connected to the common electrode 141. Specifically, during the testing process of the display panel 100, the first test pads 161 are electrically connected to the data lines 120 of even columns through the first test leads 171. The second test pad 162 is electrically connected to the data line 120 of the odd-numbered columns through a second test lead 172. During the use of the display panel 100, the electrical connection lines of the first test lead 171 and the data lines 120 of the even numbered columns are cut off. The second test leads 172 are disconnected from the data lines 120 of the odd columns.

The first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chip films 150 and are arranged at intervals along the extending direction of the first side of the array substrate 110. The third test pads 163 are disposed at outer regions of the plurality of flip chip films 150, i.e., at spaced regions between the flip chip films 150 and the second side of the array substrate 110. The non-display area 112 also has a waterproof glue layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. In this embodiment, the waterproof glue layer 180 is made of tambour glue. In one embodiment, the waterproof glue layer 180 is elongated. The waterproof glue layer 180 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163 at the same time. Specifically, the waterproof glue layer 180 includes a first glue layer 181 located between two adjacent flip chip films 150 and a second glue layer 182 located outside the plurality of flip chip films 150. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162, and the third test pad 163. The second glue layer 182 has a coating width greater than that of the first glue layer 181. Alternatively, the second adhesive layer 182 has a coating thickness greater than that of the first adhesive layer 181.

Unlike the first embodiment, in the present embodiment, the first test wire 171 includes a first portion 1711 and a plurality of second portions 1712. The first portion 1711 is disposed at an edge area of the non-display area 112 near the array substrate 110. The second portion 1712 is disposed in an area of the non-display area 112 near the display area 111. The second portions 1712 surround the first test pad groups formed by the adjacent first test pad 161 and second test pad 162, respectively, and surround the second test pad groups formed by the adjacent first test pad 161, second test pad 162, and third test pad 163, respectively.

In the display panel 100 provided in this embodiment, the first test lead 171 is divided into a first portion 1711 and a plurality of second portions 1712, and the plurality of second portions 1712 respectively encircle a plurality of first test pad groups formed by adjacent first test pads 161 and second test pads 162, and respectively encircle a plurality of second test pad groups formed by adjacent first test pads 161, second test pads 162, and third test pads 163. At this time, the areas where the first, second and third test pads 161, 162 and 163 are located may be isolated from the display area 111 by the first test wire 171, thereby enhancing the reliability of the use process of the display panel 100. In this embodiment, the second test wire 172 is also divided into a first portion and a second portion, and the specific structure is similar to that of the first test wire 171, and will not be described herein.

Embodiment III:

referring to fig. 6, another embodiment of the present application further provides a method for manufacturing the display panel 100. The manufacturing method of the display panel 100 includes the following steps:

s101: a display panel 100 is provided. Referring to fig. 7, the display panel 100 includes an array substrate 110, a color film substrate 210, and a liquid crystal layer disposed between the array substrate 110 and the color film substrate 210. It should be noted that the display panel 100 is manufactured by a conventional cell process of a liquid crystal panel. The method comprises the following steps: the array substrate 110 and the color film substrate 210 of the display panel 100 are combined, cut or split into single display units after the combination, then liquid crystal is poured between the array substrate 110 and the color film substrate 210, and finally, the lighting test is performed on the manufactured display panel 100. Wherein, the array substrate 110 of each display unit is provided with a test pad for testing. In this embodiment, the structure of the array substrate 110 is similar to that of the array substrate 110 shown in fig. 2. The array substrate 110 has a display region 111 and a non-display region 112 adjacent to the display region 111. The display area 111 has a plurality of data lines 120 and a common electrode 141. The non-display area 112 has a first test pad 161, a second test pad 162, and a third test pad 163. The third test pads 163 are disposed at both sides of the non-display area 112. The first test pad 161 and the second test pad 162 are disposed between the two third test pads 163. The first test pads 161 are electrically connected to the data lines 120 of the even numbered columns through the first test leads 171. The second test pad 162 is electrically connected to the data line 120 of the odd-numbered columns through a second test lead 172. The third test pad 163 is electrically connected to the common electrode 141.

S102: and (3) performing a lighting test on the display panel 100 provided in the step S101. Specifically, the lighting test process includes the steps of: the first test pad 161 is filled with data driving signals of even columns. The data driving signals of the odd columns are poured into the second test pad 162. The data driving signals of the even columns are transferred to the data lines 120 of the even columns through the first test lead 171. The data driving signals of the odd columns are transferred to the data lines 120 of the odd columns through the second test leads 172. A common voltage signal is poured into the third test pad 163. The common voltage signal is transmitted to the common electrode 141 through the third test pad 163. Specifically, after the lighting test in step S102, if the liquid crystal panel has obvious line defects, the liquid crystal panel is directly scrapped, so that subsequent components such as polarizers, printed circuit boards, flip-chip films and the like are saved. During the lighting test, since the data lines 120 of even columns are all connected together by the first test lead 171 and the data lines 120 of odd columns are all connected together by the second test lead 172, the first test lead 171 and the second test lead 172 may also be referred to as shorting bars.

S103: the electrical connection lines between the first test leads 171 and the data lines 120 of even columns are cut off, and the electrical connection lines between the second test leads 172 and the data lines 120 of odd columns are cut off, as shown in fig. 8. In the present embodiment, the electrical connection lines between the first test leads 171 and the data lines 120 of even columns and the electrical connection lines between the second test leads 172 and the data lines 120 of odd columns are cut off by means of laser cutting. The purpose of cutting the electrical connection lines between the first test lead 171 or the second test lead 172 and the plurality of data lines 120 is to: the first test lead 171 or the second test lead 172 is only used for a test process, and if the first test lead 171 or the second test lead 172 is still connected to the plurality of data lines 120 during the actual use of the display panel 100, the first test lead 171 or the second test lead 172 may cause a short circuit phenomenon between the plurality of data lines 120, thereby disabling the display panel 100 from operating normally.

S104: a plurality of flip chip films 150 are attached to the display panel 100, and the flip chip films 150 are electrically connected to the plurality of data lines 120, as shown in fig. 9. Meanwhile, the first test pad 161 and the second test pad 162 are disposed at a region between two adjacent flip chip films 150. The third test pads 163 are disposed at outer regions of the plurality of flip chip films 150. Specifically, the flip-chip film 150 generally includes a flexible circuit board 151 and a driving chip 152 disposed on the flexible circuit board 151. When the flip chip film 150 is attached to the display panel 100, the driving chip 152 is electrically connected to the plurality of data lines 120. That is, after the flip-chip film 150 is attached, the driving chip 152 in the flip-chip film 150 may provide the data driving signal for the data line 120 in the display panel 100. As required, in addition to providing data driving signals for the plurality of data lines 120 on the array substrate 110, the flip chip film 150 may also provide scan driving signals for the plurality of scan lines 130 on the array substrate 110. In this embodiment, the flip chip film 150 is disposed on one side of the display area 111 in the longitudinal direction, and is used to provide the data driving signals to the plurality of data lines 120. Specifically, the flip chip film 150 has a plurality of pins corresponding to the plurality of data lines 120, so as to form electrical connection with the plurality of data lines 120 in the attaching process. The number of the flip chip films 150 may be set according to actual needs, and is not particularly limited herein.

S105: and coating a waterproof glue layer 180 on the non-display area 112 of the array substrate 110. The waterproof glue layer 180 covers the surface of the third test pad 163. Specifically, the waterproof glue layer 180 may be tamfie glue. The waterproof glue layer 180 may cover only the surface of the third test pad 163, or may cover the surfaces of the first, second and third test pads 161, 162 and 163 at the same time. Specifically, the waterproof glue layer 180 is long. The waterproof glue layer 180 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163 at the same time.

In this embodiment, the waterproof glue layer 180 includes a first glue layer 181 located between two adjacent flip chip films 150 and a second glue layer 182 located outside the plurality of flip chip films 150. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162, and the third test pad 163. The second glue layer 182 has a coating width greater than that of the first glue layer 181. Alternatively, the second adhesive layer 182 has a coating thickness greater than that of the first adhesive layer 181.

If necessary, the lighting test may be performed again on the display panel 100 to which the plurality of flip chip films 150 are attached before the waterproof glue layer 180 is applied. In one embodiment, the process of performing the lighting test again includes the following steps:

before the waterproof glue layer 180 is applied, the lighting test is performed again on the display panel 100 having the flip chip film 150. The lighting test process comprises the following steps: transmitting a data driving signal to the plurality of data lines 120 through the flip chip film 150; a common voltage signal is poured into the third test pad 163, and the common voltage signal is transmitted to the common electrode 141 through the third test pad 163. The re-lighting test process may check the quality of the display panel 100 to which the flip chip film 150 is attached.

Also, in the method for manufacturing the display panel 100 according to the present embodiment, the first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chip films 150. The third test pads 163 are disposed at outer regions of the plurality of flip chip films 150. The non-display area 112 also has a waterproof glue layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. Since the third test pads 163 connected to the common electrode 141 are disposed at the outer regions of the plurality of flip chip films 150, when the waterproof glue layer 180 is coated, it is only necessary to coat the waterproof glue layer 180 on the third test pads 163 at the outer regions of the plurality of flip chip films 150. Because the area of the waterproof glue layer 180 to be coated is smaller and is located at the edge area of the array substrate 110, the waterproof glue layer 180 is less difficult to be coated. Therefore, the third test pad 163 is disposed at a position effective to ensure the coating quality of the waterproof glue layer 180. In addition, since the electrical connection lines between the first and second test pads 161 and 162 and the plurality of data lines 120 may be cut off during the subsequent use of the display panel 100, even if the surfaces of the first and second test pads 161 and 162 are not coated with the waterproof glue layer 180 or the coating quality of the waterproof glue layer 180 is poor, when the first or second test pad 161 or 162 is corroded by moisture, the moisture may not be diffused to the inside of the display panel 100 along the electrical connection lines between the first or second test pad 161 or 162 and the plurality of data lines 120, thereby affecting the performance of the display panel.

The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the claims, and all equivalent structural changes made in the present application and the accompanying drawings or direct/indirect application in other related technical fields are included in the scope of the present application.

Claims (8)

1. The display panel comprises an array substrate, a color film substrate and a liquid crystal layer arranged between the array substrate and the color film substrate, wherein the array substrate is provided with a display area and a non-display area adjacent to the display area; the display area is provided with a plurality of data lines and a common electrode; the non-display area is provided with a plurality of flip chip films, and the plurality of flip chip films are electrically connected with a plurality of data lines of the display area in a one-to-one correspondence manner, and the non-display area is characterized in that:

the non-display area is further provided with a first test pad, a second test pad and a third test pad, the third test pad is electrically connected with the common electrode, the first test pad and the second test pad are arranged in an area between two adjacent flip chip films and are arranged at intervals along the extending direction of the first edge of the array substrate, the third test pad is arranged in an interval area between the plurality of flip chip films and the second edge of the array substrate, and the non-display area is further provided with a waterproof glue layer which covers the surface of the third test pad;

the waterproof adhesive layer comprises a first adhesive layer located between two adjacent flip chip films and a second adhesive layer located in an interval area between the flip chip films and the second edge of the array substrate, the first adhesive layer covers the surfaces of the first test pad and the second test pad, the second adhesive layer covers the surfaces of the first test pad, the second test pad and the third test pad, and the coating width of the second adhesive layer is larger than that of the first adhesive layer, or the coating thickness of the second adhesive layer is larger than that of the first adhesive layer.

2. The display panel of claim 1, wherein the first test pad and the second test pad are further disposed in a spaced area between the flip-chip film and the second side of the array substrate, the first test pad and the second test pad disposed between the flip-chip film and the second side of the array substrate being located between the flip-chip film and the third test pad.

3. The display panel of claim 1, wherein,

in the testing process of the display panel, the first test pad is electrically connected with even-numbered column data lines through a first test lead, and the second test pad is electrically connected with odd-numbered column data lines through a second test lead;

in the use process of the display panel, the electrical connection circuit of the first test lead and the even-numbered data lines is cut off, and the electrical connection circuit of the second test lead and the odd-numbered data lines is cut off.

4. The display panel of claim 1, wherein in a region between two adjacent flip-chip films, the first test pad group and the second test pad group are arranged in a row, and in a region between the flip-chip film and the second side of the array substrate, the second test pad group and the third test pad group are arranged in a space between the flip-chip films and the second side of the array substrate.

5. The display panel of claim 1, wherein the waterproof glue layer is elongated, and the waterproof glue layer covers the surfaces of the first test pad, the second test pad and the third test pad at the same time.

6. A method for manufacturing a display panel, for manufacturing the display panel according to any one of claims 1 to 5, comprising the steps of:

s101: providing a display panel, wherein the display panel comprises an array substrate, and the array substrate is provided with a display area and a non-display area adjacent to the display area; the display area is provided with a plurality of data lines and a common electrode; the non-display area is provided with a first test pad, a second test pad and a third test pad, the first test pad and the second test pad are arranged at intervals along the extending direction of the first edge of the array substrate, the first test pad is electrically connected with even-numbered data lines through a first test lead, the second test pad is electrically connected with odd-numbered data lines through a second test lead, and the third test pad is electrically connected with the common electrode;

s102: performing a lighting test on the display panel;

s103: cutting off the electric connection line between the first test lead and the even column data line and cutting off the electric connection line between the second test lead and the odd column data line;

s104: attaching a plurality of flip chip films to the display panel, enabling the flip chip films to be in one-to-one correspondence with the plurality of data lines to form electric connection, enabling the first test pad and the second test pad to be arranged in a region between two adjacent flip chip films, and enabling the third test pad to be arranged in a spacing region between the flip chip films and the second side of the array substrate;

s105: coating a waterproof glue layer on the non-display area of the array substrate, wherein the waterproof glue layer covers the surface of the third test pad;

in step S105, the waterproof glue layer includes a first glue layer located between two adjacent flip chip films and a second glue layer located outside the plurality of flip chip films, where the first glue layer covers the surfaces of the first test pad and the second test pad, the second glue layer covers the surfaces of the first test pad, the second test pad and the third test pad, and a coating width of the second glue layer is greater than a coating width of the first glue layer, or a coating thickness of the second glue layer is greater than a coating thickness of the first glue layer.

7. The method of manufacturing a display panel according to claim 6, wherein in step S105, the waterproof adhesive layer is in a strip shape, and the waterproof adhesive layer covers the surfaces of the first test pad, the second test pad and the third test pad at the same time.

8. The method of manufacturing a display panel according to claim 6, wherein,

the lighting test process comprises the following steps: filling even-numbered column data driving signals into the first test pad, filling odd-numbered column data driving signals into the second test pad, transmitting the even-numbered column data driving signals to even-numbered column data lines through the first test lead, and transmitting the odd-numbered column data driving signals to odd-numbered column data lines through the second test lead; filling a common voltage signal into the third test pad, wherein the common voltage signal is transmitted to the common electrode through the third test pad;

and/or, before the waterproof glue layer is coated, carrying out lighting test again on the display panel with the flip chip film, wherein the process of carrying out lighting test again comprises the following steps: transmitting a data driving signal to the plurality of data lines through the flip chip film; and filling a common voltage signal into the third test pad, so that the common voltage signal is transmitted to the common electrode through the third test pad.

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