CN113479841B - Silicon-based micro-channel substrate preparation method - Google Patents
Silicon-based micro-channel substrate preparation method Download PDFInfo
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- CN113479841B CN113479841B CN202110563714.3A CN202110563714A CN113479841B CN 113479841 B CN113479841 B CN 113479841B CN 202110563714 A CN202110563714 A CN 202110563714A CN 113479841 B CN113479841 B CN 113479841B
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 50
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 49
- 239000010703 silicon Substances 0.000 title claims abstract description 49
- 239000000758 substrate Substances 0.000 title claims abstract description 27
- 238000002360 preparation method Methods 0.000 title claims abstract description 19
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052802 copper Inorganic materials 0.000 claims abstract description 24
- 239000010949 copper Substances 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims abstract description 20
- 239000002184 metal Substances 0.000 claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000000110 cooling liquid Substances 0.000 claims abstract description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 11
- 238000001259 photo etching Methods 0.000 claims abstract description 10
- 238000001312 dry etching Methods 0.000 claims abstract description 6
- 238000005530 etching Methods 0.000 claims abstract description 6
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 238000009713 electroplating Methods 0.000 claims abstract description 5
- BLIQUJLAJXRXSG-UHFFFAOYSA-N 1-benzyl-3-(trifluoromethyl)pyrrolidin-1-ium-3-carboxylate Chemical compound C1C(C(=O)O)(C(F)(F)F)CCN1CC1=CC=CC=C1 BLIQUJLAJXRXSG-UHFFFAOYSA-N 0.000 claims abstract description 4
- 238000005507 spraying Methods 0.000 claims abstract description 4
- 238000001039 wet etching Methods 0.000 claims description 6
- 238000001459 lithography Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 abstract description 17
- 230000017525 heat dissipation Effects 0.000 abstract description 7
- 239000002356 single layer Substances 0.000 abstract description 4
- 238000004377 microelectronic Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 5
- 230000010354 integration Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 239000002210 silicon-based material Substances 0.000 description 3
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000002918 waste heat Substances 0.000 description 1
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
- B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
- B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
- B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
- B01L3/502707—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by the manufacture of the container or its components
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/007—Interconnections between the MEMS and external electrical signals
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0083—Temperature control
- B81B7/009—Maintaining a constant temperature by heating or cooling
- B81B7/0093—Maintaining a constant temperature by heating or cooling by cooling
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00119—Arrangement of basic structures like cavities or channels, e.g. suitable for microfluidic systems
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00301—Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/05—Microfluidics
- B81B2201/058—Microfluidics not provided for in B81B2201/051 - B81B2201/054
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Analytical Chemistry (AREA)
- Dispersion Chemistry (AREA)
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Hematology (AREA)
- Clinical Laboratory Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Weting (AREA)
- Micromachines (AREA)
Abstract
The invention discloses a preparation method of a silicon-based micro-channel substrate, and belongs to the technical field of microelectronics. The preparation method of the substrate comprises the following steps: step 1, photoetching and dry etching a silicon surface to form a plurality of parallel grooves, and removing surface photoresist; step 2, depositing a metal adhesion layer and a copper seed layer on the surface, spraying photoresist, photoetching, and corroding the metal adhesion layer and the copper seed layer at the bottom of the groove by a wet method; step 3, etching the parallel micro-channels by adopting a xenon difluoride dry method to remove the photoresist; step 4, electroplating copper to fill the groove, and finishing surface electroplating metal copper planarization; and 5, etching the copper metal and the metal adhesion layer through a surface photoetching cooling liquid interface, forming the cooling liquid interface through dry etching of silicon, communicating parallel micro-channels, removing surface photoresist, and finishing the preparation of the substrate. The invention realizes the preparation of the single-layer silicon wafer micro-channel structure by a simpler process and lower cost, and effectively solves the heat dissipation problem of the electronic module and the system.
Description
Technical Field
The invention relates to a preparation method of a silicon-based micro-channel substrate, and belongs to the technical field of microelectronics.
Background
Because of the improvement of chip integration, electronic modules and systems are developed in the direction of high power and high heat flux, and higher requirements are put on microelectronic heat dissipation technology. The silicon material is used as the semiconductor material which is most widely applied, has higher dielectric constant and smaller electric size compared with other integrated substrate materials, has smaller size of the same structure under the same frequency band, and further realizes shorter interconnection length and higher integration density between chips integrated by the silicon-based high-density TSV (through silicon via) vertical interconnection and multilayer wiring structure. Meanwhile, the silicon material has good heterogeneous integration characteristics, so that high fusion of different semiconductor material chips and other material substrates can be realized, and richer system functional characteristics can be realized. In addition, the silicon material has higher thermal conductivity, and has material characteristics such as thermal expansion coefficient, young's modulus and the like which are closer to those of the compound chip, thus being a good semiconductor heat dissipation material.
With the development of micro-nano processing technology, the silicon substrate micro-channel and micro-nano complex structure take away the waste heat of the heating chip by utilizing the liquid working medium with high heat capacity, so that the micro-nano processing technology becomes an effective way for heat dissipation of the high-power chip. Through processing the flow channel with the section height and width of only tens to hundreds of micrometers on the silicon substrate by photoetching and etching methods, and then utilizing the fluid to timely take away heat when flowing through the micro flow channels. The three-dimensional integrated substrate based on the bulk silicon process can solve the problem of heat management of a high-power radio frequency front-end module of a silicon structure device such as a bulk acoustic wave filter. At present, a micro-channel structure is generally realized by adopting a high aspect ratio etching process and a wafer bonding process in MEMS (micro electro mechanical system) processing technology, the process is complex, the cost is high, and a reliable preparation method of a single-layer silicon wafer micro-channel structure is not formed yet.
Disclosure of Invention
The invention provides a preparation method of a silicon-based micro-channel substrate, which adopts an MEMS processing technology, realizes the preparation of a single-layer silicon wafer micro-channel structure with a simpler process and lower cost, and effectively solves the heat dissipation problem of electronic modules and systems. Can be used for heat dissipation of high-power chips.
The invention adopts the following technical scheme for solving the technical problems:
the preparation method of the silicon-based micro-channel substrate provided by the invention comprises the following steps:
Step 1: photoetching and dry etching are carried out on the surface of silicon to form parallel grooves;
step 2: depositing a metal adhesion layer and a copper seed layer on the surface of silicon, and carrying out photoresist spraying lithography and wet etching on the adhesion layer and the copper seed layer which are positioned at the bottom of the parallel grooves;
Step 3: etching a parallel micro-channel below the parallel groove by adopting a xenon difluoride dry method;
Step 4: filling parallel grooves by electroplating copper, covering the silicon surface, thereby closing the micro-channel structure and completing the planarization of the surface electroplated metal copper;
step 5: and photoetching a cooling liquid interface on the surface of the silicon, and corroding the cooling liquid interface by a wet method so as to communicate with the parallel micro-channels and finish the preparation of the substrate.
Further, the width of the parallel grooves in the step1 ranges from 10 μm to 30 μm, and the depth-to-width ratio of the parallel grooves is larger than 1.
Further, the width of the metal adhesion layer and the copper seed layer at the bottom of the wet etching groove in the step 2 is smaller than the width of the groove.
Further, the diameter of the parallel micro-channels in the step 3 is smaller than the distance between the parallel grooves in the step1.
Further, the radius of the parallel micro-channels in the step 3 is more than 20 μm smaller than the depth of the parallel grooves in the step 1.
Further, the depth of the cooling liquid interface in the step 5 is greater than or equal to the depth of the parallel micro-channels.
Further, the cooling liquid interface in the step 5 is communicated with the parallel micro-channels in the step 3.
The beneficial effects of the invention are as follows:
1) The preparation method of the silicon-based micro-channel substrate is compatible with the silicon-based copper TSV interconnection process, and can be widely applied to integration of electronic modules and systems.
2) The preparation method of the silicon-based micro-channel substrate adopts copper as a material between the chip and the cooling liquid working medium, so that the heat dissipation characteristic of the silicon substrate is further improved.
3) Compared with the common wafer bonding process, the preparation method of the silicon-based micro-channel substrate adopts a single-layer silicon wafer for processing, and has the advantages of simple process and lower processing cost.
Drawings
Fig. 1 is a top view of a silicon-based fluidic channel substrate.
FIG. 2 is a cross-sectional view of FIG. 1 A-A' of a silicon-based microchannel substrate.
FIG. 3 is a cross-sectional view of FIG. 1B-B' of a silicon-based microchannel substrate.
Wherein: 1. silicon; 2. a groove; 3. a copper seed layer; 4. a microchannel; 5. copper metal; 6. and a cooling liquid interface.
Detailed Description
The invention will be described in further detail with reference to the accompanying drawings.
The invention provides a preparation method of a silicon-based micro-channel substrate, which comprises the following steps of:
fig. 1-3 are block diagrams of a silicon-based micro-fluidic channel substrate, and the preparation method of the silicon substrate comprises the following steps:
1) Photoetching a pattern of parallel grooves 2 on the surface of silicon 1, wherein the width range of the grooves 2 is 10-30 mu m;
2) Forming a plurality of parallel grooves 2 by adopting inductively coupled plasma dry etching silicon, wherein the depth-to-width ratio of the grooves 2 is larger than 1;
3) Removing photoresist on the surface of the silicon 1;
4) Depositing a metal adhesion layer and a copper seed layer 3 on the surface of the silicon 1 by sputtering or evaporation;
5) Spraying photoresist on the surface of the silicon 1, wherein the photoresist covers the side wall of the groove 2, the bottom of the groove 2 is exposed, and the exposed width of the bottom of the groove 2 is smaller than the width of the groove 2;
6) Wet etching the metal adhesion layer and the copper seed layer 3 at the bottom of the trench 2;
7) Adopting xenon difluoride dry method to etch parallel micro-channels 4, wherein the diameter of the micro-channels 4 is smaller than the distance between the grooves 2, and the radius of the micro-channels 4 is more than 20 mu m smaller than the depth of the grooves 2;
8) Removing photoresist on the surface of the silicon 1 and in the groove 2;
9) Depositing metallic copper on the surface of the silicon 1 and in the groove 2 by adopting an electroplating process, and sealing the parallel micro-channels 4;
10 Adopting a mechanical grinding process to finish the planarization of the surface electroplated metal copper 5;
11 Patterning the surface of the silicon 1 by photoetching to form a cooling liquid interface 6;
12 Wet etching the copper metal and metal adhesion layer of the coolant interface 6;
13 Forming a cooling liquid interface 6 by adopting inductively coupled plasma dry etching silicon, wherein the depth of the cooling liquid interface 6 is greater than or equal to the depth of the micro-channel 4, so that the parallel micro-channel 4 is communicated;
14 The photoresist on the surface of the silicon 1 is removed.
Claims (2)
1. The preparation method of the silicon-based micro-channel substrate is characterized by comprising the following steps of:
Step 1: photoetching and dry etching are carried out on the surface of silicon to form parallel grooves;
Step 2: depositing a metal adhesion layer and a copper seed layer on the surface of silicon, and carrying out photoresist spraying lithography and wet etching on the metal adhesion layer and the copper seed layer which are positioned at the bottom of the parallel grooves;
Step 3: etching a parallel micro-channel below the parallel groove by adopting a xenon difluoride dry method;
Step 4: filling parallel grooves by electroplating copper, covering the silicon surface, thereby closing the micro-channel structure and completing the planarization of the surface electroplated metal copper;
Step 5: forming a cooling liquid interface on the silicon surface by photoetching, and corroding the cooling liquid interface by a wet method so as to communicate with the parallel micro-channels and finish the preparation of the substrate;
The widths of the metal adhesion layer and the copper seed layer at the bottom of the wet etching groove in the step2 are smaller than the width of the groove;
The diameter of the parallel micro-channels in the step 3 is smaller than the distance between the parallel grooves in the step 1;
the radius of the parallel micro-channels in the step 3 is more than 20 mu m smaller than the depth of the parallel grooves in the step 1;
And the depth of the cooling liquid interface in the step 5 is greater than or equal to the depth of the parallel micro-channels.
2. The method for preparing a silicon-based micro-fluidic channel substrate according to claim 1, wherein the width of the parallel grooves in the step 1 ranges from 10 μm to 30 μm, and the depth-to-width ratio of the parallel grooves is greater than 1.
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