CN113479841A - Preparation method of silicon-based micro-channel substrate - Google Patents
Preparation method of silicon-based micro-channel substrate Download PDFInfo
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- CN113479841A CN113479841A CN202110563714.3A CN202110563714A CN113479841A CN 113479841 A CN113479841 A CN 113479841A CN 202110563714 A CN202110563714 A CN 202110563714A CN 113479841 A CN113479841 A CN 113479841A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 49
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 49
- 239000010703 silicon Substances 0.000 title claims abstract description 49
- 239000000758 substrate Substances 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 30
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052802 copper Inorganic materials 0.000 claims abstract description 24
- 239000010949 copper Substances 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 20
- 239000000110 cooling liquid Substances 0.000 claims abstract description 15
- 238000001259 photo etching Methods 0.000 claims abstract description 13
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 238000001312 dry etching Methods 0.000 claims abstract description 5
- BLIQUJLAJXRXSG-UHFFFAOYSA-N 1-benzyl-3-(trifluoromethyl)pyrrolidin-1-ium-3-carboxylate Chemical compound C1C(C(=O)O)(C(F)(F)F)CCN1CC1=CC=CC=C1 BLIQUJLAJXRXSG-UHFFFAOYSA-N 0.000 claims abstract description 4
- 238000005507 spraying Methods 0.000 claims abstract description 4
- 238000001039 wet etching Methods 0.000 claims description 3
- 239000002826 coolant Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 abstract description 17
- 230000017525 heat dissipation Effects 0.000 abstract description 6
- 239000002356 single layer Substances 0.000 abstract description 4
- 238000004377 microelectronic Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 7
- 230000010354 integration Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 239000002210 silicon-based material Substances 0.000 description 3
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000002918 waste heat Substances 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
- B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
- B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
- B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
- B01L3/502707—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by the manufacture of the container or its components
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/007—Interconnections between the MEMS and external electrical signals
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0083—Temperature control
- B81B7/009—Maintaining a constant temperature by heating or cooling
- B81B7/0093—Maintaining a constant temperature by heating or cooling by cooling
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00119—Arrangement of basic structures like cavities or channels, e.g. suitable for microfluidic systems
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00301—Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/05—Microfluidics
- B81B2201/058—Microfluidics not provided for in B81B2201/051 - B81B2201/054
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Analytical Chemistry (AREA)
- Dispersion Chemistry (AREA)
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Hematology (AREA)
- Clinical Laboratory Science (AREA)
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Abstract
The invention discloses a preparation method of a silicon-based micro-channel substrate, belonging to the technical field of microelectronics. The substrate preparation method comprises the following steps: step 1, photoetching and dry etching are carried out on a silicon surface to form a plurality of parallel grooves, and the surface photoresist is removed; step 2, depositing a metal adhesion layer and a copper seed layer on the surface, spraying photoresist for photoetching, and corroding the metal adhesion layer and the copper seed layer at the bottom of the groove by a wet method; step 3, etching the parallel micro-channels by using a xenon difluoride dry method to remove the photoresist; step 4, filling the groove with electroplated copper, and finishing the surface electroplated metal copper planarization; and 5, photoetching a cooling liquid interface on the surface, corroding the copper metal and the metal adhesion layer, etching the silicon by a dry method to form the cooling liquid interface, communicating the cooling liquid interface with the parallel micro-channel, and removing the photoresist on the surface to finish the preparation of the substrate. The invention realizes the preparation of the single-layer silicon chip micro-channel structure by a simpler process and lower cost, and effectively solves the heat dissipation problem of an electronic module and a system.
Description
Technical Field
The invention relates to a preparation method of a silicon-based micro-channel substrate, belonging to the technical field of microelectronics.
Background
Due to the improvement of the integration level of the chip, the electronic module and the system develop towards the direction of high power and high heat flux density, and higher requirements are put forward on the microelectronic heat dissipation technology. The silicon material is used as the most widely applied semiconductor material, has higher dielectric constant and smaller electrical size compared with other integrated substrate materials, has smaller size of the same structure under the same frequency band, and further realizes shorter interconnection length and higher integration density between the integrated chips of the silicon adapter plate through the vertical interconnection of the silicon-based high-density TSV (through silicon via) and the multilayer wiring structure. Meanwhile, the silicon material has good heterogeneous integration characteristics, can realize high integration of different semiconductor material chips and other material substrates, and realizes richer system functional characteristics. In addition, the silicon material has high thermal conductivity, and material characteristics such as thermal expansion coefficient and young's modulus closer to those of the compound chip, and is a good semiconductor heat dissipation material.
With the development of micro-nano processing technology, the silicon substrate micro-channel and the micro-nano complex structure take away the waste heat of the heating chip by using a high-heat-capacity liquid working medium, so that an effective way for radiating the high-power chip is provided. The flow channels with the cross section height and width of only dozens to hundreds of micrometers are processed on the silicon substrate by photoetching and etching methods, and then the fluid flows through the micro flow channels to take away heat in time. The three-dimensional integrated substrate based on the bulk silicon process can solve the problem of thermal management of high-power radio frequency front-end modules of bulk silicon structural devices such as bulk acoustic wave filters. At present, a micro-channel structure is generally realized by a high depth-to-width ratio etching process and a wafer bonding process in an MEMS (micro electro mechanical system) processing technology, the process is complex, the cost is high, and a reliable preparation method of a single-layer silicon chip micro-channel structure is not formed.
Disclosure of Invention
The invention provides a preparation method of a silicon-based micro-channel substrate, which adopts an MEMS processing technology, realizes the preparation of a single-layer silicon chip micro-channel structure by a simpler process and lower cost, and effectively solves the heat dissipation problem of an electronic module and a system. The method can be used for heat dissipation of high-power chips.
The invention adopts the following technical scheme for solving the technical problems:
the invention provides a preparation method of a silicon-based micro-channel substrate, which comprises the following steps:
step 1: photoetching and dry etching are carried out on the silicon surface to form parallel grooves;
step 2: depositing a metal adhesion layer and a copper seed layer on the surface of the silicon, and carrying out photoresist spraying, photoetching and wet etching on the metal adhesion layer and the copper seed layer which are positioned at the bottom of the parallel grooves;
and step 3: etching parallel micro-channels below the parallel grooves by using a xenon difluoride dry method;
and 4, step 4: filling the parallel grooves with electroplated copper and covering the silicon surface so as to seal the micro-channel structure and finish the surface electroplated metal copper planarization;
and 5: and photoetching the silicon surface to form a cooling liquid interface, and corroding the cooling liquid interface by a wet method so as to communicate with the parallel micro-channels and finish the preparation of the substrate.
Further, the width of the parallel trench in the step 1 is in a range of 10-30 μm, and the aspect ratio of the parallel trench is greater than 1.
Further, in the step 2, the widths of the metal adhesion layer at the bottom of the trench and the copper seed layer are smaller than the width of the trench.
Further, the diameter of the parallel micro flow channels in the step 3 is smaller than the distance between the parallel grooves in the step 1.
Furthermore, the radius of the parallel micro-channel in the step 3 is smaller than the depth of the parallel groove in the step 1 by more than 20 μm.
Further, the depth of the cooling liquid interface in the step 5 is greater than or equal to the depth of the parallel micro-channel.
Further, the cooling liquid interface in the step 5 is communicated with the parallel micro flow channel in the step 3.
The invention has the following beneficial effects:
1) the preparation method of the silicon-based micro-channel substrate is compatible with a silicon-based copper TSV interconnection process, and can be widely applied to integration of electronic modules and systems.
2) According to the preparation method of the silicon-based micro-channel substrate, copper is used as a material between the chip and the cooling liquid working medium, so that the heat dissipation characteristic of the silicon substrate is further improved.
3) Compared with the common wafer bonding process preparation method, the preparation method of the silicon-based micro-channel substrate uses single-layer silicon wafer processing, and has the advantages of simple process and lower processing cost.
Drawings
FIG. 1 is a top view of a silicon-based micro flow channel substrate.
FIG. 2 is a cross-sectional view of a silicon-based micro flow channel substrate shown in FIG. 1A-A'.
FIG. 3 is a cross-sectional view of a silicon-based micro flow channel substrate shown in FIG. 1B-B'.
Wherein: 1. silicon; 2. a trench; 3. a copper seed layer; 4. a micro flow channel; 5. copper metal; 6. and a cooling liquid interface.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings.
The invention provides a preparation method of a silicon-based micro-channel substrate, and the specific technical scheme is as follows:
FIGS. 1 to 3 are structural views of a silicon-based micro flow channel substrate prepared by a method comprising the steps of:
1) photoetching a parallel groove 2 pattern on the surface of the silicon 1, wherein the width range of the groove 2 is 10-30 mu m;
2) dry etching silicon by adopting inductively coupled plasma to form a plurality of parallel grooves 2, wherein the depth-to-width ratio of the grooves 2 is more than 1;
3) removing the photoresist on the surface of the silicon 1;
4) depositing a metal adhesion layer and a copper seed layer 3 on the surface of the silicon 1 by sputtering or evaporation;
5) spraying photoresist on the surface of the silicon 1 for photoetching, wherein the photoresist covers the side wall of the groove 2 and exposes the bottom of the groove 2, and the exposed width of the bottom of the groove 2 is smaller than that of the groove 2;
6) corroding the metal adhesion layer and the copper seed layer 3 at the bottom of the groove 2 by a wet method;
7) etching the parallel micro-channels 4 by using a xenon difluoride dry method, wherein the diameter of each micro-channel 4 is smaller than the distance between the grooves 2, and the radius of each micro-channel 4 is smaller than the depth of each groove 2 by more than 20 micrometers;
8) removing the photoresist on the surface of the silicon 1 and in the groove 2;
9) depositing metal copper on the surface of the silicon 1 and in the groove 2 by adopting an electroplating process, and sealing the parallel micro-channel 4;
10) the mechanical grinding process is adopted to finish the planarization of the electroplated metal copper 5 on the surface;
11) photoetching the surface of the silicon 1 to form a cooling liquid interface 6 pattern;
12) corroding a copper metal and a metal adhesion layer at a cooling liquid interface 6 by a wet method;
13) adopting an inductively coupled plasma dry etching method to etch silicon to form a cooling liquid interface 6, wherein the depth of the cooling liquid interface 6 is greater than or equal to that of the micro-channel 4, so as to communicate with the parallel micro-channel 4;
14) and removing the photoresist on the surface of the silicon 1.
Claims (6)
1. A preparation method of a silicon-based micro-channel substrate is characterized by comprising the following steps:
step 1: photoetching and dry etching are carried out on the silicon surface to form parallel grooves;
step 2: depositing a metal adhesion layer and a copper seed layer on the surface of the silicon, and carrying out photoresist spraying, photoetching and wet etching on the metal adhesion layer and the copper seed layer which are positioned at the bottom of the parallel grooves;
and step 3: etching parallel micro-channels below the parallel grooves by using a xenon difluoride dry method;
and 4, step 4: filling the parallel grooves with electroplated copper and covering the silicon surface so as to seal the micro-channel structure and finish the surface electroplated metal copper planarization;
and 5: and photoetching the silicon surface to form a cooling liquid interface, and corroding the cooling liquid interface by a wet method so as to communicate with the parallel micro-channels and finish the preparation of the substrate.
2. The method of claim 1, wherein the width of the parallel grooves in step 1 is in the range of 10 to 30 μm, and the aspect ratio of the parallel grooves is greater than 1.
3. The method of claim 1, wherein the widths of the wet etching trench bottom metal adhesion layer and the copper seed layer in step 2 are smaller than the width of the trench.
4. The method of claim 1, wherein the diameter of the parallel micro flow channels in step 3 is smaller than the pitch of the parallel grooves in step 1.
5. The method of claim 1, wherein the radius of the parallel micro flow channel in step 3 is 20 μm or more smaller than the depth of the parallel channel in step 1.
6. The method of claim 1, wherein the depth of the coolant interface in step 5 is greater than or equal to the depth of the parallel micro flow channels.
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| CN202110563714.3A CN113479841B (en) | 2021-05-24 | 2021-05-24 | Silicon-based micro-channel substrate preparation method |
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| CN202110563714.3A CN113479841B (en) | 2021-05-24 | 2021-05-24 | Silicon-based micro-channel substrate preparation method |
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| CN113479841B CN113479841B (en) | 2024-05-28 |
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2021
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| CN113479841B (en) | 2024-05-28 |
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