CN113467286A - FPGA-based I-V curve generation circuit and method - Google Patents
FPGA-based I-V curve generation circuit and method Download PDFInfo
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Abstract
The invention discloses an I-V curve generating circuit and a method based on an FPGA (field programmable gate array), belonging to the field of solar cell array simulation, wherein the I-V curve generating circuit comprises a voltage programming D/A module, a voltage clamping module, a current programming D/A module, an error detection module, a power regulation module, a power conversion module, a current divider, a current monitoring module, a current measurement A/D module, a voltage monitoring module, a voltage measurement A/D module, the FPGA and a CPU (central processing unit) system; the I-V curve generation method takes the FPGA as a control core and can realize microsecond-level current adjustment recovery time; the system has an SAS working mode, and can generate 256 point pairs of voltmeter data and ammeter data according to parameters and a solar cell index model, and establish an I-V curve; the dichotomy is adopted to realize the quick addressing of the voltmeter, the quick reading and the current programming of the ammeter so as to realize the closed-loop control design of the voltage-controlled current source; by adopting a 64-point discarding type data processing method, the voltage can be rapidly measured and the oscillation of an I-V curve can be prevented.
Description
Technical Field
The invention belongs to the field of solar cell array simulation, and particularly relates to an I-V curve generation circuit and method based on an FPGA.
Background
Solar energy is one of novel clean energy sources with the largest large-scale development potential, the main mode of solar energy utilization is solar photovoltaic power generation, and the key point of high-efficiency solar energy utilization is that a set of high-performance photovoltaic power generation system is provided. Because the output characteristics of the solar cell panel are greatly influenced by environmental factors, research and test by adopting the real solar cell panel cannot be completed under all weather conditions, and related research work is difficult to develop. Therefore, the research of replacing a real solar panel with a device capable of truly reflecting the output characteristics of the solar panel becomes a research content with great attraction and application value, and the device is a solar cell array simulator.
The solar cell array simulator simulates the output characteristics of the solar cell panel by using a circuit, so that the I-V characteristic and the P-V characteristic of the system output are consistent with the characteristics of the actual solar cell panel under the conditions of specific illumination and temperature, and the static characteristics of the solar cell panel and the dynamic characteristics when the illumination or the load is changed are met. At present, solar cell array simulators mainly have an analog type and a digital type.
The analog solar cell array simulator uses a device capable of simulating sunlight, called a solar illumination simulator, as an equivalent solar light source, and simulates the irradiation of sunlight, and the simulated light is irradiated on a solar cell sample to obtain the output characteristic of the solar cell. However, the solar cell array simulator has the following main disadvantages: larger errors exist and become larger and larger over time; the spectrum of the simulated light source has larger deviation with the spectrum of the actual sunlight; the simulated light sources manufactured by different manufacturers have great differences in manufacturing parameters, processes and performances.
A digital solar cell array simulator is characterized in that a power electronic conversion circuit forms a main circuit, a CPU, an FPGA and other control chips are adopted to detect load current and voltage in real time, and the working state of the main circuit is adjusted and controlled in real time through a certain control algorithm, so that the current and the voltage at the output end of the main circuit conform to the output characteristics of an actual solar cell panel. The simulator overcomes the defects of a simulation type solar cell array simulator and simultaneously has the following advantages: wide simulation range, ideal simulation environment change, high reliability and the like.
In order to realize that the output characteristic of the digital solar cell array simulator truly and accurately simulates the output characteristic of the solar cell panel, a new control algorithm needs to be researched, so that the output current and the voltage of the simulator can simulate the output current and voltage change curve, namely an I-V curve, of the solar cell panel under certain environmental conditions. Therefore, a new I-V curve generation circuit and implementation method need to be researched.
Disclosure of Invention
In order to solve the problems, the invention provides an I-V curve generation circuit and method based on an FPGA (field programmable gate array), wherein the FPGA is used as a core to generate an I-V curve.
The technical scheme of the invention is as follows:
an I-V curve generating circuit based on an FPGA comprises a voltage programming D/A module, a voltage clamping module, a current programming D/A module, an error detection module, a power regulation module, a power conversion module, a current divider, a current monitoring module, a current measurement A/D module, a voltage monitoring module, a voltage measurement A/D module, the FPGA and a CPU system;
the voltage programming D/A module is configured to generate a voltage open circuit programming value;
the voltage clamping module is configured to generate a voltage clamping value according to the voltage open-circuit programming value;
the current programming D/A module configured to generate a current programming value;
the error detection module is configured to generate a current error value according to the current programming value and the current monitoring value;
the power adjustment module is configured to generate a power adjustment driving signal according to the current error signal;
the power conversion module is configured to generate an output signal according to the power regulation driving signal;
the current divider is configured to output a current sample and convert a current signal into a voltage signal;
the current monitoring module is configured for processing the current sampling value into a value within the range of the current measurement A/D converter to generate a current monitoring value;
the current measurement A/D module is configured to convert the current monitoring value into a digital quantity and send the digital quantity to the FPGA as a current measurement digital value;
the voltage monitoring module is configured to process the output voltage value into a value within the range of the voltage measurement A/D converter, and generate a voltage monitoring value;
the voltage measurement A/D module is configured to convert the voltage monitoring value into a digital quantity and send the digital quantity to the FPGA as a voltage measurement digital value;
the FPGA is configured to send the voltage measurement digital value and the current measurement digital value to the CPU system and receive the setting data sent by the CPU system; meanwhile, current programming is set according to the voltage measurement digital value;
the CPU system is configured to set data to the FPGA, read voltage measurement digital values and current measurement digital values detected by the FPGA and display the voltage measurement data and the current measurement data in real time.
Preferably, the FPGA receives an open-circuit voltage value sent by the CPU system, and generates a voltage open-circuit programming value through the voltage programming D/a module, as a part of power adjustment, to implement a closed-loop control design of the voltage-controlled current source together.
Preferably, the I-V curve generating circuit is in an SAS working mode, and the CPU system calculates and generates 256 point pairs of voltmeter data and ammeter data according to four parameters of maximum power point voltage, maximum power point current, open-circuit voltage and short-circuit current and a solar cell index model, so that data required by an I-V curve is established; and the CPU system sends the data for establishing the I-V curve to the FPGA, and the I-V curve is generated in the FPGA.
Preferably, 2 sections of dual-port Block RAM storage spaces are opened up in the FPGA, the depth is 256, the width is 16 bits, the dual-port Block RAM storage spaces are respectively used for storing voltmeter data and ammeter data, and the memory read operation and the memory write operation are executed simultaneously.
An I-V curve generation method based on an FPGA adopts the I-V curve generation circuit based on the FPGA, the FPGA is used as a control core, the FPGA carries out data processing on an obtained voltage measurement digital value, a voltmeter RAM is addressed by using the value after the voltage data processing to obtain a voltage address, the voltage address corresponds to a current address, corresponding current data is obtained through the current address, and the read current data is used for carrying out current setting on a current programming D/A module, so that output current regulation is realized, closed-loop control design of a voltage-controlled current source is completed, and I-V curve output of a solar cell panel is accurately simulated.
Preferably, the flow of the design of the voltage-controlled current source closed-loop control is as follows:
s101: performing initialization related operation comprising a current voltage value and an initial current value;
s102: detecting whether an output is on;
if the output is detected to be opened, executing S103;
if the output is not detected to be opened, continuing to execute S102;
s103: setting a current programming initial value, and setting the current programming by taking the short circuit as the initial value;
s104: obtaining an output voltage measurement digital value from a voltage measurement A/D module;
s105: performing data processing on the obtained voltage measurement digital value by adopting a 64-point discarding type data processing method to generate a voltage measurement value;
s106: judging a voltage measurement value;
if the voltage measurement value is equal to the current voltage value, executing S112;
if the voltage measurement value is not equal to the current voltage value, executing S107;
s107: assigning the voltage measured value to the current voltage value;
s108: performing voltmeter addressing according to the current voltage value, and adopting a dichotomy to realize the voltmeter fast addressing to generate a voltage address corresponding to the current voltage value;
s109: assigning the voltage address to the current address;
s110: reading a corresponding current data value in the ammeter according to the current address;
s111: according to the current data value, performing current programming setting on the current programming D/A module, and returning to S104;
s112: the voltage-controlled current source closed-loop control reaches the equilibrium state, and the step returns to S104.
Preferably, in the closed-loop control design of the voltage-controlled current source, the output voltage is measured by a voltage monitoring and voltage measuring a/D module, the FPGA performs data processing on the output voltage measurement digital value as source data of voltmeter data addressing, the voltmeter is rapidly addressed by adopting a dichotomy based on the FPGA, and the specific design flow of the voltage addressing is as follows:
s201: executing initialization related operation comprising a voltage address, a current voltage value, a previous voltage value, a voltage index value, an initial voltage index value and a total voltage index value;
s202: dividing the total voltage index value by 2, assigning the voltage index value to a voltage address, and simultaneously dividing the total voltage index value by 2, assigning the voltage index value;
s203: acquiring a voltage measurement value;
s204: detecting a voltage measurement;
if the result of the determination is that the voltage measurement value is greater than or equal to the current voltage value and is less than the previous voltage value, then executing S207;
if the determination result is that the voltage measurement value is smaller than the current voltage value, or the voltage measurement value is greater than or equal to the previous voltage value, then S205 is executed;
s205: detecting a voltage measured value and a voltage current value;
if the judgment result is that the voltage measurement value is smaller than the current voltage value, executing S206;
if the result of the determination is that the voltage measurement value is smaller than the current voltage value, it indicates that the voltage measurement value is greater than or equal to the current voltage value, and if the result of the determination in S204 is that the voltage measurement value is greater than or equal to the previous voltage value, S209 is executed;
s206: adding 1 to the index value of the detection voltage;
if the judgment result is that the voltage index value is added with 1 and then is equal to the total voltage index value, S207 is executed;
if the judgment result is that the voltage index value is not equal to the total voltage index value after adding 1, executing S208;
s207: assigning the voltage index value to the voltage address, and going to execute S216;
s208: assigning the voltage index value to a voltage index initial value, meanwhile, summing the voltage index value and the voltage index total value, dividing by 2 and assigning to the voltage index value, and turning to execute S214;
s209: dividing the detection voltage index value by 2;
if the judgment result is that the voltage index value is greater than 1 after being divided by 2, executing S210;
if the determination result is that the voltage index value is less than or equal to 1 after dividing by 2, executing S211;
s210: assigning the voltage index value to a total voltage index value, summing the initial voltage index value and the voltage index value, dividing by 2, assigning the sum to the voltage index value, and turning to execute S214;
s211: detecting a voltage measurement value and a voltage previous value;
if the voltage measurement value is equal to the pre-voltage value, performing S212;
if the result is that the voltage measurement value is not equal to the pre-voltage value, executing S213;
s212: adding 1 to the initial voltage index value, assigning the initial voltage index value to a voltage address, and turning to execute S216;
s213: assigning the initial voltage index value to a voltage address, and executing S216;
s214: generating voltage RAM read enable and read clock signals;
s215: and reading the pre-voltage value and the current voltage value in the voltage RAM, and returning to execute S204.
S216: and finishing the voltage addressing to obtain a voltage address, and returning to execute S203.
Preferably, the voltage data processing adopts a 64-point discarding formula, and the design flow is as follows:
s301: executing initialization related operation;
s302: opening up a voltage data array volt _ data with the depth of 64 and the width of 16 bits, wherein the obtained voltage data array volt _ data [ 0-63 ];
s303: obtaining an output voltage measurement digital value from a voltage measurement A/D module;
s304: discarding the highest data volt _ data [63] of the voltage data array;
s305: executing a shift operation of a voltage data array volt _ data, transmitting the volt _ data [62] to the volt _ data [63], transmitting the volt _ data [61] to the volt _ data [62], transmitting the volt _ data [60] to the volt _ data [61], and so on until the volt _ data [0] is transmitted to the volt _ data [1 ];
s306: storing the obtained output voltage measurement digital value into the lowest bit data volt _ data [0] of the voltage data array;
s307: calculating the accumulated sum of all 64 data in the voltage data array;
s308: calculating the average value of the voltage data array accumulated sum to obtain a voltage measurement value;
s309: detecting whether to start the next 1-time voltage measurement;
if the judgment result is that the next voltage measurement 1 time is started, returning to execute S303;
if the determination result is that the next voltage measurement 1 time is not started, executing S310;
s310: the voltage data processing ends, and the process returns to execution S309.
Preferably, the flow of the current programming design is as follows:
s401: executing initialization related operation comprising a current address and a current address;
s402: assigning the voltage address to the current address;
s403: detecting a current address;
if the judgment result is that the current address is equal to the current address, returning to execute S402;
or if the current address is not equal to the current address, executing S404;
s404: assigning the current address to a current address;
s405: generating current RAM read enable and read clock signals;
s406: reading current data corresponding to a current address in an ammeter;
s407: generating a current programming start signal;
s408: performing a current program set operation;
s409: the current programming setting is completed, and execution returns to S402.
The invention has the following beneficial technical effects:
compared with the prior art, the I-V curve generation circuit and the method provided by the invention take the FPGA as a control core, and can realize microsecond-level current adjustment recovery time; the system has an SAS working mode, and can generate 256 point pairs of voltmeter data and ammeter data according to four parameters of maximum power point voltage Vmp, maximum power point current Imp, open-circuit voltage Voc and short-circuit current Isc and a solar cell index model, and establish an I-V curve; 2 sections of dual-port Block RAM storage spaces are opened up in the FPGA and are respectively used for storing voltmeter data and ammeter data, and the reading operation and the writing operation of the memory can be executed simultaneously; the FPGA is used as a control core for generating an I-V curve, the FPGA carries out data processing on a voltage measured value to be used as source data for addressing by voltmeter data, corresponding current data are read from an ammeter according to the addressing result of the voltmeter, and a current programming D/A value is adjusted in real time according to the current data so as to adjust output current and realize the closed-loop control design of a voltage-controlled current source; by adopting a 64-point discarding type data processing method, the good effects of quickly measuring the voltage and preventing the I-V curve from oscillation can be obtained; the core control and the algorithm are all realized in the FPGA, the speed is high, and the portability is high.
Drawings
FIG. 1 is a block diagram of an I-V curve generation circuit of the present invention;
FIG. 2 is a schematic of voltmeter data and ammeter data of the present invention;
FIG. 3 is an I-V curve of the present invention;
FIG. 4 is a flow chart of the design of the voltage controlled current source of the present invention;
FIG. 5 is a flow chart of the voltage addressing design of the present invention;
FIG. 6 is a voltage data processing design flow diagram of the present invention;
FIG. 7 is a flow chart of the current programming design of the present invention.
Detailed Description
The invention is described in further detail below with reference to the following figures and detailed description:
example 1
As shown in fig. 1, an I-V curve generating circuit based on FPGA includes a voltage programming D/a module, a voltage clamping module, a current programming D/a module, an error detecting module, a power adjusting module, a power converting module, a shunt, a current monitoring module, a current measuring a/D module, a voltage monitoring module, a voltage measuring a/D module, FPGA, and a CPU system. The FPGA is used as a control core, the closed-loop control design of the voltage-controlled current source is realized, and the I-V curve output of the solar cell panel is accurately simulated.
The FPGA is used as a control core for realizing the generation of the I-V curve. On one hand, data transmission is realized between the FPGA and the CPU system, a voltage measurement digital value and a current measurement digital value are sent to the CPU system, and meanwhile, the FPGA receives set data sent by the CPU system; on the other hand, in FPGA design, current programming value setting is realized according to output voltage measurement data, and finally closed-loop control design of the voltage-controlled current source is realized.
The voltage monitoring module realizes the monitoring value Vmon of the output voltage, the voltage measurement A/D realizes the analog-to-digital conversion of the voltage monitoring value Vmon, and the voltage measurement A/D is 16 bit. The current monitoring module outputs a current monitoring value Imon through the shunt, the current measurement A/D module realizes analog-to-digital conversion of the current monitoring value Imon, and the current measurement A/D is 16 bit. And the FPGA sends the voltage measurement digital value and the current measurement digital value to the CPU system so as to realize the real-time display of the voltage and current measurement data.
In the design of closed-loop control of the voltage-controlled current source, the FPGA carries out data processing on an obtained voltage measurement digital value, the voltage meter RAM is addressed by using the value after voltage data processing to obtain a voltage address, and corresponding current data are obtained by corresponding to a current address and through the current address. And using the read current data to set the current of the current programming D/A, wherein the current programming D/A is 12 bits, so that in the FPGA design, 16-bit current data needs to be converted into 12-bit data, and the current programming value CC _ Prog can be generated by taking 12 bits higher. And combining the current programming value CC _ Prog and the current monitoring value Imon to realize current Error detection and generate a current Error value Error. And the FPGA sets the voltage of the voltage programming D/A according to the open-circuit voltage Voc, and the voltage programming D/A is 12 bits, so that in the FPGA design, 16-bit open-circuit voltage data needs to be converted into 12-bit data, and the voltage programming value CV _ Prog can be generated by taking 12 bits higher. And the power regulation is realized jointly by combining the voltage programming value CV _ Prog and the current Error value Error under the action of voltage clamping, and finally the output current regulation is realized through power conversion, so that the closed-loop control design of the voltage-controlled current source is completed.
As shown in fig. 2, the I-V curve generation circuit of the present invention has an SAS operating mode, and in a CPU system, 256 points are calculated and generated for voltmeter data and ammeter data according to four parameters of a maximum power point voltage Vmp, a maximum power point current Imp, an open circuit voltage Voc, and a short circuit current Isc, and a solar cell index model, and the widths of the voltmeter data and the ammeter data are both 16 bits, thereby establishing data required for an I-V curve. The voltmeter data and the ammeter data are arranged according to the trend from open circuit to short circuit, the obtained voltmeter data are arranged according to the size, the ammeter data are arranged according to the size, the address of the voltmeter is equal to the address of the ammeter, and therefore the voltmeter data and the ammeter data are in one-to-one correspondence.
In the SAS operating mode, a maximum power point voltage Vmp is 140V, a maximum power point current Imp is 1A, an open-circuit voltage Voc is 170V, and a short-circuit current Isc is 1.2A. Since invalid data may exist at the end of the table in the 256-point pair voltmeter and ammeter data, all data are invalid data after the judgment basis is that the short circuit point is the short circuit point, and an I-V curve can be established by combining the voltmeter valid data and the ammeter valid data, as shown in FIG. 3.
In the CPU system, in order to reduce the data transmission quantity between the CPU system and the FPGA, the data sent to the FPGA comprises the following data: the FPGA receives data issued by the CPU system, and realizes I-V curve generation.
Example 2
On the basis of the circuit, the invention also provides an I-V curve generation method based on the FPGA, in particular to a closed-loop control design of a voltage-controlled current source.
In the design of closed-loop control of the voltage-controlled current source, the FPGA carries out data processing on an obtained voltage measurement digital value, the voltage meter RAM is addressed by using the value after voltage data processing to obtain a voltage address, and corresponding current data are obtained by corresponding to a current address and through the current address. And setting the current of the current programming D/A by using the read current data so as to realize output current regulation and complete the closed-loop control design of the voltage-controlled current source.
The design flow of the closed-loop control of the voltage-controlled current source is shown in fig. 4, and the specific steps are as follows:
step 1: performing initialization-related operations comprising: current value of voltage, initial value of current, etc.;
step 2: detecting whether an output is on;
if: if the output is detected to be opened, executing the step 3;
or the output is not detected to be opened, and the step 2 is continuously executed;
and step 3: setting a current programming initial value, and performing current programming setting by taking the short circuit Isc as an initial value;
and 4, step 4: obtaining an output voltage measurement digital value from the voltage measurement A/D;
and 5: performing data processing on the obtained voltage measurement digital value by adopting a 64-point discarding type data processing method to generate a voltage measurement value;
step 6: judging a voltage measurement value;
if: if the voltage measurement value is equal to the current voltage value, executing step 12;
or the voltage measured value is not equal to the current voltage value, executing step 7;
and 7: assigning the voltage measured value to the current voltage value;
and 8: performing voltmeter addressing according to the current voltage value, and adopting a dichotomy to realize the voltmeter fast addressing to generate a voltage address corresponding to the current voltage value;
and step 9: assigning the voltage address to the current address;
step 10: reading a corresponding current data value in the ammeter according to the current address;
step 11: according to the current data value, performing current programming setting on the current programming D/A, and returning to the step 4;
step 12: and (4) controlling the closed loop of the voltage-controlled current source to reach a balanced state, and returning to the step (4).
The following describes in detail the addressing method of the voltmeter, the voltage data processing method, and the current programming design method involved in the design of the closed-loop control of the voltage-controlled current source.
1. Voltmeter addressing method
In the design of closed-loop control of a voltage-controlled current source, the voltage table addressing method based on the FPGA is provided, and a voltage table address corresponding to a voltage measurement value is found in a voltage table according to the voltage measurement value. The invention adopts the dichotomy design idea and can realize the quick addressing of the voltmeter.
The addressing design flow of the voltage meter based on the FPGA is shown in FIG. 5, and specifically comprises the following steps:
step 1: performing initialization-related operations comprising: a voltage address volt _ addr, a current voltage value volt _ data _ now, a previous voltage value volt _ data _ pre, a voltage index value index, a voltage index initial value index _ init, a total voltage index value index _ total, and the like;
step 2: assigning the voltage index total value index _ total/2 to a voltage address volt _ addr, and assigning the voltage index total value index _ total/2 to a voltage index value index;
and step 3: acquiring a voltage measurement value volt _ data;
and 4, step 4: detecting a voltage measurement value volt _ data;
if: if the voltage measurement value volt _ data is greater than or equal to the current voltage value volt _ data _ now and the voltage measurement value volt _ data is smaller than the previous voltage value volt _ data _ pre, executing step 7;
or if the voltage measurement value volt _ data is smaller than the current voltage value volt _ data _ now or the voltage measurement value volt _ data is larger than or equal to the previous voltage value volt _ data _ pre, executing the step 5;
and 5: detecting a voltage measured value volt _ data and a current voltage value volt _ data _ now;
if: if the judgment result is that the voltage measured value volt _ data is smaller than the current voltage value volt _ data _ now, executing step 6;
or if the judgment result is that the voltage measurement value volt _ data is smaller than the current voltage value volt _ data _ now, the voltage measurement value volt _ data is greater than or equal to the current voltage value volt _ data _ now, and if the judgment result in the step 4 is combined, the voltage measurement value volt _ data is greater than or equal to the previous voltage value volt _ data _ pre, the step 9 is executed;
step 6: detecting a voltage index value index + 1;
if: if the judgment result is that the voltage index value (index +1) is equal to the voltage index total value index _ total, executing step 7;
or if the judgment result is that the voltage index value (index +1) is not equal to the voltage index total value index _ total, executing step 8;
and 7: assigning the voltage index value index to the voltage address volt _ addr, and turning to execute the step 16;
and 8: assigning the voltage index value index to a voltage index initial value index _ init, assigning (index + index _ total)/2 to the voltage index value index, and turning to the step 14;
and step 9: detecting a voltage index value index/2;
if: if the judgment result is that the voltage index value (index/2) is greater than 1, executing step 10;
or if the judgment result is that the voltage index value (index/2) is less than or equal to 1, executing step 11;
step 10: assigning the voltage index value index to a voltage index total value index _ total, assigning (index _ init + index)/2 to the voltage index value index, and turning to the step 14;
step 11: detecting a voltage measurement value volt _ data and a voltage previous value volt _ data _ pre;
if: if the voltage measurement value volt _ data is equal to the pre-voltage value volt _ data _ pre, executing step 12;
or if the voltage measurement value volt _ data is not equal to the pre-voltage value volt _ data _ pre, executing step 13;
step 12: assigning the initial voltage index value index _ init +1 to the voltage address volt _ addr, and turning to execute the step 16;
step 13: assigning the initial voltage index value index _ init to the voltage address volt _ addr, and turning to the step 16;
step 14: generating voltage RAM read enable and read clock signals;
step 15: and reading a voltage value corresponding to the voltage index value index-1 in the voltage RAM, namely a voltage previous value volt _ data _ pre, reading a voltage value corresponding to the voltage index value index in the voltage RAM, namely a voltage current value volt _ data _ now, and returning to execute the step 4.
Step 16: and (5) finishing the voltage addressing to obtain a voltage address volt _ addr, and returning to execute the step 3.
2. Voltage data processing method
In the design of voltage-controlled current source closed-loop control, the FPGA acquires an output voltage measurement digital value from a voltage measurement A/D, and addresses a voltmeter RAM by using the value after voltage data processing so as to realize voltage addressing. The invention adopts a 64-point discarding type data processing method, and can obtain the good effects of quickly measuring the voltage and preventing the I-V curve from oscillation.
The voltage data processing design flow based on the FPGA is shown in fig. 6, and specifically includes the following steps:
step 1: executing initialization related operation;
step 2: opening up a voltage data array volt _ data with the depth of 64 and the width of 16 bits, wherein the obtained voltage data array volt _ data [ 0-63 ];
and step 3: obtaining an output voltage measurement digital value from the voltage measurement A/D;
and 4, step 4: discarding the highest data volt _ data [63] of the voltage data array;
and 5: executing a shift operation of a voltage data array volt _ data, transmitting the volt _ data [62] to the volt _ data [63], transmitting the volt _ data [61] to the volt _ data [62], transmitting the volt _ data [60] to the volt _ data [61], and so on until the volt _ data [0] is transmitted to the volt _ data [1 ];
step 6: storing the obtained output voltage measurement digital value into the lowest bit data volt _ data [0] of the voltage data array;
and 7: calculating the accumulated sum of all 64 data in the voltage data array;
and 8: calculating the average value of the voltage data array accumulated sum to obtain a voltage measurement value;
and step 9: detecting whether to start the next 1-time voltage measurement;
if: if the judgment result is that the next voltage measurement 1 time is started, returning to execute the step 3;
or if the judgment result is that the next voltage measurement 1 time is not started, executing the step 10;
step 10: and the voltage data processing is finished, and the step 9 is returned to be executed.
3. Current programming design method
In the design of voltage-controlled current source closed-loop control, a current programming design method based on FPGA is disclosed, which obtains the corresponding current address according to the voltage addressing result, quickly reads the corresponding current data in the ammeter and realizes the D/A setting of current programming.
The current programming design flow based on the FPGA is shown in fig. 7, and specifically includes the following steps:
step 1: performing initialization-related operations comprising: a current address curr _ addr, a current address curr _ addr _ now, and the like;
step 2: assigning the voltage address volt _ addr to the current address curr _ addr;
and step 3: detecting a current address curr _ addr;
if: if the current address curr _ addr is equal to the current address curr _ addr _ now, the step 2 is returned to;
or if the current address curr _ addr is not equal to the current address curr _ addr _ now, executing the step 4;
and 4, step 4: assigning the current address curr _ addr to the current address curr _ addr _ now;
and 5: generating current RAM read enable and read clock signals;
step 6: reading current data corresponding to a current address curr _ addr _ now in the ammeter;
and 7: generating a current programming start signal;
and 8: a current programming set-up operation is performed,
and step 9: and finishing the current programming setting and returning to execute the step 2.
The I-V curve generation circuit takes the FPGA as a control core, and can realize microsecond-level current adjustment recovery time; the system has an SAS working mode, and can generate 256 point pairs of voltmeter data and ammeter data according to four parameters of maximum power point voltage Vmp, maximum power point current Imp, open-circuit voltage Voc and short-circuit current Isc and a solar cell index model, and establish an I-V curve; 2 sections of dual-port Block RAM storage spaces are opened up in the FPGA and are respectively used for storing voltmeter data and ammeter data, and the reading operation and the writing operation of the memory can be executed simultaneously. In the I-V curve generation method, an FPGA is used as a control core for I-V curve generation, and a bisection method is adopted to realize the quick addressing of a voltmeter, the quick reading and current programming of an ammeter and the closed-loop control design of a voltage-controlled current source; by adopting a 64-point discarding type data processing method, the good effects of quickly measuring the voltage and preventing the I-V curve from oscillation can be obtained; the core control and the algorithm are all realized in the FPGA, the speed is high, and the portability is high.
It is to be understood that the above description is not intended to limit the present invention, and the present invention is not limited to the above examples, and those skilled in the art may make modifications, alterations, additions or substitutions within the spirit and scope of the present invention.
Claims (9)
1. An I-V curve generating circuit based on an FPGA is characterized by comprising a voltage programming D/A module, a voltage clamping module, a current programming D/A module, an error detection module, a power regulation module, a power conversion module, a current divider, a current monitoring module, a current measurement A/D module, a voltage monitoring module, a voltage measurement A/D module, the FPGA and a CPU system;
the voltage programming D/A module is configured to generate a voltage open circuit programming value;
the voltage clamping module is configured to generate a voltage clamping value according to the voltage open-circuit programming value;
the current programming D/A module configured to generate a current programming value;
the error detection module is configured to generate a current error value according to the current programming value and the current monitoring value;
the power adjustment module is configured to generate a power adjustment driving signal according to the current error signal;
the power conversion module is configured to generate an output signal according to the power regulation driving signal;
the current divider is configured to output a current sample and convert a current signal into a voltage signal;
the current monitoring module is configured for processing the current sampling value into a value within the range of the current measurement A/D converter to generate a current monitoring value;
the current measurement A/D module is configured to convert the current monitoring value into a digital quantity and send the digital quantity to the FPGA as a current measurement digital value;
the voltage monitoring module is configured to process the output voltage value into a value within the range of the voltage measurement A/D converter, and generate a voltage monitoring value;
the voltage measurement A/D module is configured to convert the voltage monitoring value into a digital quantity and send the digital quantity to the FPGA as a voltage measurement digital value;
the FPGA is configured to send the voltage measurement digital value and the current measurement digital value to the CPU system and receive the setting data sent by the CPU system; meanwhile, current programming is set according to the voltage measurement digital value;
the CPU system is configured to set data to the FPGA, read voltage measurement digital values and current measurement digital values detected by the FPGA and display the voltage measurement data and the current measurement data in real time.
2. The FPGA-based I-V curve generation circuit of claim 1, wherein the FPGA receives an open-circuit voltage value sent by the CPU system, and the voltage open-circuit programming value is generated by a voltage programming D/A module as a part of power regulation to jointly realize the closed-loop control design of the voltage-controlled current source.
3. The FPGA-based I-V curve generation circuit of claim 1, wherein the I-V curve generation circuit is in an SAS working mode, and a CPU system generates 256-point pairs of voltmeter data and ammeter data by calculation according to four parameters of maximum power point voltage, maximum power point current, open-circuit voltage and short-circuit current and a solar cell index model, so as to establish data required by an I-V curve; and the CPU system sends the data for establishing the I-V curve to the FPGA, and the I-V curve is generated in the FPGA.
4. The FPGA-based I-V curve generation circuit as recited in claim 1, wherein 2 sections of dual-port Block RAM storage space with a depth of 256 and a width of 16 bits are opened up in the FPGA and are respectively used for storing voltmeter data and ammeter data, and memory read operation and write operation are simultaneously executed.
5. An FPGA-based I-V curve generation method is characterized in that the FPGA is used as a control core, the FPGA carries out data processing on an obtained voltage measurement digital value, a voltmeter RAM is addressed by using the value after voltage data processing to obtain a voltage address, the voltage address corresponds to a current address, corresponding current data is obtained through the current address, and a current programming D/A module is set by using the read current data, so that output current regulation is realized, closed-loop control design of a voltage-controlled current source is completed, and I-V curve output of a solar cell panel is accurately simulated.
6. The FPGA-based I-V curve generation method of claim 5, wherein the flow of the voltage-controlled current source closed-loop control design is as follows:
s101: performing initialization related operation comprising a current voltage value and an initial current value;
s102: detecting whether an output is on;
if the output is detected to be opened, executing S103;
if the output is not detected to be opened, continuing to execute S102;
s103: setting a current programming initial value, and setting the current programming by taking the short circuit as the initial value;
s104: obtaining an output voltage measurement digital value from a voltage measurement A/D module;
s105: performing data processing on the obtained voltage measurement digital value by adopting a 64-point discarding type data processing method to generate a voltage measurement value;
s106: judging a voltage measurement value;
if the voltage measurement value is equal to the current voltage value, executing S112;
if the voltage measurement value is not equal to the current voltage value, executing S107;
s107: assigning the voltage measured value to the current voltage value;
s108: performing voltmeter addressing according to the current voltage value, and adopting a dichotomy to realize the voltmeter fast addressing to generate a voltage address corresponding to the current voltage value;
s109: assigning the voltage address to the current address;
s110: reading a corresponding current data value in the ammeter according to the current address;
s111: according to the current data value, performing current programming setting on the current programming D/A module, and returning to S104;
s112: the voltage-controlled current source closed-loop control reaches the equilibrium state, and the step returns to S104.
7. The FPGA-based I-V curve generation method of claim 5, wherein in the closed-loop control design of the voltage-controlled current source, the output voltage is measured by a voltage monitoring and voltage measuring A/D module, the FPGA performs data processing on the output voltage measurement digital value as source data for voltmeter data addressing, the FPGA-based dichotomy is adopted to realize voltmeter fast addressing, and the specific design flow of the voltage addressing is as follows:
s201: executing initialization related operation comprising a voltage address, a current voltage value, a previous voltage value, a voltage index value, an initial voltage index value and a total voltage index value;
s202: dividing the total voltage index value by 2, assigning the voltage index value to a voltage address, and simultaneously dividing the total voltage index value by 2, assigning the voltage index value;
s203: acquiring a voltage measurement value;
s204: detecting a voltage measurement;
if the result of the determination is that the voltage measurement value is greater than or equal to the current voltage value and is less than the previous voltage value, then executing S207;
if the determination result is that the voltage measurement value is smaller than the current voltage value, or the voltage measurement value is greater than or equal to the previous voltage value, then S205 is executed;
s205: detecting a voltage measured value and a voltage current value;
if the judgment result is that the voltage measurement value is smaller than the current voltage value, executing S206;
if the result of the determination is that the voltage measurement value is smaller than the current voltage value, it indicates that the voltage measurement value is greater than or equal to the current voltage value, and if the result of the determination in S204 is that the voltage measurement value is greater than or equal to the previous voltage value, S209 is executed;
s206: adding 1 to the index value of the detection voltage;
if the judgment result is that the voltage index value is added with 1 and then is equal to the total voltage index value, S207 is executed;
if the judgment result is that the voltage index value is not equal to the total voltage index value after adding 1, executing S208;
s207: assigning the voltage index value to the voltage address, and going to execute S216;
s208: assigning the voltage index value to a voltage index initial value, meanwhile, summing the voltage index value and the voltage index total value, dividing by 2 and assigning to the voltage index value, and turning to execute S214;
s209: dividing the detection voltage index value by 2;
if the judgment result is that the voltage index value is greater than 1 after being divided by 2, executing S210;
if the determination result is that the voltage index value is less than or equal to 1 after dividing by 2, executing S211;
s210: assigning the voltage index value to a total voltage index value, summing the initial voltage index value and the voltage index value, dividing by 2, assigning the sum to the voltage index value, and turning to execute S214;
s211: detecting a voltage measurement value and a voltage previous value;
if the voltage measurement value is equal to the pre-voltage value, performing S212;
if the result is that the voltage measurement value is not equal to the pre-voltage value, executing S213;
s212: adding 1 to the initial voltage index value, assigning the initial voltage index value to a voltage address, and turning to execute S216;
s213: assigning the initial voltage index value to a voltage address, and executing S216;
s214: generating voltage RAM read enable and read clock signals;
s215: and reading the pre-voltage value and the current voltage value in the voltage RAM, and returning to execute S204.
S216: and finishing the voltage addressing to obtain a voltage address, and returning to execute S203.
8. The FPGA-based I-V curve generation method of claim 5, wherein the voltage data processing adopts a 64-point discarding formula, and the design flow is as follows:
s301: executing initialization related operation;
s302: opening up a voltage data array volt _ data with the depth of 64 and the width of 16 bits, wherein the obtained voltage data array volt _ data [ 0-63 ];
s303: obtaining an output voltage measurement digital value from a voltage measurement A/D module;
s304: discarding the highest data volt _ data [63] of the voltage data array;
s305: executing a shift operation of a voltage data array volt _ data, transmitting the volt _ data [62] to the volt _ data [63], transmitting the volt _ data [61] to the volt _ data [62], transmitting the volt _ data [60] to the volt _ data [61], and so on until the volt _ data [0] is transmitted to the volt _ data [1 ];
s306: storing the obtained output voltage measurement digital value into the lowest bit data volt _ data [0] of the voltage data array;
s307: calculating the accumulated sum of all 64 data in the voltage data array;
s308: calculating the average value of the voltage data array accumulated sum to obtain a voltage measurement value;
s309: detecting whether to start the next 1-time voltage measurement;
if the judgment result is that the next voltage measurement 1 time is started, returning to execute S303;
if the determination result is that the next voltage measurement 1 time is not started, executing S310;
s310: the voltage data processing ends, and the process returns to execution S309.
9. The FPGA-based I-V curve generation method of claim 5, wherein a flow of current programming design is as follows:
s401: executing initialization related operation comprising a current address and a current address;
s402: assigning the voltage address to the current address;
s403: detecting a current address;
if the judgment result is that the current address is equal to the current address, returning to execute S402;
or if the current address is not equal to the current address, executing S404;
s404: assigning the current address to a current address;
s405: generating current RAM read enable and read clock signals;
s406: reading current data corresponding to a current address in an ammeter;
s407: generating a current programming start signal;
s408: performing a current program set operation;
s409: the current programming setting is completed, and execution returns to S402.
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