CN114384315A - Voltage fluctuation and flicker tester based on FPGA and ARM9 - Google Patents

Voltage fluctuation and flicker tester based on FPGA and ARM9 Download PDF

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CN114384315A
CN114384315A CN202210005544.1A CN202210005544A CN114384315A CN 114384315 A CN114384315 A CN 114384315A CN 202210005544 A CN202210005544 A CN 202210005544A CN 114384315 A CN114384315 A CN 114384315A
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flicker
voltage
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许杏桃
沈海奉
徐小康
许杏明
王益明
沈正彬
严程伟
刘欣宇
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Jiangsu Anfang Electric Power Technology Co ltd
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Abstract

The invention takes an embedded ARM9 controller and an FPGA as processing cores, designs a handheld voltage fluctuation and flicker tester, and can simultaneously measure the short-time flicker value of a plurality of paths of alternating voltage signalsP stAnd long time flicker valueP lt. In order to simplify the operation process, the square root mean value operation is carried out once on each half cycle of the voltage, the obtained square root mean value sequence is subjected to fast Fourier transform, the corresponding instantaneous flicker value under each frequency is solved, and the short-time flicker is solved by utilizing a probability large value method. By alternately receiving data in 2 groups of memories in the FPGA and utilizing a ping-pong mode to realize a 32-bit FFT algorithm, the operation speed and the accuracy can be greatly improved. The actual measurement result shows that the calculation precision of the tester for the root mean square value reaches 2%, and the flicker measurement precision reaches 2%. The software and hardware platform can conveniently expand the application of other electric energy quality measurement such as harmonic waves, interharmonic waves and the like, and has better popularization value.

Description

一种基于FPGA和ARM9的电压波动与闪变测试仪A voltage fluctuation and flicker tester based on FPGA and ARM9

技术领域technical field

本发明属于电子测量技术领域,涉及一种电能质量的监控装置,尤其涉及一种基于FPGA和ARM9的电压波动与闪变测试仪。The invention belongs to the technical field of electronic measurement, and relates to a monitoring device for power quality, in particular to a voltage fluctuation and flicker tester based on FPGA and ARM9.

背景技术Background technique

随着我国工业和国民经济的快速发展,电网负荷急剧增加,特别是冲击性、非线性负荷所占比重不断加大,使得供电电压发生波动和闪变,严重影响着电网的电能质量。目前,基于IEC61OOO-3-7标准给出的闪变测量原理的数字化闪变仪已经问世,但其测量方法复杂,成本较高。基于并联滤波器的电压闪变检测方法需釆用2个并联滤波器对频谱进行分析和幅值跟随,实现难度较大。基于虚拟仪器的平方检测法对电压闪变进行测量需要计算机进行配合,不便于实现手持式或安装式应用。With the rapid development of my country's industry and national economy, the load of the power grid has increased sharply, especially the proportion of impact and nonlinear loads has been increasing, which makes the power supply voltage fluctuate and flicker, which seriously affects the power quality of the power grid. At present, the digital flicker meter based on the flicker measurement principle given by the IEC61OOO-3-7 standard has come out, but its measurement method is complicated and the cost is high. The voltage flicker detection method based on the parallel filter needs to use two parallel filters to analyze the spectrum and follow the amplitude, which is difficult to implement. The measurement of voltage flicker by the square detection method based on virtual instrument requires the cooperation of a computer, which is not convenient for hand-held or installed applications.

发明内容SUMMARY OF THE INVENTION

针对现有技术存在的问题,本发明提供一种手持式的电压波动与闪变测试仪,以FPGA和ARM为控制核心并结合FFT算法,可以实时、高精度地对多路电压波动和闪变值进行测量,并可将电压方均根值曲线记录储存,方便査阅与分析,并保证较高的测量精度。In view of the problems existing in the prior art, the present invention provides a hand-held voltage fluctuation and flicker tester, which takes FPGA and ARM as the control core and combines the FFT algorithm, which can measure the multi-channel voltage fluctuation and flicker in real time and with high precision. The voltage rms value curve can be recorded and stored, which is convenient for viewing and analysis, and ensures high measurement accuracy.

一种基于FPGA和ARM9的电压波动与闪变测试仪,包括信号预处理电路,同步A/D转换器,FPGA和ARM微控制器系统;A voltage fluctuation and flicker tester based on FPGA and ARM9, including signal preprocessing circuit, synchronous A/D converter, FPGA and ARM microcontroller system;

通过信号预处理电路检测并处理4路交流电压信号,然后通过FPGA进行前期运算和AD转换电路转换处理后传输给ARM控制系统进行后期运算,实现人机交互及网络通信功能;The signal preprocessing circuit detects and processes 4 channels of AC voltage signals, and then performs pre-operation and AD conversion circuit conversion processing through FPGA, and then transmits it to the ARM control system for post-operation to realize human-computer interaction and network communication functions;

所述的信号预处理电路,由电压互感器、模拟开关与运放组成的可调放大电路、以及RC低通滤波器组成,将被测电压信号变换为适合A/D量程的信号,且滤除高频成分;The signal preprocessing circuit is composed of a voltage transformer, an adjustable amplifier circuit composed of an analog switch and an operational amplifier, and an RC low-pass filter, which converts the measured voltage signal into a signal suitable for the A/D range, and filters the signal. remove high frequency components;

所述FPGA,其内部含有43661个逻辑单元、2088Kb的块RAM数量、以及401Kb的分布式RAM,该器件提供218个I/O;FPGA负责控制A/D转换器进行采样,并根据ARM9的指令控制模拟开关对量程进行切换,采样键盘动作并将按键编码传给ARM控制器;The FPGA contains 43661 logic units, 2088Kb of block RAM, and 401Kb of distributed RAM. The device provides 218 I/Os; the FPGA is responsible for controlling the A/D converter for sampling, and according to ARM9 instructions Control the analog switch to switch the range, sample the keyboard action and transmit the key code to the ARM controller;

测试仪的核心运算由该FPGA完成,包括半波有效值计算和FFT变换,并将运算结果及波形数据传给ARM控制器进行后续处理;The core operation of the tester is completed by the FPGA, including half-wave RMS calculation and FFT transformation, and the operation results and waveform data are transmitted to the ARM controller for subsequent processing;

所述A/D转换器,具有4通道同时采样功能,其采样速率最髙为200KSPS.16位精度,有串行和并行2种输出方式,选±5V或±10V输入范围用于扩展相位差测量功能,采用并口方式与FPGA连接,并选择±5V输入范围,A/D转换器的数据与控制总线与FPGA的I/O直连;The A/D converter has a 4-channel simultaneous sampling function, the sampling rate is 200KSPS. 16-bit precision, there are two output modes of serial and parallel, and the input range of ±5V or ±10V is selected to expand the phase difference The measurement function is connected to the FPGA in the parallel port mode, and the input range of ±5V is selected, and the data and control bus of the A/D converter are directly connected to the I/O of the FPGA;

所述ARM控制系统,运行速度为200MHz,作为系统的控制核心,完成了操作系统初始化及各任务分配,并且对FFT的结果进行后期运算,以获得电压波动与闪变的最终结果。The ARM control system, running at a speed of 200MHz, as the control core of the system, completes the initialization of the operating system and assignment of tasks, and performs post-operation on the results of the FFT to obtain the final results of voltage fluctuation and flicker.

进一步地,信号预处理电路中,电压互感器选用2mA:2mA的微型互感器,可调放大电路由轨对轨集成运算放大器和4路模拟开关组成,提供4档放大倍数,以提高电压的测量范围,RC低通滤波截止频率选为3000Hz。Further, in the signal preprocessing circuit, the voltage transformer is a 2mA: 2mA miniature transformer, and the adjustable amplifier circuit is composed of rail-to-rail integrated operational amplifiers and 4-way analog switches, providing 4-level magnification to improve the voltage measurement. range, the RC low-pass filter cutoff frequency is selected as 3000Hz.

进一步地,FPGA与ARM的连接采用总线接口,使用IP核工具在FPGA内部使用块RAM生成一个4KB的FIFO,用来在FPGA和ARM之间传输数据。Further, the connection between the FPGA and the ARM adopts the bus interface, and the IP core tool is used to generate a 4KB FIFO using the block RAM inside the FPGA to transmit data between the FPGA and the ARM.

进一步地,ARM控制系统内置LINUX操作系统和QT图形文件系统,且支持TCP/IP网络协议栈,外扩NAND FLASH存储器,容量为128MB;外扩DRAM芯片,容量为16M×32bit;外扩SPI总线FLASH芯片进行参数存储,容量为128KB。Further, the ARM control system has built-in LINUX operating system and QT graphic file system, and supports TCP/IP network protocol stack, externally expands NAND FLASH memory with a capacity of 128MB; externally expands DRAM chip with a capacity of 16M×32bit; externally expands SPI bus FLASH chip for parameter storage, the capacity is 128KB.

与现有技术相比,本发明的有益效果为:在ARM9及FPGA平台上设计了手持式电压波动与闪变测试仪,利用FPGA中的FFT算法实现对闪变的测量,具有精度高,速度快的优点。LINUX+QT+FATFS的方式使得ARM的开发方便,图形界面友好,存储容易,网络接口的引入方便远程通信与控制。Compared with the prior art, the beneficial effects of the present invention are as follows: a handheld voltage fluctuation and flicker tester is designed on the ARM9 and FPGA platforms, and the FFT algorithm in the FPGA is used to realize the measurement of the flicker, with high precision and high speed. Quick advantage. The method of LINUX+QT+FATFS makes the development of ARM convenient, the graphical interface is friendly, the storage is easy, and the introduction of the network interface is convenient for remote communication and control.

附图说明Description of drawings

图1为本发明实施例中的硬件结构图。FIG. 1 is a hardware structural diagram in an embodiment of the present invention.

图2为本发明实施例中的连接以太网控制芯片DP83848YB实现10M/100M自适应的网络通信接口图。FIG. 2 is a diagram of a network communication interface for connecting an Ethernet control chip DP83848YB to realize 10M/100M self-adaptation in an embodiment of the present invention.

图3为本发明实施例中的闪变的计算流程图。FIG. 3 is a flow chart of calculation of flicker in an embodiment of the present invention.

图4为本发明实施例中的FPGA中各模块框图。FIG. 4 is a block diagram of each module in the FPGA in the embodiment of the present invention.

具体实施方式Detailed ways

下面结合说明书附图对本发明的技术方案做进一步的详细说明。The technical solutions of the present invention will be further described in detail below with reference to the accompanying drawings.

一种由信号预处理电路,同步A/D转换器,FPGA和ARM微控制器系统组成的手持式设备。通过信号预处理电路检测并处理4路交流电压信号,然后通过FPGA进行前期运算和AD转换电路转换处理后传输给ARM控制系统进行后期运算,实现人机交互及网络通信功能。A handheld device composed of signal preprocessing circuit, synchronous A/D converter, FPGA and ARM microcontroller system. The 4-channel AC voltage signal is detected and processed by the signal preprocessing circuit, and then the FPGA is used for pre-operation and AD conversion circuit conversion processing, and then transmitted to the ARM control system for post-operation to realize human-computer interaction and network communication functions.

信号预处理电路,由电压互感器,模拟开关与运放组成的可调放大电路,RC低通滤波器组成,可将被测电压信号变换为适合A/D量程的信号(系统设计为﹣5~﹢5V),且滤除高频成分。其中电压互感器选用2mA:2mA的微型互感器,可调放大电路由轨对轨集成运算放大器和4路模拟开关组成,提供4档放大倍数,以提高电压的测量范围(系统设计为0.5-500V),RC低通滤波截止频率选为3000Hz。The signal preprocessing circuit is composed of a voltage transformer, an adjustable amplifier circuit composed of an analog switch and an operational amplifier, and an RC low-pass filter, which can convert the measured voltage signal into a signal suitable for the A/D range (the system is designed as -5 ~﹢5V), and filter out high frequency components. Among them, the voltage transformer is a 2mA: 2mA miniature transformer, and the adjustable amplifier circuit is composed of rail-to-rail integrated operational amplifiers and 4-way analog switches, providing 4-level magnification to improve the voltage measurement range (the system is designed to be 0.5-500V ), the cut-off frequency of RC low-pass filter is selected as 3000Hz.

FPGA,其内部含有43661个逻辑单元,块RAM数量达到2088Kb,还含有401Kb的分布式RAM,该器件可提供218个I/O,功耗仅为常用FPGA的50%,适合于手持式设计。FPGA负责控制A/D转换器进行采样,并根据ARM9的指令控制模拟开关对量程进行切换,采样键盘动作并将按键编码传给ARM控制器。测试仪的核心运算由该FPGA完成,包括半波有效值计算和FFT变换,并将运算结果及波形数据传给ARM控制器进行后续处理。FPGA与ARM的连接采用总线接口,使用IP核工具在FPGA内部使用块RAM生成一个4KB的FIFO,用来在FPGA和ARM之间传输数据。FPGA, which contains 43661 logic units, block RAM up to 2088Kb, also contains 401Kb distributed RAM, this device can provide 218 I/Os, and the power consumption is only 50% of the commonly used FPGA, which is suitable for hand-held design. The FPGA is responsible for controlling the A/D converter to sample, and controls the analog switch to switch the range according to the ARM9 instruction, samples the keyboard action and transmits the key code to the ARM controller. The core operation of the tester is completed by the FPGA, including half-wave RMS calculation and FFT transformation, and the operation results and waveform data are transmitted to the ARM controller for subsequent processing. The connection between the FPGA and the ARM adopts the bus interface, and the IP core tool is used to generate a 4KB FIFO using the block RAM inside the FPGA to transmit data between the FPGA and the ARM.

A/D转换器,具有4通道同时采样功能,其采样速率最髙为200KSPS.16位精度,有串行和并行2种输出方式,可选±5V或±10V输入范围可用于扩展相位差测量功能,本发明采用并口方式与FPGA连接,并选择±5V输入范围,A/D转换器的数据与控制总线与FPGA的I/O直连即可。A/D converter, with 4-channel simultaneous sampling function, the highest sampling rate is 200KSPS. 16-bit precision, there are two output modes of serial and parallel, optional ±5V or ±10V input range can be used to expand phase difference measurement In the present invention, the parallel port is used to connect with the FPGA, and the input range of ±5V is selected, and the data and control bus of the A/D converter can be directly connected with the I/O of the FPGA.

ARM控制系统,具有200MHz的运行速度和丰富的用户接口功能,是系统的控制核心,完成了操作系统初始化及各任务分配,并且对FFT的结果进行后期运算,以获得电压波动与闪变的最终结果。因ARM控制系统要内置LINUX操作系统和QT图形文件系统,且要支持TCP/IP网络协议栈,对程序空间要求较大,故外扩NAND FLASH存储器,容量为128MB。并外扩DRAM芯片,容量为16M×32bit。外扩SPI总线FLASH芯片进行参数存储,容量为128KB。以下是结合具体实施例对本发明做进一步详细说明:The ARM control system, with a running speed of 200MHz and rich user interface functions, is the control core of the system. It completes the initialization of the operating system and assignment of tasks, and performs post-operation on the results of the FFT to obtain the final voltage fluctuation and flicker. result. Because the ARM control system needs to have built-in LINUX operating system and QT graphics file system, and needs to support the TCP/IP network protocol stack, the program space is required to be larger, so the NAND FLASH memory is expanded externally with a capacity of 128MB. And expand the DRAM chip, the capacity is 16M × 32bit. External expansion of SPI bus FLASH chip for parameter storage, the capacity is 128KB. The present invention is described in further detail below in conjunction with specific embodiments:

首先利用标准谐波信号源提供输入信号到系统,2~6次谐波都设为基波的2%,然后对电压每半周波进行一次方均根值运算,并对得到的方均根值序列进行快速傅里叶变换,求解出各频率下对应的瞬时闪变值,并利用概率大值法求解短时闪变。通过在FPGA中的2组存储器交替接收数据,利用乒乓方式实现32位的FFT算法,可大幅提高运算速度与精度。First, use a standard harmonic signal source to provide the input signal to the system, and set the 2nd to 6th harmonics to 2% of the fundamental wave, then perform the first-order RMS value operation on each half-cycle of the voltage, and perform a fast-Four-Four (FFT) on the obtained RMS value sequence. Lie transform is used to solve the instantaneous flicker value corresponding to each frequency, and the short-term flicker is solved by using the maximum probability method. The 32-bit FFT algorithm is realized by using the ping-pong method to receive data alternately between two sets of memories in the FPGA, which can greatly improve the operation speed and accuracy.

第一步,每半个周波计算一次电压方均根值,得到电压方均根值序列U(N),本系统取N=1024,则时间跨度为1024×0.01=10.24s。The first step is to calculate the voltage root mean square value every half cycle, and obtain the voltage root mean square value sequence U(N).

第二步,对序列U(N)进行FFT运算,求出其离散的频谱,因时间跨度为10.24s,故U(N)的频谱分辩率为1/10.24=0.097656Hz。The second step is to perform FFT operation on the sequence U(N) to obtain its discrete spectrum. Since the time span is 10.24s, the spectral resolution of U(N) is 1/10.24=0.097656Hz.

第三步,将各频率对应的频谱幅值的2倍除以分解出的直流分量的幅值,就得到了该频率下的电压波动di,利用公式Si=[d(i)/di]2可得到该频率下的瞬时闪变值SiThe third step is to divide twice the frequency spectrum amplitude corresponding to each frequency by the decomposed DC component amplitude to obtain the voltage fluctuation d i at this frequency, using the formula S i =[d(i)/d i ] 2 can obtain the instantaneous flicker value S i at this frequency.

第四步,序列U(N)对应的瞬时闪变Si就等于其频谱上各频率对应的瞬时闪变之和,Si=s0.5+s1+s1.5+...+s25In the fourth step, the instantaneous flicker S i corresponding to the sequence U(N) is equal to the sum of the instantaneous flicker corresponding to each frequency on its frequency spectrum, S i =s 0.5 +s 1 +s 1.5 +...+s 25 .

第五步,按以上步骤计算出60个瞬时闪变值,对其排序求解出P0.1,P1,P3,P10和P50这5个规定值,它们分别为该段时间内S序列中的99.9%,99%,97%,90%和50%的概率大值,代入公式

Figure BDA0003455349900000061
即可求解出10min内的短时闪变值Pst。The fifth step is to calculate 60 instantaneous flicker values according to the above steps, and then solve the 5 specified values of P 0.1 , P 1 , P 3 , P 10 and P 50 by sorting them, which are the S sequences in this period of time respectively. 99.9%, 99%, 97%, 90% and 50% of the probability of large value, substitute into the formula
Figure BDA0003455349900000061
The short-term flicker value P st within 10 minutes can be solved.

第六步,以上步骤进行12次,求解出12个短时闪变值,利用公式

Figure BDA0003455349900000062
即可求解出2h内的长时闪变Plt。In the sixth step, the above steps are performed 12 times, and 12 short-term flicker values are obtained, using the formula
Figure BDA0003455349900000062
The long-term flicker P lt within 2h can be solved.

査看FPGA进行FFT运算后的结果:View the result after the FPGA performs the FFT operation:

Figure BDA0003455349900000063
Figure BDA0003455349900000063

经计算可知,各次谐波与基波百分比的相对误差均小于2%。对比测量的均方根值与给定值,其误差小于2%。分析可知误差是由于信号源误差,A/D采样误差,FFT运算时取整误差等造成的。同时使用该电压波动与闪变测试仪对学校区域380V配电网进行实测,测试结果表明,短时闪变值Pst最小值为0.096,最大值为0.473,长时闪变值Plt为0.178,远低于1.0的国标限值。该结果比较符合学校区域的实际情况。The calculation shows that the relative error of each harmonic and the fundamental wave percentage is less than 2%. Comparing the measured root mean square value with the given value, the error is less than 2%. Analysis shows that the error is caused by signal source error, A/D sampling error, rounding error during FFT operation, etc. At the same time, the voltage fluctuation and flicker tester was used to measure the 380V distribution network in the school area. The test results show that the short-term flicker value P st is the minimum value of 0.096, the maximum value is 0.473, and the long-term flicker value P lt is 0.178 , far below the national standard limit of 1.0. The results are more in line with the actual situation in the school area.

以上所述仅为本发明的较佳实施方式,本发明的保护范围并不以上述实施方式为限,但凡本领域普通技术人员根据本发明所揭示内容所作的等效修饰或变化,皆应纳入权利要求书中记载的保护范围内。The above descriptions are only the preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, but any equivalent modifications or changes made by those of ordinary skill in the art based on the contents disclosed in the present invention should be included in the within the scope of protection described in the claims.

Claims (4)

1.一种基于FPGA和ARM9的电压波动与闪变测试仪,包括信号预处理电路,同步A/D 转换器,FPGA和ARM微控制器系统,其特征在于:1. a voltage fluctuation and flicker tester based on FPGA and ARM9, comprise signal preprocessing circuit, synchronous A/D converter, FPGA and ARM microcontroller system, it is characterized in that: 通过信号预处理电路检测并处理4路交流电压信号,然后通过FPGA进行前期运算和AD转换电路转换处理后传输给ARM控制系统进行后期运算,得到最终运算结果,实现人机交互及网络通信功能;The signal preprocessing circuit detects and processes 4 channels of AC voltage signals, and then performs pre-operation and AD conversion circuit conversion processing through FPGA, and then transmits it to the ARM control system for post-operation to obtain the final operation result, realizing human-computer interaction and network communication functions; 所述的信号预处理电路,由电压互感器、模拟开关与运放组成的可调放大电路、以及RC低通滤波器组成,将被测电压信号变换为适合A/D量程的信号,且滤除高频成分;The signal preprocessing circuit is composed of a voltage transformer, an adjustable amplifier circuit composed of an analog switch and an operational amplifier, and an RC low-pass filter, which converts the measured voltage signal into a signal suitable for the A/D range, and filters the signal. remove high frequency components; 所述FPGA,其内部含有43661个逻辑单元、2088 Kb的块RAM数量、以及401 Kb 的分布式RAM,该器件提供218个I/O;FPGA负责控制A/D转换器进行采样,并根据 ARM9的指令控制模拟开关对量程进行切换,采样键盘动作并将按键编码传给ARM控制器;The FPGA contains 43661 logic units, 2088 Kb of block RAM, and 401 Kb of distributed RAM. The device provides 218 I/Os; the FPGA is responsible for controlling the A/D converter for sampling, and according to the ARM9 The command controls the analog switch to switch the range, samples the keyboard action and transmits the key code to the ARM controller; 测试仪的核心运算由该FPGA完成,包括半波有效值计算和FFT变换,并将运算结果及波形数据传给ARM控制器进行后续处理;The core operation of the tester is completed by the FPGA, including half-wave RMS calculation and FFT transformation, and the operation results and waveform data are transmitted to the ARM controller for subsequent processing; 所述A/D转换器,具有4通道同时采样功能,其采样速率最髙为200KSPS.16位精度,有串行和并行 2种输出方式,选±5 V或±10V输入范围用于扩展相位差测量功能,采用并口方式与FPGA连接,并选择±5 V输入范围,A/D转换器的数据与控制总线与FPGA的I/O直连;The A/D converter has the function of 4-channel simultaneous sampling, and its sampling rate is up to 200KSPS. 16-bit precision, there are two output modes of serial and parallel, and the input range of ±5V or ±10V is selected for phase expansion. Difference measurement function, use parallel port to connect with FPGA, and select ±5 V input range, the data and control bus of A/D converter are directly connected to I/O of FPGA; 所述ARM控制系统,运行速度为200 MHz,作为系统的控制核心,完成了操作系统初始化及各任务分配,并且对FFT的结果进行后期运算,以获得电压波动与闪变的最终结果。The ARM control system, running at a speed of 200 MHz, as the control core of the system, completes the initialization of the operating system and assignment of tasks, and performs post-operation on the results of the FFT to obtain the final results of voltage fluctuation and flicker. 2. 根据权利要求1所述的一种基于FPGA和ARM9的电压波动与闪变测试仪,其特征在于:信号预处理电路中,电压互感器选用2mA:2mA的微型互感器,可调放大电路由轨对轨集成运算放大器和4路模拟开关组成,提供4档放大倍数,以提高电压的测量范围,RC低通滤波截止频率选为3 000 Hz。2. a kind of voltage fluctuation and flicker tester based on FPGA and ARM9 according to claim 1, is characterized in that: in signal preprocessing circuit, voltage transformer selects 2mA: the miniature transformer of 2mA, adjustable amplifier circuit It is composed of rail-to-rail integrated operational amplifier and 4 analog switches. It provides 4-level magnification to improve the voltage measurement range. The cut-off frequency of RC low-pass filter is selected as 3 000 Hz. 3. 根据权利要求1所述的一种基于FPGA和ARM9的电压波动与闪变测试仪,其特征在于:FPGA与ARM的连接采用总线接口,使用IP核工具在FPGA内部使用块RAM生成一个4 KB的FIFO,用来在FPGA和ARM之间传输数据。3. a kind of voltage fluctuation and flicker tester based on FPGA and ARM9 according to claim 1, it is characterized in that: the connection of FPGA and ARM adopts bus interface, uses IP core tool to use block RAM inside FPGA to generate a 4 KB FIFO is used to transfer data between FPGA and ARM. 4. 根据权利要求1所述的一种基于FPGA和ARM9的电压波动与闪变测试仪,其特征在于:ARM控制系统内置LINUX操作系统和QT图形文件系统,且支持TCP/IP网络协议栈,外扩NAND FLASH存储器,容量为128 MB;外扩DRAM芯片,容量为16 M×32 bit;外扩SPI总线FLASH芯片进行参数存储,容量为128 KB。4. a kind of voltage fluctuation and flicker tester based on FPGA and ARM9 according to claim 1, is characterized in that: ARM control system built-in LINUX operating system and QT graphic file system, and support TCP/IP network protocol stack, Externally expand NAND FLASH memory, with a capacity of 128 MB; externally expand DRAM chip, with a capacity of 16 M×32 bit; externally expand SPI bus FLASH chip for parameter storage, with a capacity of 128 KB.
CN202210005544.1A 2022-01-04 2022-01-04 Voltage fluctuation and flicker tester based on FPGA and ARM9 Pending CN114384315A (en)

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