CN113433839A - Synchronous rectification Boost converter simulation circuit based on virtual inductor and virtual capacitor - Google Patents
Synchronous rectification Boost converter simulation circuit based on virtual inductor and virtual capacitor Download PDFInfo
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- CN113433839A CN113433839A CN202110718859.6A CN202110718859A CN113433839A CN 113433839 A CN113433839 A CN 113433839A CN 202110718859 A CN202110718859 A CN 202110718859A CN 113433839 A CN113433839 A CN 113433839A
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Abstract
The invention belongs to the technical field of real-time simulation of an electrical system, and discloses a synchronous rectification Boost converter simulation circuit based on a virtual inductor and a virtual capacitor, which comprises the virtual inductor and the virtual capacitor, wherein a virtual inductor operation link is formed by cascading a first operational amplifier circuit and a second operational amplifier circuit, and the first operational amplifier circuit and the second operational amplifier circuit perform integral and proportional operation on input voltages at two ends of the virtual inductor to simulate the electrical characteristics of a passive inductor; the virtual inductor execution link is composed of a third operational amplifier circuit, and the third operational amplifier circuit converts the voltage output quantity of the virtual inductor operation link into current output quantity to simulate energy storage and discharge of a passive inductor. The invention simulates the electrical characteristics of the passive inductor and the passive capacitor, and simulates the actual high-power Boost converter circuit in real time by utilizing the adjustable characteristic of the virtual inductor and the virtual capacitor, thereby realizing the verification of the controller.
Description
Technical Field
The invention belongs to the technical field of real-time simulation of an electrical system, and particularly relates to a synchronous rectification Boost converter simulation circuit based on a virtual inductor and a virtual capacitor.
Background
At present, under the situation of new energy revolution, new technologies and new devices of renewable energy development, electric vehicles, micro-grids, flexible power transmission and distribution and other electric power are continuously emerging, new requirements are provided for simulation verification testing technologies, and semi-physical simulation starts to enter the public vision from this point of view.
The hardware-in-loop simulation technology is used as one kind of semi-physical simulation, is an important means for designing the power converter controller, can effectively improve the design efficiency of the power converter controller, reduces the test cost of a hardware device, and reduces the risk brought by testing the controller.
When the traditional digital simulator simulates a Boost converter, the traditional digital simulator mainly comprises three links of PWM input, digital processing chip operation and analog output, firstly, the PWM signal input into the simulator is subjected to A/D conversion, PWM voltage input quantity is converted into digital input quantity, then the digital input quantity is sent into a digital processing chip for operation processing, and then the digital quantity output after the chip operation processing is converted into the analog output quantity through the D/A conversion and fed back to a controller. The process is very complicated, and a lot of delays are brought, including delay brought by the process of forming digital quantity after input PWM is subjected to period averaging and edge detection, delay caused by communication between PWM digital signal boards, delay brought by the calculation period of a processor, delay brought by D/a conversion output, and the like. In addition, the traditional digital simulator has high cost, large volume, heavy weight and is not portable enough.
Disclosure of Invention
In order to solve the problems, the invention provides a synchronous rectification Boost converter simulation circuit based on a virtual inductor and a virtual capacitor, which comprises the virtual inductor and the virtual capacitor, and utilizes the combination of an operational amplifier circuit to reproduce the transfer function relationship between the input and the output of a passive inductor and the passive capacitor, thereby simulating the electrical characteristics of the passive inductor and the passive capacitor.
The specific technical scheme of the simulation circuit of the synchronous rectification Boost converter is as follows:
a synchronous rectification Boost converter simulation circuit based on a virtual inductor and a virtual capacitor comprises an input part, the virtual inductor, the virtual capacitor, an NMOS upper tube Q2, an NMOS lower tube Q1, an optocoupler A, an optocoupler B and a load; the positive input part terminal is connected to a port a of the virtual inductor, a port c of the virtual inductor is connected to the negative input part terminal, the negative input part terminal is connected to a source of an NMOS lower tube Q1, a grid of the NMOS lower tube Q1 is connected to an output end of the optical coupler A, a drain of the NMOS lower tube Q1 is connected to a ground GND _ L of the virtual inductor, a drain of the NMOS lower tube Q1 is simultaneously connected to a source of an NMOS upper tube Q2, a grid of the NMOS upper tube Q2 is connected to an output end of the optical coupler B, a drain of the NMOS upper tube Q2 is connected to the positive load terminal and is simultaneously connected to a port d of the virtual capacitor, and a port e of the virtual capacitor is connected to the negative load terminal and is simultaneously connected to a ground GND _ P of the Boost circuit.
Furthermore, the virtual inductor comprises a virtual inductor operation link and a virtual inductor execution link, wherein the virtual inductor operation link is formed by cascading a first operational amplifier circuit and a second operational amplifier circuit, and the first operational amplifier circuit and the second operational amplifier circuit perform integral and proportional operation on input voltages at two ends of the virtual inductor to simulate the electrical characteristics of the passive inductor; the virtual inductor execution link is composed of a third operational amplifier circuit, and the third operational amplifier circuit converts the voltage output quantity of the virtual inductor operation link into current output quantity to simulate energy storage and discharge of a passive inductor.
Further, the first operational amplifier is composed of a first resistor, a second resistor, a third resistor and a first capacitor; the left end of the first resistor is connected with a virtual inductor port a, and the right end of the first resistor is connected with the reverse input end of the first operational amplifier; the third resistor and the first capacitor are connected in parallel between the reverse input end of the first operational amplifier and the output end of the first operational amplifier; the second resistor is connected between the first operational amplifier equidirectional input end and the virtual inductor ground in series; the virtual inductor is connected to a virtual inductor port b;
the second operational amplifier is composed of a second operational amplifier, a fourth resistor, a fifth resistor and a sixth resistor; the fourth resistor is connected between the output end of the first operational amplifier and the inverting input end of the second operational amplifier in series; the sixth resistor is connected in parallel between the reverse input end of the second operational amplifier and the output end of the second operational amplifier; the fifth resistor is connected between the second operational amplifier equidirectional input end and the virtual inductor ground in series;
the third operational discharge circuit consists of a third operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor and an eleventh resistor; the seventh resistor is connected between the output end of the second operational amplifier and the inverting input end of the third operational amplifier in series; the eighth resistor is connected between the third operational amplifier equidirectional input end and the virtual inductor ground in series; the ninth resistor is connected between the right end of the seventh resistor and the port c in series, and the eleventh resistor is connected between the output end of the third operational amplifier and the port c in series; and the tenth resistor is connected in parallel between the third operational amplifier equidirectional input end and the third operational amplifier output end.
Furthermore, the output current of the virtual inductor execution link is the same as that of the traditional passive inductor, and the direction is opposite; the output current of the virtual inductor is completely from the power supply of the virtual inductor operational amplifier.
Further, the input of the virtual inductor is the voltage difference between a port a and a port b, the port a and the port b are equal to the ports on the left side and the right side of the traditional passive inductor, and the port c is the current output port of the virtual inductor; the first operational amplifier circuit and the second operational amplifier circuit of the virtual inductor perform integral and proportional operation on the voltage difference between the port a and the port b, and the third operational amplifier circuit converts the output voltage of the second operational amplifier circuit into output current and outputs the output current to the port c; the output current of the port c is equal to the output current of the traditional passive inductor in magnitude and opposite in direction.
Further, the virtual capacitor comprises a virtual capacitor sampling detection link and a virtual capacitor operation link, wherein the virtual capacitor sampling detection link is composed of a fourth operational amplifier circuit, and the fourth operational amplifier circuit samples and amplifies input current and converts the current quantity into a voltage quantity; and the virtual capacitor operation link is formed by cascading a fifth operational amplifier circuit and a sixth operational amplifier circuit, and the fifth operational amplifier circuit and the sixth operational amplifier circuit perform integral and proportional operation on the output of the virtual capacitor sampling detection link.
Further, the fourth operational discharge circuit is composed of a fourth operational amplifier, a twelfth resistor, a thirteenth resistor, a fourteenth resistor and a fifteenth resistor; the twelfth resistor is a sampling resistor and is connected between the virtual capacitor port d and the virtual capacitor ground in series, and the thirteenth resistor is connected between the virtual capacitor port d and the reverse input end of the fourth operational amplifier in series; the fourteenth resistor is connected between the homodromous input end of the fourth operational amplifier and the virtual capacitor ground in series; the fifteenth resistor is connected in parallel between the reverse input end of the fourth operational amplifier and the output end of the fourth operational amplifier;
the fifth operational discharge circuit consists of a fifth operational amplifier, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor and a second capacitor; the sixteenth resistor is connected between the output end of the fourth operational amplifier and the reverse input end of the fifth operational amplifier in series; the seventeenth resistor is connected in series between the fifth operational amplifier non-inverting input end and the virtual capacitor ground; the eighteenth resistor and the second capacitor are connected between the reverse input end of the fifth operational amplifier and the output end of the fifth operational amplifier in parallel;
the sixth operational discharge circuit consists of a sixth operational amplifier, a nineteenth resistor, a twentieth resistor and a twenty-first resistor; the nineteenth resistor is connected between the output end of the fifth operational amplifier and the reverse input end of the sixth operational amplifier in series; the twentieth resistor is connected in series between the homodromous input end of the sixth operational amplifier and the virtual capacitor ground; the twenty-first resistor is connected between the reverse input end of the sixth operational amplifier and the output end of the sixth operational amplifier in parallel; the output end of the sixth operational amplifier circuit is connected to the port e.
Furthermore, the voltage difference between the input end of the virtual capacitor sampling detection link and the output end of the virtual capacitor operation link is the same as the output voltage on two sides of the traditional passive capacitor, and the direction of the voltage difference is the same; and the output voltage of the virtual capacitor is all from a power supply of the virtual capacitor operational amplifier.
Further, the input of the virtual capacitor is a sampling current flowing into the port d, the sampling current is converted into a voltage through the fourth operational amplifier circuit to be output, the voltage output by the fourth operational amplifier circuit is subjected to integral and proportional operation through the fifth operational amplifier circuit and the sixth operational amplifier circuit, and finally a corresponding voltage is output through the port e; the port d and the port e are equal to ports on two sides of a traditional passive capacitor, and the voltage difference value between the port d and the port e is the same as the output voltage of the traditional passive capacitor in size and direction.
Further, the virtual inductance value is set to be
Wherein, R1 is a first resistance value, R4 is a fourth resistance value, R6 is a sixth resistance value, R7 is a seventh resistance value, R9 is a ninth resistance value, R11 is an eleventh resistance value, and C1 is a first capacitance value; resistors with different resistance values and capacitors with different capacitance values are used, or the first operational amplifier, the second operational amplifier and the third operational amplifier adopt variable gain operational amplifiers, so that the inductance value can be adjusted;
the virtual capacitor has a capacitance value of
Wherein, R12 is a twelfth resistance value, R13 is a thirteenth resistance value, R15 is a fifteenth resistance value, R16 is a sixteenth resistance value, R19 is a nineteenth resistance value, R21 is a twenty-first resistance value, and C2 is a second capacitance value; the resistors with different resistance values and the capacitors with different capacitance values are used, or the fourth operational amplifier, the fifth operational amplifier and the sixth operational amplifier adopt variable gain operational amplifiers, so that the capacitance value can be adjusted.
The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor has the following advantages:
according to the synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor, the adjustable characteristic of the virtual inductor and the virtual capacitor parameter is utilized, an actual high-power Boost converter circuit can be simulated in real time, and the risk possibly existing when an actual high-power Boost converter circuit controller is verified is effectively avoided; compared with the traditional digital simulator, the synchronous rectification Boost converter simulation circuit provided by the invention omits the processes of A/D conversion, digital chip arithmetic processing and D/A conversion output, and effectively reduces the delay time; compared with the large volume and the large weight of the traditional digital simulator, the invention has smaller volume, lighter weight and more portable use.
Drawings
FIG. 1 is a circuit diagram of a virtual inductor according to the present invention;
FIG. 2 is a circuit diagram of a virtual capacitor according to the present invention;
fig. 3 is a simulation circuit diagram of a synchronous rectification Boost converter based on a virtual inductor and a virtual capacitor according to the present invention;
fig. 4 is a schematic diagram of an inductive current waveform of a synchronous rectification Boost converter simulation circuit of the invention when the input is 1V, the switching frequency is 1kHZ, the duty ratio is 0.5, and the load is a fixed resistance of 100 ohms;
fig. 5 is a schematic diagram of an output voltage waveform of a synchronous rectification Boost converter simulation circuit according to the present invention.
Detailed Description
In order to better understand the purpose, structure and function of the present invention, a synchronous rectification Boost converter simulation circuit based on a virtual inductor and a virtual capacitor according to the present invention is described in further detail below with reference to the accompanying drawings.
As shown in fig. 3, the synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor of the present invention includes an input portion, the virtual inductor, the virtual capacitor, an NMOS upper tube Q2, an NMOS lower tube Q1, an optocoupler a, an optocoupler B, and a load.
As shown in fig. 1, the virtual inductor provided in the present invention includes a virtual inductor operation link and a virtual inductor execution link.
The virtual inductor operation link is formed by cascading a first operational amplifier circuit and a second operational amplifier circuit;
the virtual inductor execution link is composed of a third operational amplifier circuit.
The first operational amplifier is composed of a first operational amplifier, a first resistor, a second resistor, a third resistor and a first capacitor; the left end of the first resistor is connected with a virtual inductor port a, and the right end of the first resistor is connected with the reverse input end of the first operational amplifier; the third resistor and the first capacitor are connected in parallel between the reverse input end of the first operational amplifier and the output end of the first operational amplifier; the second resistor is connected between the first operational amplifier equidirectional input end and the virtual inductor ground in series; the virtual inductor is connected to virtual inductor port b.
The second operational amplifier is composed of a second operational amplifier, a fourth resistor, a fifth resistor and a sixth resistor; the fourth resistor is connected between the output end of the first operational amplifier and the inverting input end of the second operational amplifier in series; the sixth resistor is connected in parallel between the reverse input end of the second operational amplifier and the output end of the second operational amplifier; and the fifth resistor is connected between the second operational amplifier syntropy input end and the virtual inductor ground in series.
The third operational discharge circuit consists of a third operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor and an eleventh resistor; the seventh resistor is connected between the output end of the second operational amplifier and the inverting input end of the third operational amplifier in series; the eighth resistor is connected between the third operational amplifier equidirectional input end and the virtual inductor ground in series; the ninth resistor is connected between the right end of the seventh resistor and the port c in series, and the eleventh resistor is connected between the output end of the third operational amplifier and the port c in series; and the tenth resistor is connected in parallel between the third operational amplifier equidirectional input end and the third operational amplifier output end.
The input of the virtual inductor is the voltage difference between a port a and a port b, the port a and the port b are equal to the ports on the left side and the right side of the traditional passive inductor, and the port c is a current output port of the virtual inductor; the first operational amplifier circuit and the second operational amplifier circuit of the virtual inductor perform integral and proportional operation on the voltage difference between the port a and the port b, and the third operational amplifier circuit converts the output voltage of the second operational amplifier circuit into output current and outputs the output current to the port c; the output current of the port c is equal to the output current of the traditional passive inductor in magnitude and opposite in direction. The output current of the virtual inductor is completely from the power supply of the virtual inductor operational amplifier.
The virtual inductor simulates the electrical characteristics of a traditional passive inductor
Therefore, the function of energy storage and discharge of the traditional passive inductor is achieved.
Fig. 2 shows a virtual capacitor according to the present invention, which includes a virtual capacitor sampling detection unit and a virtual capacitor calculation unit.
The virtual capacitor sampling detection link is composed of a fourth operational amplifier circuit;
and the virtual capacitor operation link is formed by cascading a fifth operational amplifier circuit and a sixth operational amplifier circuit.
The fourth operational discharge circuit consists of a fourth operational amplifier, a twelfth resistor, a thirteenth resistor, a fourteenth resistor and a fifteenth resistor; the twelfth resistor is a sampling resistor and is connected between the virtual capacitor port d and the virtual capacitor ground in series, and the thirteenth resistor is connected between the virtual capacitor port d and the reverse input end of the fourth operational amplifier in series; the fourteenth resistor is connected between the homodromous input end of the fourth operational amplifier and the virtual capacitor ground in series; and the fifteenth resistor is connected between the fourth operational amplifier inverting input end and the fourth operational amplifier output end in parallel.
The fifth operational discharge circuit consists of a fifth operational amplifier, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor and a second capacitor; the sixteenth resistor is connected between the output end of the fourth operational amplifier and the reverse input end of the fifth operational amplifier in series; the seventeenth resistor is connected in series between the fifth operational amplifier non-inverting input end and the virtual capacitor ground; and the eighteenth resistor and the second capacitor are connected between the inverting input end of the fifth operational amplifier and the output end of the fifth operational amplifier in parallel.
The sixth operational discharge circuit consists of a sixth operational amplifier, a nineteenth resistor, a twentieth resistor and a twenty-first resistor; the nineteenth resistor is connected between the output end of the fifth operational amplifier and the reverse input end of the sixth operational amplifier in series; the twentieth resistor is connected in series between the homodromous input end of the sixth operational amplifier and the virtual capacitor ground; the twenty-first resistor is connected between the reverse input end of the sixth operational amplifier and the output end of the sixth operational amplifier in parallel; the output end of the sixth operational amplifier circuit is connected to the port e.
The input of the virtual capacitor is sampling current flowing into the port d, the sampling current is converted into voltage output through the fourth operational amplifier circuit, the voltage output by the fourth operational amplifier circuit is subjected to integral and proportional operation through the fifth operational amplifier circuit and the sixth operational amplifier circuit, and finally corresponding voltage is output through the port e; the port d and the port e are equal to ports on two sides of a traditional passive capacitor, and the voltage difference value between the port d and the port e is the same as the output voltage of the traditional passive capacitor in size and direction. The output voltage of the virtual capacitor is all from the power supply of the virtual capacitor operational amplifier.
The virtual inductor simulates the electrical characteristics of a traditional passive capacitor
Therefore, the function of voltage stabilization of the traditional passive capacitor is achieved.
The invention discloses a synchronous rectification Boost converter simulation circuit based on a virtual inductor and a virtual capacitor, which comprises an input part, the virtual inductor, the virtual capacitor, an NMOS upper tube Q2, an NMOS lower tube Q1, an optocoupler A, an optocoupler B and a load, wherein the virtual inductor and the virtual capacitor are shown in figure 3. The positive end of the input part is connected to the input end of a first operational amplifier circuit of a virtual inductor, the output end of the first operational amplifier circuit is connected to the input end of a second operational amplifier circuit of the virtual inductor, the output end of the second operational amplifier circuit is connected to the input end of a third operational amplifier circuit of the virtual inductor, the output end of the third operational amplifier circuit is connected to the negative end of the input part, the negative end of the input part is connected to the source of an NMOS lower tube Q1, the grid of the NMOS lower tube Q1 is connected to the output end of an optical coupler A, the drain of the NMOS lower tube Q1 is connected to the ground GND _ L of the virtual inductor, the drain of the NMOS lower tube Q1 is simultaneously connected to the source of an NMOS upper tube Q2, the grid of the NMOS upper tube Q2 is connected to the output end of an optical coupler B, the drain of the NMOS upper tube Q2 is connected to the positive end of a load and simultaneously connected to the input end of a fourth operational amplifier circuit of the virtual capacitor, the output end of the fourth operational amplifier circuit of the virtual capacitor, the fifth operational amplifier circuit of the virtual capacitor is connected to the input end of the virtual capacitor sixth operational amplifier circuit of the virtual capacitor, the output end of the sixth operational amplifier circuit is connected to the negative end of the load and is also connected to the ground GND _ P of the Boost circuit.
The virtual inductor has the inductance value of
Wherein, R1 is the first resistance value, R4 is the fourth resistance value, R6 is the sixth resistance value, R7 is the seventh resistance value, R9 is the ninth resistance value, R11 is the eleventh resistance value, and C1 is the first capacitance value. The inductance value can be adjusted by using resistors with different resistance values and capacitors with different capacitance values, or by adopting variable gain operational amplifier for the first operational amplifier, the second operational amplifier and the third operational amplifier.
The capacitance value of the virtual capacitor proposed by the invention is
Wherein, R12 is the twelfth resistance value, R13 is the thirteenth resistance value, R15 is the fifteenth resistance value, R16 is the sixteenth resistance value, R19 is the nineteenth resistance value, R21 is the twenty-first resistance value, and C2 is the second capacitance value. The capacitance value can be adjusted by using resistors with different resistance values and capacitors with different capacitance values, or by adopting variable gain operational amplifiers for the fourth operational amplifier, the fifth operational amplifier and the sixth operational amplifier.
When PWMA is high and PWMB is low, the NMOS lower tube Q1 is turned on, the NMOS upper tube Q2 is turned off, the negative current IL1 output by the third operational amplifier circuit of the dummy inductor flows into the source of the NMOS lower tube Q1, and then flows into the ground GND _ L of the dummy inductor from the drain of the NMOS lower tube Q1.
During this time, the negative current IL1 is all from the virtual inductor operational amplifier power supply, and the output terminal of the operational amplifier power supply outputs the negative current IL1, and finally all flows back to the ground of the virtual inductor operational amplifier power supply, thereby completing the closed-loop flow of the negative current IL1 in the circuit.
When PWMA is low and PWMB is high, the NMOS lower tube Q1 is turned off, the NMOS upper tube Q2 is turned on, the third op-amp circuit of the virtual inductor outputs a negative current IL2 to flow into the output terminal of the sixth op-amp circuit of the virtual capacitor, the negative current IL2 then flows into the sampling resistor from the ground GND _ C of the virtual capacitor, and IL2 then flows into the ground GND _ L of the virtual inductor from the sampling resistor through the NMOS upper tube Q2.
During this period, the negative current IL2 flows out of the virtual inductor operational amplifier power supply, flows into the output end of the virtual capacitor operational amplifier power supply, then flows through the sampling resistor R12 from the ground GND _ C of the virtual capacitor operational amplifier power supply, and finally flows back to the ground GND _ L of the virtual inductor operational amplifier power supply, thereby completing the closed-loop flow of current.
Fig. 4 is a schematic diagram of an inductive current waveform of a synchronous rectification Boost converter simulation circuit with an input of 1V, a switching frequency of 1kHZ, a duty ratio of 0.5 and a load of 100 ohm fixed resistance, and fig. 5 is a schematic diagram of an output voltage waveform.
Therefore, the virtual inductor completely reproduces the output current waveform of the traditional passive inductor in the Boost converter circuit, and simulates the electrical characteristics of the passive inductor; the virtual capacitor completely reproduces the voltage output waveform of the traditional passive capacitor in the Boost converter circuit, and simulates the electrical characteristics of the passive capacitor; the synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor completely simulates the boosting function of the traditional synchronous rectification Boost converter circuit based on the passive inductor and the passive capacitor. The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor realizes real-time simulation of a high-power Boost converter circuit by adjusting the parameters of the virtual inductor and the virtual capacitor, and completes verification of a controller of the high-power Boost converter circuit.
It is to be understood that the present invention has been described with reference to certain embodiments, and that various changes in the features and embodiments, or equivalent substitutions may be made therein by those skilled in the art without departing from the spirit and scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.
Claims (10)
1. A synchronous rectification Boost converter simulation circuit based on a virtual inductor and a virtual capacitor is characterized by comprising an input part, the virtual inductor, the virtual capacitor, an NMOS upper tube Q2, an NMOS lower tube Q1, an optocoupler A, an optocoupler B and a load; the positive input part terminal is connected to a port a of the virtual inductor, a port c of the virtual inductor is connected to the negative input part terminal, the negative input part terminal is connected to a source of an NMOS lower tube Q1, a grid of the NMOS lower tube Q1 is connected to an output end of the optical coupler A, a drain of the NMOS lower tube Q1 is connected to a ground GND _ L of the virtual inductor, a drain of the NMOS lower tube Q1 is simultaneously connected to a source of an NMOS upper tube Q2, a grid of the NMOS upper tube Q2 is connected to an output end of the optical coupler B, a drain of the NMOS upper tube Q2 is connected to the positive load terminal and is simultaneously connected to a port d of the virtual capacitor, and a port e of the virtual capacitor is connected to the negative load terminal and is simultaneously connected to a ground GND _ P of the Boost circuit.
2. The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor as claimed in claim 1, wherein the virtual inductor comprises a virtual inductor operation link and a virtual inductor execution link, the virtual inductor operation link is formed by cascading a first operational amplifier circuit and a second operational amplifier circuit, and the first operational amplifier circuit and the second operational amplifier circuit perform integral and proportional operation on input voltages at two ends of the virtual inductor to simulate the electrical characteristics of a passive inductor; the virtual inductor execution link is composed of a third operational amplifier circuit, and the third operational amplifier circuit converts the voltage output quantity of the virtual inductor operation link into current output quantity to simulate energy storage and discharge of a passive inductor.
3. The virtual inductor and virtual capacitor based synchronous rectification Boost converter simulation circuit according to claim 2, wherein the first operational discharge circuit is composed of a first operational amplifier, a first resistor, a second resistor, a third resistor and a first capacitor; the left end of the first resistor is connected with a virtual inductor port a, and the right end of the first resistor is connected with the reverse input end of the first operational amplifier; the third resistor and the first capacitor are connected in parallel between the reverse input end of the first operational amplifier and the output end of the first operational amplifier; the second resistor is connected between the first operational amplifier equidirectional input end and the virtual inductor ground in series; the virtual inductor is connected to a virtual inductor port b;
the second operational amplifier is composed of a second operational amplifier, a fourth resistor, a fifth resistor and a sixth resistor; the fourth resistor is connected between the output end of the first operational amplifier and the inverting input end of the second operational amplifier in series; the sixth resistor is connected in parallel between the reverse input end of the second operational amplifier and the output end of the second operational amplifier; the fifth resistor is connected between the second operational amplifier equidirectional input end and the virtual inductor ground in series;
the third operational discharge circuit consists of a third operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor and an eleventh resistor; the seventh resistor is connected between the output end of the second operational amplifier and the inverting input end of the third operational amplifier in series; the eighth resistor is connected between the third operational amplifier equidirectional input end and the virtual inductor ground in series; the ninth resistor is connected between the right end of the seventh resistor and the port c in series, and the eleventh resistor is connected between the output end of the third operational amplifier and the port c in series; and the tenth resistor is connected in parallel between the third operational amplifier equidirectional input end and the third operational amplifier output end.
4. The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor as claimed in claim 2, wherein the output current of the virtual inductor execution link is the same as the output current of a traditional passive inductor, and the direction of the output current is opposite; the output current of the virtual inductor is completely from the power supply of the virtual inductor operational amplifier.
5. The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor as claimed in claim 3, wherein the input of the virtual inductor is the voltage difference between a port a and a port b, the port a and the port b are equal to the ports on the left side and the right side of the traditional passive inductor, and the port c is the current output port of the virtual inductor; the first operational amplifier circuit and the second operational amplifier circuit of the virtual inductor perform integral and proportional operation on the voltage difference between the port a and the port b, and the third operational amplifier circuit converts the output voltage of the second operational amplifier circuit into output current and outputs the output current to the port c; the output current of the port c is equal to the output current of the traditional passive inductor in magnitude and opposite in direction.
6. The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor as claimed in claim 1, wherein the virtual capacitor comprises a virtual capacitor sampling detection link and a virtual capacitor operation link, the virtual capacitor sampling detection link is composed of a fourth operational amplifier circuit, and the fourth operational amplifier circuit samples and amplifies input current and converts the current amount into a voltage amount; and the virtual capacitor operation link is formed by cascading a fifth operational amplifier circuit and a sixth operational amplifier circuit, and the fifth operational amplifier circuit and the sixth operational amplifier circuit perform integral and proportional operation on the output of the virtual capacitor sampling detection link.
7. The virtual inductor and virtual capacitor based synchronous rectification Boost converter simulation circuit according to claim 6, wherein the fourth operational discharge circuit is composed of a fourth operational amplifier, a twelfth resistor, a thirteenth resistor, a fourteenth resistor and a fifteenth resistor; the twelfth resistor is a sampling resistor and is connected between the virtual capacitor port d and the virtual capacitor ground in series, and the thirteenth resistor is connected between the virtual capacitor port d and the reverse input end of the fourth operational amplifier in series; the fourteenth resistor is connected between the homodromous input end of the fourth operational amplifier and the virtual capacitor ground in series; the fifteenth resistor is connected in parallel between the reverse input end of the fourth operational amplifier and the output end of the fourth operational amplifier;
the fifth operational discharge circuit consists of a fifth operational amplifier, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor and a second capacitor; the sixteenth resistor is connected between the output end of the fourth operational amplifier and the reverse input end of the fifth operational amplifier in series; the seventeenth resistor is connected in series between the fifth operational amplifier non-inverting input end and the virtual capacitor ground; the eighteenth resistor and the second capacitor are connected between the reverse input end of the fifth operational amplifier and the output end of the fifth operational amplifier in parallel;
the sixth operational discharge circuit consists of a sixth operational amplifier, a nineteenth resistor, a twentieth resistor and a twenty-first resistor; the nineteenth resistor is connected between the output end of the fifth operational amplifier and the reverse input end of the sixth operational amplifier in series; the twentieth resistor is connected in series between the homodromous input end of the sixth operational amplifier and the virtual capacitor ground; the twenty-first resistor is connected between the reverse input end of the sixth operational amplifier and the output end of the sixth operational amplifier in parallel; the output end of the sixth operational amplifier circuit is connected to the port e.
8. The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor as claimed in claim 6, wherein the voltage difference between the input end of the virtual capacitor sampling detection link and the output end of the virtual capacitor operation link is the same as the output voltage at two sides of the traditional passive capacitor, and the direction of the voltage difference is the same; and the output voltage of the virtual capacitor is all from a power supply of the virtual capacitor operational amplifier.
9. The synchronous rectification Boost converter simulation circuit based on the virtual inductor and the virtual capacitor as claimed in claim 7, wherein the input of the virtual capacitor is a sampling current flowing into a port d, the sampling current is converted into a voltage output through a fourth operational amplifier circuit, the voltage output by the fourth operational amplifier circuit is subjected to integral and proportional operation through a fifth operational amplifier circuit and a sixth operational amplifier circuit, and finally a corresponding voltage is output through a port e; the port d and the port e are equal to ports on two sides of a traditional passive capacitor, and the voltage difference value between the port d and the port e is the same as the output voltage of the traditional passive capacitor in size and direction.
10. The virtual inductor and virtual capacitor based synchronous rectification Boost converter emulation circuit of claim 9, wherein the virtual inductor value is of a magnitude
Wherein, R1 is a first resistance value, R4 is a fourth resistance value, R6 is a sixth resistance value, R7 is a seventh resistance value, R9 is a ninth resistance value, R11 is an eleventh resistance value, and C1 is a first capacitance value; resistors with different resistance values and capacitors with different capacitance values are used, or the first operational amplifier, the second operational amplifier and the third operational amplifier adopt variable gain operational amplifiers, so that the inductance value can be adjusted;
the virtual capacitor has a capacitance value of
Wherein, R12 is a twelfth resistance value, R13 is a thirteenth resistance value, R15 is a fifteenth resistance value, R16 is a sixteenth resistance value, R19 is a nineteenth resistance value, R21 is a twenty-first resistance value, and C2 is a second capacitance value; the resistors with different resistance values and the capacitors with different capacitance values are used, or the fourth operational amplifier, the fifth operational amplifier and the sixth operational amplifier adopt variable gain operational amplifiers, so that the capacitance value can be adjusted.
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